2018-09-18 06:30:35 +02:00
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using Ryujinx.Graphics.Memory;
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2018-11-17 05:01:31 +01:00
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using Ryujinx.Graphics.Texture;
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2018-09-18 06:30:35 +02:00
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using System.Collections.Generic;
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2018-12-03 03:38:47 +01:00
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namespace Ryujinx.Graphics.Graphics3d
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2018-09-18 06:30:35 +02:00
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{
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2018-11-17 05:01:31 +01:00
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class NvGpuEngineP2mf : INvGpuEngine
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{
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public int[] Registers { get; private set; }
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private NvGpu _gpu;
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private Dictionary<int, NvGpuMethod> _methods;
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private int _copyStartX;
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private int _copyStartY;
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private int _copyWidth;
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private int _copyHeight;
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private int _copyGobBlockHeight;
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private long _copyAddress;
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private int _copyOffset;
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private int _copySize;
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private bool _copyLinear;
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private byte[] _buffer;
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public NvGpuEngineP2mf(NvGpu gpu)
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{
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_gpu = gpu;
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Registers = new int[0x80];
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_methods = new Dictionary<int, NvGpuMethod>();
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void AddMethod(int meth, int count, int stride, NvGpuMethod method)
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{
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while (count-- > 0)
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{
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_methods.Add(meth, method);
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meth += stride;
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}
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}
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AddMethod(0x6c, 1, 1, Execute);
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AddMethod(0x6d, 1, 1, PushData);
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}
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public void CallMethod(NvGpuVmm vmm, GpuMethodCall methCall)
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{
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if (_methods.TryGetValue(methCall.Method, out NvGpuMethod method))
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{
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method(vmm, methCall);
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}
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else
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{
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WriteRegister(methCall);
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}
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}
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private void Execute(NvGpuVmm vmm, GpuMethodCall methCall)
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{
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//TODO: Some registers and copy modes are still not implemented.
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int control = methCall.Argument;
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long dstAddress = MakeInt64From2xInt32(NvGpuEngineP2mfReg.DstAddress);
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int dstPitch = ReadRegister(NvGpuEngineP2mfReg.DstPitch);
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int dstBlkDim = ReadRegister(NvGpuEngineP2mfReg.DstBlockDim);
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int dstX = ReadRegister(NvGpuEngineP2mfReg.DstX);
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int dstY = ReadRegister(NvGpuEngineP2mfReg.DstY);
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int dstWidth = ReadRegister(NvGpuEngineP2mfReg.DstWidth);
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int dstHeight = ReadRegister(NvGpuEngineP2mfReg.DstHeight);
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int lineLengthIn = ReadRegister(NvGpuEngineP2mfReg.LineLengthIn);
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int lineCount = ReadRegister(NvGpuEngineP2mfReg.LineCount);
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_copyLinear = (control & 1) != 0;
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_copyGobBlockHeight = 1 << ((dstBlkDim >> 4) & 0xf);
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_copyStartX = dstX;
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_copyStartY = dstY;
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_copyWidth = dstWidth;
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_copyHeight = dstHeight;
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_copyAddress = dstAddress;
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_copyOffset = 0;
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_copySize = lineLengthIn * lineCount;
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_buffer = new byte[_copySize];
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}
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private void PushData(NvGpuVmm vmm, GpuMethodCall methCall)
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{
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if (_buffer == null)
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{
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return;
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}
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for (int shift = 0; shift < 32 && _copyOffset < _copySize; shift += 8, _copyOffset++)
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{
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_buffer[_copyOffset] = (byte)(methCall.Argument >> shift);
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}
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if (methCall.IsLastCall)
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{
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if (_copyLinear)
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{
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vmm.WriteBytes(_copyAddress, _buffer);
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}
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else
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{
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BlockLinearSwizzle swizzle = new BlockLinearSwizzle(
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_copyWidth,
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_copyHeight, 1,
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_copyGobBlockHeight, 1, 1);
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int srcOffset = 0;
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for (int y = _copyStartY; y < _copyHeight && srcOffset < _copySize; y++)
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for (int x = _copyStartX; x < _copyWidth && srcOffset < _copySize; x++)
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{
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int dstOffset = swizzle.GetSwizzleOffset(x, y, 0);
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vmm.WriteByte(_copyAddress + dstOffset, _buffer[srcOffset++]);
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}
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}
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_buffer = null;
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}
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}
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private long MakeInt64From2xInt32(NvGpuEngineP2mfReg reg)
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{
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return
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(long)Registers[(int)reg + 0] << 32 |
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(uint)Registers[(int)reg + 1];
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}
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private void WriteRegister(GpuMethodCall methCall)
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{
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Registers[methCall.Method] = methCall.Argument;
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}
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private int ReadRegister(NvGpuEngineP2mfReg reg)
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{
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return Registers[(int)reg];
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}
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private void WriteRegister(NvGpuEngineP2mfReg reg, int value)
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{
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Registers[(int)reg] = value;
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}
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}
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}
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