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Sign-extend shader memory instruction offsets (#934)

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gdkchan 2020-02-13 21:48:07 -03:00 committed by GitHub
parent 416ddd0f6e
commit 5a9dba0756
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GPG key ID: 4AEE18F83AFDEB23
4 changed files with 6 additions and 6 deletions
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2
Ryujinx.Graphics.Shader/Decoders/OpCodeLdc.cs
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@ -17,7 +17,7 @@ namespace Ryujinx.Graphics.Shader.Decoders
Rd = new Register(opCode.Extract(0, 8), RegisterType.Gpr);
Ra = new Register(opCode.Extract(8, 8), RegisterType.Gpr);
Offset = opCode.Extract(22, 14);
Offset = (opCode.Extract(20, 16) << 16) >> 16;
Slot = opCode.Extract(36, 5);
Size = (IntegerSize)opCode.Extract(48, 3);

2
Ryujinx.Graphics.Shader/Decoders/OpCodeMemory.cs
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@ -18,7 +18,7 @@ namespace Ryujinx.Graphics.Shader.Decoders
Rd = new Register(opCode.Extract(0, 8), RegisterType.Gpr);
Ra = new Register(opCode.Extract(8, 8), RegisterType.Gpr);
Offset = opCode.Extract(20, 24);
Offset = (opCode.Extract(20, 24) << 8) >> 8;
Extended = opCode.Extract(45);

2
Ryujinx.Graphics.Shader/Decoders/OpCodeRed.cs
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@ -24,7 +24,7 @@ namespace Ryujinx.Graphics.Shader.Decoders
AtomicOp = (AtomicOp)opCode.Extract(23, 3);
Offset = opCode.Extract(28, 20);
Offset = (opCode.Extract(28, 20) << 12) >> 12;
Extended = opCode.Extract(48);
}

6
Ryujinx.Graphics.Shader/Instructions/InstEmitMemory.cs
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@ -138,11 +138,11 @@ namespace Ryujinx.Graphics.Shader.Instructions
int count = op.Size == IntegerSize.B64 ? 2 : 1;
Operand wordOffset = context.ShiftRightU32(GetSrcA(context), Const(2));
Operand addr = context.IAdd(GetSrcA(context), Const(op.Offset));
wordOffset = context.IAdd(wordOffset, Const(op.Offset));
Operand wordOffset = context.ShiftRightU32(addr, Const(2));
Operand bitOffset = GetBitOffset(context, GetSrcA(context));
Operand bitOffset = GetBitOffset(context, addr);
for (int index = 0; index < count; index++)
{