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ARMeilleure: Implement TPIDR2_EL0 (#280)
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This is an implementation of the TPIDR2_EL0 register. There may be more potential use-cases for this register not included in this PR, but this implements the use-case seen in SuperTuxKart.
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2 changed files with 26 additions and 0 deletions
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@ -49,6 +49,9 @@ namespace ARMeilleure.Instructions
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case 0b11_011_1101_0000_011:
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case 0b11_011_1101_0000_011:
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EmitGetTpidrroEl0(context);
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EmitGetTpidrroEl0(context);
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return;
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return;
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case 0b11_011_1101_0000_101:
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EmitGetTpidr2El0(context);
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return;
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case 0b11_011_1110_0000_000:
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case 0b11_011_1110_0000_000:
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info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetCntfrqEl0));
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info = typeof(NativeInterface).GetMethod(nameof(NativeInterface.GetCntfrqEl0));
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break;
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break;
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@ -84,6 +87,9 @@ namespace ARMeilleure.Instructions
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case 0b11_011_1101_0000_010:
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case 0b11_011_1101_0000_010:
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EmitSetTpidrEl0(context);
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EmitSetTpidrEl0(context);
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return;
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return;
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case 0b11_011_1101_0000_101:
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EmitGetTpidr2El0(context);
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return;
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default:
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default:
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throw new NotImplementedException($"Unknown MSR 0x{op.RawOpCode:X8} at 0x{op.Address:X16}.");
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throw new NotImplementedException($"Unknown MSR 0x{op.RawOpCode:X8} at 0x{op.Address:X16}.");
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@ -213,6 +219,17 @@ namespace ARMeilleure.Instructions
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SetIntOrZR(context, op.Rt, result);
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SetIntOrZR(context, op.Rt, result);
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}
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}
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private static void EmitGetTpidr2El0(ArmEmitterContext context)
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{
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OpCodeSystem op = (OpCodeSystem)context.CurrOp;
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Operand nativeContext = context.LoadArgument(OperandType.I64, 0);
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Operand result = context.Load(OperandType.I64, context.Add(nativeContext, Const((ulong)NativeContext.GetTpidr2El0Offset())));
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SetIntOrZR(context, op.Rt, result);
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}
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private static void EmitSetNzcv(ArmEmitterContext context)
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private static void EmitSetNzcv(ArmEmitterContext context)
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{
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{
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OpCodeSystem op = (OpCodeSystem)context.CurrOp;
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OpCodeSystem op = (OpCodeSystem)context.CurrOp;
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@ -21,6 +21,7 @@ namespace ARMeilleure.State
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public ulong ExclusiveValueLow;
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public ulong ExclusiveValueLow;
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public ulong ExclusiveValueHigh;
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public ulong ExclusiveValueHigh;
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public int Running;
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public int Running;
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public long Tpidr2El0;
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}
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}
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private static NativeCtxStorage _dummyStorage = new();
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private static NativeCtxStorage _dummyStorage = new();
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@ -176,6 +177,9 @@ namespace ARMeilleure.State
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public long GetTpidrroEl0() => GetStorage().TpidrroEl0;
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public long GetTpidrroEl0() => GetStorage().TpidrroEl0;
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public void SetTpidrroEl0(long value) => GetStorage().TpidrroEl0 = value;
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public void SetTpidrroEl0(long value) => GetStorage().TpidrroEl0 = value;
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public long GetTpidr2El0() => GetStorage().Tpidr2El0;
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public void SetTpidr2El0(long value) => GetStorage().Tpidr2El0 = value;
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public int GetCounter() => GetStorage().Counter;
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public int GetCounter() => GetStorage().Counter;
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public void SetCounter(int value) => GetStorage().Counter = value;
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public void SetCounter(int value) => GetStorage().Counter = value;
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@ -232,6 +236,11 @@ namespace ARMeilleure.State
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return StorageOffset(ref _dummyStorage, ref _dummyStorage.TpidrroEl0);
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return StorageOffset(ref _dummyStorage, ref _dummyStorage.TpidrroEl0);
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}
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}
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public static int GetTpidr2El0Offset()
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{
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return StorageOffset(ref _dummyStorage, ref _dummyStorage.Tpidr2El0);
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}
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public static int GetCounterOffset()
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public static int GetCounterOffset()
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{
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{
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return StorageOffset(ref _dummyStorage, ref _dummyStorage.Counter);
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return StorageOffset(ref _dummyStorage, ref _dummyStorage.Counter);
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