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https://github.com/GreemDev/Ryujinx
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* Add AddressTable<T> * Use AddressTable<T> for dispatch * Remove JumpTable & co. * Add fallback for out of range addresses * Add PPTC support * Add documentation to `AddressTable<T>` * Make AddressTable<T> configurable * Fix table walk * Fix IsMapped check * Remove CountTableCapacity * Add PPTC support for fast path * Rename IsMapped to IsValid * Remove stale comment * Change format of address in exception message * Add TranslatorStubs * Split DispatchStub Avoids recompilation of stubs during tests. * Add hint for 64bit or 32bit * Add documentation to `Symbol` * Add documentation to `TranslatorStubs` Make `TranslatorStubs` disposable as well. * Add documentation to `SymbolType` * Add `AddressTableEventSource` to monitor function table size Add an EventSource which measures the amount of unmanaged bytes allocated by AddressTable<T> instances. dotnet-counters monitor -n Ryujinx --counters ARMeilleure * Add `AllowLcqInFunctionTable` optimization toggle This is to reduce the impact this change has on the test duration. Before everytime a test was ran, the FunctionTable would be initialized and populated so that the newly compiled test would get registered to it. * Implement unmanaged dispatcher Uses the DispatchStub to dispatch into the next translation, which allows execution to stay in unmanaged for longer and skips a ConcurrentDictionary look up when the target translation has been registered to the FunctionTable. * Remove redundant null check * Tune levels of FunctionTable Uses 5 levels instead of 4 and change unit of AddressTableEventSource from KB to MB. * Use 64-bit function table Improves codegen for direct branches: mov qword [rax+0x408],0x10603560 - mov rcx,sub_10603560_OFFSET - mov ecx,[rcx] - mov ecx,ecx - mov rdx,JIT_CACHE_BASE - add rdx,rcx + mov rcx,sub_10603560 + mov rdx,[rcx] mov rcx,rax Improves codegen for dispatch stub: and rax,byte +0x1f - mov eax,[rcx+rax*4] - mov eax,eax - mov rcx,JIT_CACHE_BASE - lea rax,[rcx+rax] + mov rax,[rcx+rax*8] mov rcx,rbx * Remove `JitCacheSymbol` & `JitCache.Offset` * Turn `Translator.Translate` into an instance method We do not have to add more parameter to this method and related ones as new structures are added & needed for translation. * Add symbol only when PTC is enabled Address LDj3SNuD's feedback * Change `NativeContext.Running` to a 32-bit integer * Fix PageTable symbol for host mapped
44 lines
No EOL
2.6 KiB
C#
44 lines
No EOL
2.6 KiB
C#
using ARMeilleure.CodeGen.X86;
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namespace ARMeilleure
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{
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public static class Optimizations
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{
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public static bool FastFP { get; set; } = true;
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public static bool AllowLcqInFunctionTable { get; set; } = true;
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public static bool UseUnmanagedDispatchLoop { get; set; } = true;
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public static bool UseSseIfAvailable { get; set; } = true;
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public static bool UseSse2IfAvailable { get; set; } = true;
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public static bool UseSse3IfAvailable { get; set; } = true;
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public static bool UseSsse3IfAvailable { get; set; } = true;
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public static bool UseSse41IfAvailable { get; set; } = true;
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public static bool UseSse42IfAvailable { get; set; } = true;
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public static bool UsePopCntIfAvailable { get; set; } = true;
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public static bool UseAvxIfAvailable { get; set; } = true;
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public static bool UseF16cIfAvailable { get; set; } = true;
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public static bool UseFmaIfAvailable { get; set; } = true;
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public static bool UseAesniIfAvailable { get; set; } = true;
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public static bool UsePclmulqdqIfAvailable { get; set; } = true;
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public static bool ForceLegacySse
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{
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get => HardwareCapabilities.ForceLegacySse;
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set => HardwareCapabilities.ForceLegacySse = value;
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}
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internal static bool UseSse => UseSseIfAvailable && HardwareCapabilities.SupportsSse;
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internal static bool UseSse2 => UseSse2IfAvailable && HardwareCapabilities.SupportsSse2;
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internal static bool UseSse3 => UseSse3IfAvailable && HardwareCapabilities.SupportsSse3;
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internal static bool UseSsse3 => UseSsse3IfAvailable && HardwareCapabilities.SupportsSsse3;
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internal static bool UseSse41 => UseSse41IfAvailable && HardwareCapabilities.SupportsSse41;
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internal static bool UseSse42 => UseSse42IfAvailable && HardwareCapabilities.SupportsSse42;
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internal static bool UsePopCnt => UsePopCntIfAvailable && HardwareCapabilities.SupportsPopcnt;
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internal static bool UseAvx => UseAvxIfAvailable && HardwareCapabilities.SupportsAvx && !ForceLegacySse;
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internal static bool UseF16c => UseF16cIfAvailable && HardwareCapabilities.SupportsF16c;
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internal static bool UseFma => UseFmaIfAvailable && HardwareCapabilities.SupportsFma;
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internal static bool UseAesni => UseAesniIfAvailable && HardwareCapabilities.SupportsAesni;
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internal static bool UsePclmulqdq => UsePclmulqdqIfAvailable && HardwareCapabilities.SupportsPclmulqdq;
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}
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} |