mirror of
https://github.com/GreemDev/Ryujinx
synced 2024-11-26 03:31:56 +01:00
6b23a2c125
* Start implementing a new shader translator * Fix shift instructions and a typo * Small refactoring on StructuredProgram, move RemovePhis method to a separate class * Initial geometry shader support * Implement TLD4 * Fix -- There's no negation on FMUL32I * Add constant folding and algebraic simplification optimizations, nits * Some leftovers from constant folding * Avoid cast for constant assignments * Add a branch elimination pass, and misc small fixes * Remove redundant branches, add expression propagation and other improvements on the code * Small leftovers -- add missing break and continue, remove unused properties, other improvements * Add null check to handle empty block cases on block visitor * Add HADD2 and HMUL2 half float shader instructions * Optimize pack/unpack sequences, some fixes related to half float instructions * Add TXQ, TLD, TLDS and TLD4S shader texture instructions, and some support for bindless textures, some refactoring on codegen * Fix copy paste mistake that caused RZ to be ignored on the AST instruction * Add workaround for conditional exit, and fix half float instruction with constant buffer * Add missing 0.0 source for TLDS.LZ variants * Simplify the switch for TLDS.LZ * Texture instructions related fixes * Implement the HFMA instruction, and some misc. fixes * Enable constant folding on UnpackHalf2x16 instructions * Refactor HFMA to use OpCode* for opcode decoding rather than on the helper methods * Remove the old shader translator * Remove ShaderDeclInfo and other unused things * Add dual vertex shader support * Add ShaderConfig, used to pass shader type and maximum cbuffer size * Move and rename some instruction enums * Move texture instructions into a separate file * Move operand GetExpression and locals management to OperandManager * Optimize opcode decoding using a simple list and binary search * Add missing condition for do-while on goto elimination * Misc. fixes on texture instructions * Simplify TLDS switch * Address PR feedback, and a nit
79 lines
No EOL
1.9 KiB
C#
79 lines
No EOL
1.9 KiB
C#
using Ryujinx.Graphics.Shader.Decoders;
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using System;
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using System.Collections.Generic;
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namespace Ryujinx.Graphics.Shader.IntermediateRepresentation
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{
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class Operand
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{
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private const int CbufSlotBits = 5;
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private const int CbufSlotLsb = 32 - CbufSlotBits;
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private const int CbufSlotMask = (1 << CbufSlotBits) - 1;
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public OperandType Type { get; }
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public int Value { get; }
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public INode AsgOp { get; set; }
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public HashSet<INode> UseOps { get; }
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private Operand()
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{
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UseOps = new HashSet<INode>();
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}
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public Operand(OperandType type) : this()
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{
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Type = type;
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}
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public Operand(OperandType type, int value) : this()
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{
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Type = type;
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Value = value;
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}
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public Operand(Register reg) : this()
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{
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Type = OperandType.Register;
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Value = PackRegInfo(reg.Index, reg.Type);
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}
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public Operand(int slot, int offset) : this()
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{
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Type = OperandType.ConstantBuffer;
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Value = PackCbufInfo(slot, offset);
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}
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private static int PackCbufInfo(int slot, int offset)
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{
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return (slot << CbufSlotLsb) | offset;
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}
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private static int PackRegInfo(int index, RegisterType type)
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{
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return ((int)type << 24) | index;
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}
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public int GetCbufSlot()
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{
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return (Value >> CbufSlotLsb) & CbufSlotMask;
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}
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public int GetCbufOffset()
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{
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return Value & ~(CbufSlotMask << CbufSlotLsb);
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}
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public Register GetRegister()
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{
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return new Register(Value & 0xffffff, (RegisterType)(Value >> 24));
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}
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public float AsFloat()
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{
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return BitConverter.Int32BitsToSingle(Value);
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}
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}
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} |