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https://github.com/GreemDev/Ryujinx
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894459fcd7
* Update AOpCodeTable.cs * Update AInstEmitSimdMove.cs * Update AInstEmitSimdArithmetic.cs * Update AInstEmitSimdShift.cs * Update ASoftFallback.cs * Update ASoftFloat.cs * Update AOpCodeSimdRegElemF.cs * Update CpuTestSimdIns.cs * Update CpuTestSimdRegElem.cs * Create CpuTestSimdRegElemF.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Superseded Fmul_Se Test. Nit. * Address PR feedback. * Address PR feedback. * Update AInstEmitSimdArithmetic.cs * Update ASoftFallback.cs * Update AInstEmitAlu.cs * Update AInstEmitSimdShift.cs
33 lines
807 B
C#
33 lines
807 B
C#
using ChocolArm64.Instruction;
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namespace ChocolArm64.Decoder
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{
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class AOpCodeSimdRegElemF : AOpCodeSimdReg
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{
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public int Index { get; private set; }
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public AOpCodeSimdRegElemF(AInst Inst, long Position, int OpCode) : base(Inst, Position, OpCode)
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{
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switch ((OpCode >> 21) & 3) // sz:L
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{
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case 0: // H:0
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Index = (OpCode >> 10) & 2; // 0, 2
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break;
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case 1: // H:1
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Index = (OpCode >> 10) & 2;
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Index++; // 1, 3
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break;
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case 2: // H
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Index = (OpCode >> 11) & 1; // 0, 1
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break;
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default: Emitter = AInstEmit.Und; return;
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}
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}
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}
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}
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