Ryujinx/ChocolArm64
2018-04-06 15:39:39 -03:00
..
Decoder Enable all ld/st (single structure) instructions 2018-03-30 18:06:02 -03:00
Events
Exceptions
Instruction [CPU] Fail early when the index/size of the vector is invalid 2018-04-06 15:39:39 -03:00
Memory Improvements to audout (#58) 2018-03-15 21:06:24 -03:00
State Add pl:u stub, use higher precision on CNTPCT_EL0 register tick count 2018-03-13 21:24:32 -03:00
Translation Fix 32-bits extended register instructions with 64-bits extensions 2018-03-30 23:32:06 -03:00
ABitUtils.cs
AOpCodeTable.cs Add FMLS (vector) instruction 2018-04-06 01:41:54 -03:00
AOptimizations.cs Allow to enable/disable memory checks even on release mode through the flag, return error for invalid addresses on SvcMap*Memory svcs, do not return error on SvcQueryMemory (instead, return reserved for the end of the address space), other minor tweaks 2018-03-10 20:39:16 -03:00
AThread.cs Allow more than one process, free resources on process dispose, implement SvcExitThread 2018-03-12 01:14:12 -03:00
ATranslatedSub.cs
ATranslatedSubType.cs
ATranslator.cs HashSet is not thread safe, hopefully this fixes the CPU issue where it throws a exception on Add 2018-04-04 18:17:37 -03:00
ChocolArm64.csproj