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Ryujinx/ARMeilleure/State
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gdkchan 9878fc2d3c
Implement inline memory load/store exclusive and ordered (#1413) 
* Implement inline memory load/store exclusive

* Fix missing REX prefix on 8-bits CMPXCHG

* Increment PTC version due to bugfix

* Remove redundant memory checks

* Address PR feedback

* Increment PPTC version
2020-07-30 11:29:28 -03:00
..
Aarch32Mode.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
ExecutionContext.cs Implement CNTVCT_EL0 (#1268) 2020-05-23 12:15:59 +02:00
ExecutionMode.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
FPCR.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
FPException.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
FPRoundingMode.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
FPSR.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
FPState.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
FPType.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
InstExceptionEventArgs.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
InstUndefinedEventArgs.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
NativeContext.cs Implement inline memory load/store exclusive and ordered (#1413) 2020-07-30 11:29:28 -03:00
PState.cs Add SSAT, SSAT16, USAT and USAT16 ARM32 instructions (#954) 2020-03-01 07:51:55 +11:00
RegisterAlias.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
RegisterConsts.cs Add most of the A32 instruction set to ARMeilleure (#897) 2020-02-24 08:20:40 +11:00
V128.cs Improve V128 (#1097) 2020-04-17 08:19:20 +10:00