mirror of
https://github.com/GreemDev/Ryujinx
synced 2024-11-22 17:56:59 +01:00
152 lines
No EOL
3.2 KiB
C#
152 lines
No EOL
3.2 KiB
C#
using System;
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namespace Ryujinx.Graphics.Shader.IntermediateRepresentation
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{
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[Flags]
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enum Instruction
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{
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Absolute = 1,
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Add,
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AtomicAdd,
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AtomicAnd,
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AtomicCompareAndSwap,
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AtomicMinS32,
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AtomicMinU32,
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AtomicMaxS32,
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AtomicMaxU32,
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AtomicOr,
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AtomicSwap,
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AtomicXor,
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Ballot,
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BitCount,
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BitfieldExtractS32,
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BitfieldExtractU32,
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BitfieldInsert,
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BitfieldReverse,
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BitwiseAnd,
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BitwiseExclusiveOr,
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BitwiseNot,
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BitwiseOr,
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Branch,
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BranchIfFalse,
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BranchIfTrue,
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Ceiling,
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Clamp,
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ClampU32,
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Comment,
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CompareEqual,
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CompareGreater,
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CompareGreaterOrEqual,
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CompareGreaterOrEqualU32,
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CompareGreaterU32,
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CompareLess,
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CompareLessOrEqual,
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CompareLessOrEqualU32,
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CompareLessU32,
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CompareNotEqual,
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ConditionalSelect,
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ConvertFPToS32,
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ConvertS32ToFP,
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ConvertU32ToFP,
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Copy,
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Cosine,
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Ddx,
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Ddy,
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Discard,
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Divide,
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EmitVertex,
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EndPrimitive,
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ExponentB2,
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FindFirstSetS32,
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FindFirstSetU32,
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Floor,
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FusedMultiplyAdd,
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ImageLoad,
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ImageStore,
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IsNan,
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LoadAttribute,
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LoadConstant,
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LoadGlobal,
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LoadLocal,
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LoadShared,
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LoadStorage,
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LogarithmB2,
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LogicalAnd,
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LogicalExclusiveOr,
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LogicalNot,
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LogicalOr,
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LoopBreak,
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LoopContinue,
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MarkLabel,
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Maximum,
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MaximumU32,
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Minimum,
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MinimumU32,
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Multiply,
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Negate,
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PackDouble2x32,
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PackHalf2x16,
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ReciprocalSquareRoot,
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Return,
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Round,
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ShiftLeft,
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ShiftRightS32,
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ShiftRightU32,
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Shuffle,
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ShuffleDown,
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ShuffleUp,
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ShuffleXor,
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Sine,
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SquareRoot,
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StoreGlobal,
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StoreLocal,
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StoreShared,
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StoreStorage,
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Subtract,
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SwizzleAdd,
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TextureSample,
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TextureSize,
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Truncate,
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UnpackDouble2x32,
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UnpackHalf2x16,
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VoteAll,
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VoteAllEqual,
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VoteAny,
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Count,
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FP = 1 << 16,
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MrShift = 17,
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MrGlobal = 0 << MrShift,
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MrShared = 1 << MrShift,
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MrStorage = 2 << MrShift,
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MrMask = 3 << MrShift,
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Mask = 0xffff
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}
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static class InstructionExtensions
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{
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public static bool IsAtomic(this Instruction inst)
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{
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switch (inst & Instruction.Mask)
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{
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case Instruction.AtomicAdd:
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case Instruction.AtomicAnd:
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case Instruction.AtomicCompareAndSwap:
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case Instruction.AtomicMaxS32:
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case Instruction.AtomicMaxU32:
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case Instruction.AtomicMinS32:
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case Instruction.AtomicMinU32:
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case Instruction.AtomicOr:
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case Instruction.AtomicSwap:
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case Instruction.AtomicXor:
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return true;
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}
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return false;
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}
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}
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} |