merry f5235fff29 ARMeilleure: Hardware accelerate SHA256 (#3585) ... * ARMeilleure/HardwareCapabilities: Add Sha * ARMeilleure/Intrinsic: Add X86Sha256Rnds2 * ARmeilleure: Hardware accelerate SHA256H/SHA256H2 * ARMeilleure/Intrinsic: Add X86Sha256Msg1, X86Sha256Msg2 * ARMeilleure/Intrinsic: Add X86Palignr * ARMeilleure: Hardware accelerate SHA256SU0, SHA256SU1 * PTC: Bump InternalVersion		2022-08-25 10:12:13 +00:00
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Assembler.cs	Add host CPU memory barriers for DMB/DSB and ordered load/store (#3015)	2022-01-21 12:47:34 -03:00
AssemblerTable.cs	ARMeilleure: Hardware accelerate SHA256 (#3585)	2022-08-25 10:12:13 +00:00
CallConvName.cs
CallingConvention.cs	Removed unused usings. (#3593)	2022-08-18 18:04:54 +02:00
CodeGenCommon.cs
CodeGenContext.cs	Add Operand.Label support to Assembler (#2680)	2021-10-05 14:04:55 -03:00
CodeGenerator.cs	Add host CPU memory barriers for DMB/DSB and ordered load/store (#3015)	2022-01-21 12:47:34 -03:00
HardwareCapabilities.cs	ARMeilleure: Hardware accelerate SHA256 (#3585)	2022-08-25 10:12:13 +00:00
IntrinsicInfo.cs
IntrinsicTable.cs	ARMeilleure: Hardware accelerate SHA256 (#3585)	2022-08-25 10:12:13 +00:00
IntrinsicType.cs	Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (fast paths). (#1630)	2020-12-07 10:37:07 +01:00
PreAllocator.cs	ARMeilleure: Hardware accelerate SHA256 (#3585)	2022-08-25 10:12:13 +00:00
X86Condition.cs
X86Instruction.cs	ARMeilleure: Hardware accelerate SHA256 (#3585)	2022-08-25 10:12:13 +00:00
X86Optimizer.cs	Add a limit on the number of uses a constant may have (#3097)	2022-02-09 17:42:47 -03:00
X86Register.cs