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Intel ssp blob can have auxiliary controls catenated as tlv array at the end of its "normal" data blob. These are needed in some platforms for example to enable hardware clocks earlier than streaming starts. In topology the auxiliary data classes are embedded into hw_config and can be instantiated like: Object.Base.hw_config."SSP0_0" { id 0 mclk_freq 38400000 bclk_freq 256000 tdm_slot_width 16 format "DSP_A" bclk "codec_provider" fsync "codec_provider" fsync_freq 16000 Object.Base.mn_config."MN_0" { m_div 100 n_div 200 } Object.Base.clk_config."CLK_0" { clock_warm_up 1 mclk 2 warm_up_ovr 3 clock_stop_delay 4 keep_running 5 clock_stop_ovr 6 } } Fixes: https://github.com/alsa-project/alsa-utils/pull/184 Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com> Signed-off-by: Jaroslav Kysela <perex@perex.cz> |
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ssp-debug.c | ||
ssp-debug.h | ||
ssp-intel.h | ||
ssp-internal.h | ||
ssp-process.c | ||
ssp-process.h |