mirror of
https://github.com/alsa-project/alsa-utils
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feb9c4cdec
config.h may contain defines like _FILE_OFFSET_BITS which influence the system wide include files (off_t types, open -> open64 function usage etc.). Related: https://github.com/alsa-project/alsa-utils/pull/223 Signed-off-by: Jaroslav Kysela <perex@perex.cz>
650 lines
20 KiB
C
650 lines
20 KiB
C
// SPDX-License-Identifier: BSD-3-Clause
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//
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// Copyright(c) 2021 Intel Corporation. All rights reserved.
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//
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// Author: Jaska Uimonen <jaska.uimonen@linux.intel.com>
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#include "aconfig.h"
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#include <stdint.h>
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#include <errno.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <alsa/input.h>
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#include <alsa/output.h>
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#include <alsa/conf.h>
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#include <alsa/error.h>
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#include "intel-nhlt.h"
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#include "ssp-nhlt.h"
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#include "ssp/ssp-process.h"
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#include "ssp/ssp-internal.h"
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static int set_mn_config(struct intel_nhlt_params *nhlt, snd_config_t *cfg, snd_config_t *top)
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{
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long m_div;
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long n_div;
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long ret;
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struct dai_values ssp_mn_data[] = {
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{"m_div", SND_CONFIG_TYPE_INTEGER, NULL, &m_div, NULL},
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{"n_div", SND_CONFIG_TYPE_INTEGER, NULL, &n_div, NULL},
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};
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ret = find_set_values(&ssp_mn_data[0], ARRAY_SIZE(ssp_mn_data), cfg, top,
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"Class.Base.mn_config");
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if (ret < 0)
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return ret;
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return ssp_mn_set_params(nhlt, m_div, n_div);
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}
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static int set_clk_config(struct intel_nhlt_params *nhlt, snd_config_t *cfg, snd_config_t *top)
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{
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long clock_warm_up;
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long mclk;
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long warm_up_ovr;
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long clock_stop_delay;
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long keep_running;
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long clock_stop_ovr;
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long ret;
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struct dai_values ssp_clk_data[] = {
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{"clock_warm_up", SND_CONFIG_TYPE_INTEGER, NULL, &clock_warm_up, NULL},
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{"mclk", SND_CONFIG_TYPE_INTEGER, NULL, &mclk, NULL},
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{"warm_up_ovr", SND_CONFIG_TYPE_INTEGER, NULL, &warm_up_ovr, NULL},
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{"clock_stop_delay", SND_CONFIG_TYPE_INTEGER, NULL, &clock_stop_delay, NULL},
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{"keep_running", SND_CONFIG_TYPE_INTEGER, NULL, &keep_running, NULL},
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{"clock_stop_ovr", SND_CONFIG_TYPE_INTEGER, NULL, &clock_stop_ovr, NULL},
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};
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ret = find_set_values(&ssp_clk_data[0], ARRAY_SIZE(ssp_clk_data), cfg, top,
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"Class.Base.clk_config");
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if (ret < 0)
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return ret;
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return ssp_clk_set_params(nhlt, clock_warm_up, mclk, warm_up_ovr, clock_stop_delay,
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keep_running, clock_stop_ovr);
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}
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static int set_tr_start_config(struct intel_nhlt_params *nhlt, snd_config_t *cfg, snd_config_t *top)
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{
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long sampling_frequency;
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long bit_depth;
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long channel_map;
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long channel_config;
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long interleaving_style;
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long number_of_channels;
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long valid_bit_depth;
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long sample_type;
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long ret;
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struct dai_values ssp_tr_data[] = {
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{"sampling_frequency", SND_CONFIG_TYPE_INTEGER, NULL, &sampling_frequency, NULL},
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{"bit_depth", SND_CONFIG_TYPE_INTEGER, NULL, &bit_depth, NULL},
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{"channel_map", SND_CONFIG_TYPE_INTEGER, NULL, &channel_map, NULL},
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{"channel_config", SND_CONFIG_TYPE_INTEGER, NULL, &channel_config, NULL},
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{"interleaving_style", SND_CONFIG_TYPE_INTEGER, NULL, &interleaving_style, NULL},
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{"number_of_channels", SND_CONFIG_TYPE_INTEGER, NULL, &number_of_channels, NULL},
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{"valid_bit_depth", SND_CONFIG_TYPE_INTEGER, NULL, &valid_bit_depth, NULL},
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{"sample_type", SND_CONFIG_TYPE_INTEGER, NULL, &sample_type, NULL},
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};
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ret = find_set_values(&ssp_tr_data[0], ARRAY_SIZE(ssp_tr_data), cfg, top,
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"Class.Base.tr_start_config");
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if (ret < 0)
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return ret;
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return ssp_tr_start_set_params(nhlt, sampling_frequency, bit_depth, channel_map,
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channel_config, interleaving_style, number_of_channels,
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valid_bit_depth,sample_type);
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}
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static int set_tr_stop_config(struct intel_nhlt_params *nhlt, snd_config_t *cfg, snd_config_t *top)
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{
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long sampling_frequency;
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long bit_depth;
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long channel_map;
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long channel_config;
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long interleaving_style;
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long number_of_channels;
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long valid_bit_depth;
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long sample_type;
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long ret;
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struct dai_values ssp_tr_data[] = {
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{"sampling_frequency", SND_CONFIG_TYPE_INTEGER, NULL, &sampling_frequency, NULL},
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{"bit_depth", SND_CONFIG_TYPE_INTEGER, NULL, &bit_depth, NULL},
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{"channel_map", SND_CONFIG_TYPE_INTEGER, NULL, &channel_map, NULL},
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{"channel_config", SND_CONFIG_TYPE_INTEGER, NULL, &channel_config, NULL},
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{"interleaving_style", SND_CONFIG_TYPE_INTEGER, NULL, &interleaving_style, NULL},
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{"number_of_channels", SND_CONFIG_TYPE_INTEGER, NULL, &number_of_channels, NULL},
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{"valid_bit_depth", SND_CONFIG_TYPE_INTEGER, NULL, &valid_bit_depth, NULL},
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{"sample_type", SND_CONFIG_TYPE_INTEGER, NULL, &sample_type, NULL},
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};
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ret = find_set_values(&ssp_tr_data[0], ARRAY_SIZE(ssp_tr_data), cfg, top,
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"Class.Base.tr_stop_config");
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if (ret < 0)
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return ret;
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return ssp_tr_stop_set_params(nhlt, sampling_frequency, bit_depth, channel_map,
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channel_config, interleaving_style, number_of_channels,
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valid_bit_depth,sample_type);
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}
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static int set_run_config(struct intel_nhlt_params *nhlt, snd_config_t *cfg, snd_config_t *top)
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{
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long always_run;
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long ret;
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struct dai_values ssp_run_data[] = {
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{"always_run", SND_CONFIG_TYPE_INTEGER, NULL, &always_run, NULL},
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};
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ret = find_set_values(&ssp_run_data[0], ARRAY_SIZE(ssp_run_data), cfg, top,
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"Class.Base.run_config");
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if (ret < 0)
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return ret;
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return ssp_run_set_params(nhlt, always_run);
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}
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static int set_node_config(struct intel_nhlt_params *nhlt, snd_config_t *cfg, snd_config_t *top)
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{
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long sampling_rate;
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long node_id;
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long ret;
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struct dai_values ssp_node_data[] = {
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{"node_id", SND_CONFIG_TYPE_INTEGER, NULL, &node_id, NULL},
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{"sampling_rate", SND_CONFIG_TYPE_INTEGER, NULL, &sampling_rate, NULL},
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};
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ret = find_set_values(&ssp_node_data[0], ARRAY_SIZE(ssp_node_data), cfg, top,
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"Class.Base.node_config");
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if (ret < 0)
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return ret;
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return ssp_node_set_params(nhlt, node_id, sampling_rate);
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}
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static int set_sync_config(struct intel_nhlt_params *nhlt, snd_config_t *cfg, snd_config_t *top)
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{
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long sync_denominator;
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long ret;
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struct dai_values ssp_sync_data[] = {
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{"sync_denominator", SND_CONFIG_TYPE_INTEGER, NULL, &sync_denominator, NULL},
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};
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ret = find_set_values(&ssp_sync_data[0], ARRAY_SIZE(ssp_sync_data), cfg, top,
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"Class.Base.sync_config");
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if (ret < 0)
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return ret;
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return ssp_sync_set_params(nhlt, sync_denominator);
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}
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static int set_ext_config(struct intel_nhlt_params *nhlt, snd_config_t *cfg, snd_config_t *top)
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{
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long mclk_policy_override;
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long mclk_always_running;
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long mclk_starts_on_gtw_init;
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long mclk_starts_on_run;
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long mclk_starts_on_pause;
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long mclk_stops_on_pause;
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long mclk_stops_on_reset;
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long bclk_policy_override;
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long bclk_always_running;
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long bclk_starts_on_gtw_init;
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long bclk_starts_on_run;
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long bclk_starts_on_pause;
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long bclk_stops_on_pause;
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long bclk_stops_on_reset;
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long sync_policy_override;
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long sync_always_running;
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long sync_starts_on_gtw_init;
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long sync_starts_on_run;
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long sync_starts_on_pause;
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long sync_stops_on_pause;
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long sync_stops_on_reset;
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long ret;
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struct dai_values ssp_ext_data[] = {
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{"mclk_policy_override", SND_CONFIG_TYPE_INTEGER, NULL, &mclk_policy_override, NULL},
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{"mclk_always_running", SND_CONFIG_TYPE_INTEGER, NULL, &mclk_always_running, NULL},
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{"mclk_starts_on_gtw_init", SND_CONFIG_TYPE_INTEGER, NULL, &mclk_starts_on_gtw_init, NULL},
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{"mclk_starts_on_run", SND_CONFIG_TYPE_INTEGER, NULL, &mclk_starts_on_run, NULL},
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{"mclk_starts_on_pause", SND_CONFIG_TYPE_INTEGER, NULL, &mclk_starts_on_pause, NULL},
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{"mclk_stops_on_pause", SND_CONFIG_TYPE_INTEGER, NULL, &mclk_stops_on_pause, NULL},
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{"mclk_stops_on_reset", SND_CONFIG_TYPE_INTEGER, NULL, &mclk_stops_on_reset, NULL},
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{"bclk_policy_override", SND_CONFIG_TYPE_INTEGER, NULL, &bclk_policy_override, NULL},
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{"bclk_always_running", SND_CONFIG_TYPE_INTEGER, NULL, &bclk_always_running, NULL},
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{"bclk_starts_on_gtw_init", SND_CONFIG_TYPE_INTEGER, NULL, &bclk_starts_on_gtw_init, NULL},
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{"bclk_starts_on_run", SND_CONFIG_TYPE_INTEGER, NULL, &bclk_starts_on_run, NULL},
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{"bclk_starts_on_pause", SND_CONFIG_TYPE_INTEGER, NULL, &bclk_starts_on_pause, NULL},
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{"bclk_stops_on_pause", SND_CONFIG_TYPE_INTEGER, NULL, &bclk_stops_on_pause, NULL},
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{"bclk_stops_on_reset", SND_CONFIG_TYPE_INTEGER, NULL, &bclk_stops_on_reset, NULL},
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{"sync_policy_override", SND_CONFIG_TYPE_INTEGER, NULL, &sync_policy_override, NULL},
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{"sync_always_running", SND_CONFIG_TYPE_INTEGER, NULL, &sync_always_running, NULL},
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{"sync_starts_on_gtw_init", SND_CONFIG_TYPE_INTEGER, NULL, &sync_starts_on_gtw_init, NULL},
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{"sync_starts_on_run", SND_CONFIG_TYPE_INTEGER, NULL, &sync_starts_on_run, NULL},
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{"sync_starts_on_pause", SND_CONFIG_TYPE_INTEGER, NULL, &sync_starts_on_pause, NULL},
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{"sync_stops_on_pause", SND_CONFIG_TYPE_INTEGER, NULL, &sync_stops_on_pause, NULL},
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{"sync_stops_on_reset", SND_CONFIG_TYPE_INTEGER, NULL, &sync_stops_on_reset, NULL},
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};
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ret = find_set_values(&ssp_ext_data[0], ARRAY_SIZE(ssp_ext_data), cfg, top,
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"Class.Base.ext_config");
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if (ret < 0)
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return ret;
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return ssp_ext_set_params(nhlt, mclk_policy_override, mclk_always_running,
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mclk_starts_on_gtw_init, mclk_starts_on_run, mclk_starts_on_pause,
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mclk_stops_on_pause, mclk_stops_on_reset,
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bclk_policy_override, bclk_always_running,
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bclk_starts_on_gtw_init, bclk_starts_on_run, bclk_starts_on_pause,
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bclk_stops_on_pause, bclk_stops_on_reset,
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sync_policy_override, sync_always_running,
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sync_starts_on_gtw_init, sync_starts_on_run, sync_starts_on_pause,
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sync_stops_on_pause, sync_stops_on_reset);
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}
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static int set_link_config(struct intel_nhlt_params *nhlt, snd_config_t *cfg, snd_config_t *top)
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{
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long clock_source;
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long ret;
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struct dai_values ssp_link_data[] = {
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{"clock_source", SND_CONFIG_TYPE_INTEGER, NULL, &clock_source, NULL},
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};
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ret = find_set_values(&ssp_link_data[0], ARRAY_SIZE(ssp_link_data), cfg, top,
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"Class.Base.link_config");
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if (ret < 0)
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return ret;
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return ssp_link_set_params(nhlt, clock_source);
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}
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static int set_aux_params(struct intel_nhlt_params *nhlt, snd_config_t *cfg, snd_config_t *top)
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{
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struct aux_map {
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const char *name;
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int id;
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};
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struct aux_map aux_maps[] = {
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{ "Object.Base.mn_config", SSP_MN_DIVIDER_CONTROLS },
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{"Object.Base.clk_config", SSP_DMA_CLK_CONTROLS },
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{"Object.Base.tr_start_config", SSP_DMA_TRANSMISSION_START },
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{"Object.Base.tr_stop_config", SSP_DMA_TRANSMISSION_STOP },
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{"Object.Base.run_config", SSP_DMA_ALWAYS_RUNNING_MODE} ,
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{"Object.Base.sync_config", SSP_DMA_SYNC_DATA },
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{"Object.Base.ext_config", SSP_DMA_CLK_CONTROLS_EXT },
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{"Object.Base.link_config", SSP_LINK_CLK_SOURCE },
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{"Object.Base.node_config", SSP_DMA_SYNC_NODE },
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};
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snd_config_iterator_t iter, next;
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snd_config_t *items, *n;
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const char *id;
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unsigned int i;
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int ret = 0;
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for (i = 0; i < ARRAY_SIZE(aux_maps); i++) {
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if (snd_config_search(cfg, aux_maps[i].name, &items) < 0)
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continue;
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snd_config_for_each(iter, next, items) {
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n = snd_config_iterator_entry(iter);
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if (snd_config_get_id(n, &id) < 0)
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continue;
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switch(aux_maps[i].id) {
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case SSP_MN_DIVIDER_CONTROLS:
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ret = set_mn_config(nhlt, n, top);
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break;
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case SSP_DMA_CLK_CONTROLS:
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ret = set_clk_config(nhlt, n, top);
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break;
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case SSP_DMA_TRANSMISSION_START:
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ret = set_tr_start_config(nhlt, n, top);
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break;
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case SSP_DMA_TRANSMISSION_STOP:
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ret = set_tr_stop_config(nhlt, n, top);
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break;
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case SSP_DMA_ALWAYS_RUNNING_MODE:
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ret = set_run_config(nhlt, n, top);
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break;
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case SSP_DMA_SYNC_DATA:
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ret = set_sync_config(nhlt, n, top);
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break;
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case SSP_DMA_CLK_CONTROLS_EXT:
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ret = set_ext_config(nhlt, n, top);
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break;
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case SSP_LINK_CLK_SOURCE:
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ret = set_link_config(nhlt, n, top);
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break;
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case SSP_DMA_SYNC_NODE:
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ret = set_node_config(nhlt, n, top);
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break;
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default:
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ret = -EINVAL;
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}
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if (ret < 0)
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return ret;
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}
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}
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return ret;
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}
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static int set_hw_config(struct intel_nhlt_params *nhlt, snd_config_t *cfg, snd_config_t *top)
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{
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const char *format = NULL;
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const char *mclk = NULL;
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const char *bclk = NULL;
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const char *bclk_invert = NULL;
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const char *fsync = NULL;
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const char *fsync_invert = NULL;
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long mclk_freq = 0;
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long bclk_freq = 0;
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long fsync_freq = 0;
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long tdm_slots = 0;
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long tdm_slot_width = 0;
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long tx_slots = 0;
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long rx_slots = 0;
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long ret;
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struct dai_values ssp_hw_data[] = {
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{"format", SND_CONFIG_TYPE_STRING, NULL, NULL, &format},
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{"mclk", SND_CONFIG_TYPE_STRING, NULL, NULL, &mclk},
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{"bclk", SND_CONFIG_TYPE_STRING, NULL, NULL, &bclk},
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{"fsync", SND_CONFIG_TYPE_STRING, NULL, NULL, &fsync},
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{"bclk_invert", SND_CONFIG_TYPE_STRING, NULL, NULL, &bclk_invert},
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{"fsync_invert", SND_CONFIG_TYPE_STRING, NULL, NULL, &fsync_invert},
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{"fsync_freq", SND_CONFIG_TYPE_INTEGER, NULL, &fsync_freq, NULL},
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{"bclk_freq", SND_CONFIG_TYPE_INTEGER, NULL, &bclk_freq, NULL},
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{"mclk_freq", SND_CONFIG_TYPE_INTEGER, NULL, &mclk_freq, NULL},
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{"tdm_slots", SND_CONFIG_TYPE_INTEGER, NULL, &tdm_slots, NULL},
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{"tdm_slot_width", SND_CONFIG_TYPE_INTEGER, NULL, &tdm_slot_width, NULL},
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{"tx_slots", SND_CONFIG_TYPE_INTEGER, NULL, &tx_slots, NULL},
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{"rx_slots", SND_CONFIG_TYPE_INTEGER, NULL, &rx_slots, NULL},
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};
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ret = find_set_values(&ssp_hw_data[0], ARRAY_SIZE(ssp_hw_data), cfg, top,
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"Class.Base.hw_config");
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if (ret < 0)
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return ret;
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ret = set_aux_params(nhlt, cfg, top);
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if (ret < 0)
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return ret;
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return ssp_hw_set_params(nhlt, format, mclk, bclk, bclk_invert, fsync, fsync_invert,
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mclk_freq, bclk_freq, fsync_freq, tdm_slots, tdm_slot_width,
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tx_slots, rx_slots);
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}
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static int set_ssp_data(struct intel_nhlt_params *nhlt, snd_config_t *dai_cfg, snd_config_t *top)
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{
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const char *tdm_padding_per_slot = NULL;
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const char *direction = NULL;
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const char *quirks = NULL;
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long frame_pulse_width = 0;
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long clks_control = 0;
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long sample_bits = 0;
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long bclk_delay = 0;
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long version = 0;
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long dai_index = 0;
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long mclk_id = 0;
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long io_clk = 0;
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int ret;
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|
struct dai_values ssp_data[] = {
|
|
{ "io_clk", SND_CONFIG_TYPE_INTEGER, NULL, &io_clk, NULL},
|
|
{ "direction", SND_CONFIG_TYPE_STRING, NULL, NULL, &direction},
|
|
{ "quirks", SND_CONFIG_TYPE_STRING, NULL, NULL, &quirks},
|
|
{ "dai_index", SND_CONFIG_TYPE_INTEGER, NULL, &dai_index, NULL},
|
|
{ "sample_bits", SND_CONFIG_TYPE_INTEGER, NULL, &sample_bits, NULL},
|
|
{ "bclk_delay", SND_CONFIG_TYPE_INTEGER, NULL, &bclk_delay, NULL},
|
|
{ "mclk_id", SND_CONFIG_TYPE_INTEGER, NULL, &mclk_id, NULL},
|
|
{ "clks_control", SND_CONFIG_TYPE_INTEGER, NULL, &clks_control, NULL},
|
|
{ "frame_pulse_width", SND_CONFIG_TYPE_INTEGER, NULL, &frame_pulse_width, NULL},
|
|
{ "tdm_padding_per_slot", SND_CONFIG_TYPE_STRING, NULL, NULL,
|
|
&tdm_padding_per_slot},
|
|
{ "version", SND_CONFIG_TYPE_INTEGER, NULL, &version, NULL},
|
|
};
|
|
|
|
ret = find_set_values(&ssp_data[0], ARRAY_SIZE(ssp_data), dai_cfg, top, "Class.Dai.SSP");
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
return ssp_set_params(nhlt, direction, dai_index, io_clk, bclk_delay, sample_bits, mclk_id,
|
|
clks_control, frame_pulse_width, tdm_padding_per_slot, quirks,
|
|
version);
|
|
}
|
|
|
|
/* init ssp parameters, should be called before parsing dais */
|
|
int nhlt_ssp_init_params(struct intel_nhlt_params *nhlt)
|
|
{
|
|
return ssp_init_params(nhlt);
|
|
}
|
|
|
|
int nhlt_ssp_get_ep_count(struct intel_nhlt_params *nhlt)
|
|
{
|
|
return ssp_get_vendor_blob_count(nhlt);
|
|
}
|
|
|
|
int nhlt_ssp_get_dir(struct intel_nhlt_params *nhlt, int dai_index, uint8_t *dir)
|
|
{
|
|
return ssp_get_dir(nhlt, dai_index, dir);
|
|
}
|
|
|
|
int nhlt_ssp_get_ep(struct intel_nhlt_params *nhlt, struct endpoint_descriptor **eps,
|
|
int dai_index, uint8_t dir)
|
|
{
|
|
struct endpoint_descriptor ep;
|
|
struct ssp_device_specific_config ssp_conf;
|
|
struct formats_config f_conf;
|
|
struct format_config f_conf1[8];
|
|
uint32_t sample_rate;
|
|
uint16_t channel_count;
|
|
uint32_t bits_per_sample;
|
|
uint32_t virtualbus_id;
|
|
uint32_t formats_count;
|
|
uint32_t device_type;
|
|
uint32_t direction = dir;
|
|
uint8_t *ep_target;
|
|
size_t blob_size;
|
|
int ret;
|
|
int i;
|
|
|
|
/*
|
|
* nhlt ssp structure:
|
|
*
|
|
* endpoint_descriptor, sizeof(struct endpoint_descriptor)
|
|
* device_specific_config (headset), sizeof(struct ssp_device_specific_config)
|
|
* formats_config (formats_count), sizeof(struct formats_config)
|
|
* format_config (waveex), sizeof(struct format_config)
|
|
* vendor_blob sizeof(vendor_blob)
|
|
*/
|
|
|
|
ret = ssp_get_params(nhlt, dai_index, &virtualbus_id, &formats_count,
|
|
&device_type, &direction);
|
|
if (ret < 0) {
|
|
fprintf(stderr, "nhlt_ssp_get_ep: ssp_get_params failed\n");
|
|
return ret;
|
|
}
|
|
|
|
ep.link_type = NHLT_LINK_TYPE_SSP;
|
|
ep.instance_id = 0;
|
|
ep.vendor_id = NHLT_VENDOR_ID_INTEL;
|
|
ep.device_id = NHLT_DEVICE_ID_INTEL_I2S_TDM;
|
|
ep.revision_id = 0;
|
|
ep.subsystem_id = 0;
|
|
ep.device_type = device_type;
|
|
|
|
ep.direction = direction;
|
|
/* ssp device index */
|
|
ep.virtualbus_id = virtualbus_id;
|
|
/* ssp config */
|
|
ssp_conf.config.capabilities_size = 2;
|
|
ssp_conf.device_config.virtual_slot = 0;
|
|
ssp_conf.device_config.config_type = 0;
|
|
|
|
/* formats_config */
|
|
f_conf.formats_count = formats_count;
|
|
|
|
for (i = 0; i < f_conf.formats_count; i++) {
|
|
/* fill in wave format extensible types */
|
|
f_conf1[i].format.wFormatTag = 0xFFFE;
|
|
|
|
ret = ssp_get_hw_params(nhlt, dai_index, i, &sample_rate, &channel_count,
|
|
&bits_per_sample);
|
|
|
|
if (ret < 0) {
|
|
fprintf(stderr, "nhlt_ssp_get_ep: ssp_get_hw_params failed\n");
|
|
return ret;
|
|
}
|
|
|
|
f_conf1[i].format.nChannels = channel_count;
|
|
f_conf1[i].format.nSamplesPerSec = sample_rate;
|
|
f_conf1[i].format.wBitsPerSample = bits_per_sample;
|
|
f_conf1[i].format.nBlockAlign = channel_count * bits_per_sample / 8;
|
|
f_conf1[i].format.nAvgBytesPerSec = sample_rate * f_conf1[i].format.nBlockAlign;
|
|
|
|
/* bytes after this value in this struct */
|
|
f_conf1[i].format.cbSize = 22;
|
|
/* actual bits in container */
|
|
f_conf1[i].format.wValidBitsPerSample = bits_per_sample;
|
|
/* channel map not used at this time */
|
|
f_conf1[i].format.dwChannelMask = 0;
|
|
/* WAVE_FORMAT_PCM guid (0x0001) ? */
|
|
f_conf1[i].format.SubFormat[0] = 0;
|
|
f_conf1[i].format.SubFormat[1] = 0;
|
|
f_conf1[i].format.SubFormat[2] = 0;
|
|
f_conf1[i].format.SubFormat[3] = 0;
|
|
|
|
ret = ssp_get_vendor_blob_size(nhlt, dai_index, i, &blob_size);
|
|
if (ret < 0) {
|
|
fprintf(stderr, "nhlt_ssp_get_ep: dmic_get_vendor_blob_size failed\n");
|
|
return ret;
|
|
}
|
|
f_conf1[i].vendor_blob.capabilities_size = blob_size;
|
|
}
|
|
|
|
ep.length = sizeof(struct endpoint_descriptor) +
|
|
sizeof(struct ssp_device_specific_config) +
|
|
sizeof(struct formats_config) +
|
|
sizeof(struct format_config) * f_conf.formats_count +
|
|
blob_size * f_conf.formats_count;
|
|
|
|
/* allocate the final variable length ep struct */
|
|
ep_target = calloc(ep.length, sizeof(uint8_t));
|
|
if (!ep_target)
|
|
return -ENOMEM;
|
|
|
|
*eps = (struct endpoint_descriptor *)ep_target;
|
|
|
|
/* copy all parsed sub arrays into the top level array */
|
|
memcpy(ep_target, &ep, sizeof(struct endpoint_descriptor));
|
|
|
|
ep_target += sizeof(struct endpoint_descriptor);
|
|
|
|
memcpy(ep_target, &ssp_conf, sizeof(struct ssp_device_specific_config));
|
|
ep_target += sizeof(struct ssp_device_specific_config);
|
|
|
|
memcpy(ep_target, &f_conf, sizeof(struct formats_config));
|
|
ep_target += sizeof(struct formats_config);
|
|
|
|
/* copy all hw configs */
|
|
for (i = 0; i < f_conf.formats_count; i++) {
|
|
memcpy(ep_target, &f_conf1[i], sizeof(struct format_config));
|
|
ep_target += sizeof(struct format_config);
|
|
ret = ssp_get_vendor_blob(nhlt, ep_target, dai_index, i);
|
|
if (ret < 0) {
|
|
fprintf(stderr, "nhlt_sso_get_ep: ssp_get_vendor_blob failed\n");
|
|
return ret;
|
|
}
|
|
ep_target += blob_size;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Set ssp parameters from topology for ssp coefficient calculation.
|
|
*
|
|
* You can see an example of topology v2 config of ssp below. In this example the default
|
|
* object parameters are spelled out for clarity. General parameters like sample_bits are parsed
|
|
* with set_ssp_data and hw_config object data with set_hw_data. Ssp can have multiple hw_configs.
|
|
* Values are saved into intermediate structs and the vendor specific blob is calculated at the end
|
|
* of parsing with ssp_calculate.
|
|
*
|
|
* SSP."0" {
|
|
* id 0
|
|
* direction "duplex"
|
|
* name NoCodec-0
|
|
* io_clk 38400000
|
|
* default_hw_conf_id 0
|
|
* sample_bits 16
|
|
* quirks "lbm_mode"
|
|
* bclk_delay 0
|
|
* mclk_id 0
|
|
* clks_control 0
|
|
* frame_pulse_width 0
|
|
* tdm_padding_per_slot false
|
|
*
|
|
* Object.Base.hw_config."SSP0" {
|
|
* id 0
|
|
* mclk_freq 24576000
|
|
* bclk_freq 3072000
|
|
* tdm_slot_width 32
|
|
* format "I2S"
|
|
* mclk "codec_mclk_in"
|
|
* bclk "codec_consumer"
|
|
* fsync "codec_consumer"
|
|
* fsync_freq 48000
|
|
* tdm_slots 2
|
|
* tx_slots 3
|
|
* rx_slots 3
|
|
* }
|
|
* }
|
|
*/
|
|
int nhlt_ssp_set_params(struct intel_nhlt_params *nhlt, snd_config_t *cfg, snd_config_t *top)
|
|
{
|
|
snd_config_iterator_t i, next;
|
|
snd_config_t *items;
|
|
snd_config_t *n;
|
|
const char *id;
|
|
int ret;
|
|
|
|
ret = set_ssp_data(nhlt, cfg, top);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
ret = snd_config_search(cfg, "Object.Base.hw_config", &items);
|
|
if (ret < 0)
|
|
return ret;
|
|
|
|
snd_config_for_each(i, next, items) {
|
|
n = snd_config_iterator_entry(i);
|
|
|
|
if (snd_config_get_id(n, &id) < 0)
|
|
continue;
|
|
|
|
ret = set_hw_config(nhlt, n, top);
|
|
if (ret < 0)
|
|
return ret;
|
|
}
|
|
|
|
ret = ssp_calculate(nhlt);
|
|
|
|
return ret;
|
|
}
|