425 lines
12 KiB
C
425 lines
12 KiB
C
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#ifndef LINUX_SSB_H_
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#define LINUX_SSB_H_
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#include <linux/device.h>
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#include <linux/list.h>
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#include <linux/types.h>
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#include <linux/spinlock.h>
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#include <linux/pci.h>
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#include <linux/mod_devicetable.h>
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#include <linux/ssb/ssb_regs.h>
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struct pcmcia_device;
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struct ssb_bus;
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struct ssb_driver;
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struct ssb_sprom_r1 {
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u16 pci_spid; /* Subsystem Product ID for PCI */
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u16 pci_svid; /* Subsystem Vendor ID for PCI */
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u16 pci_pid; /* Product ID for PCI */
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u8 il0mac[6]; /* MAC address for 802.11b/g */
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u8 et0mac[6]; /* MAC address for Ethernet */
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u8 et1mac[6]; /* MAC address for 802.11a */
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u8 et0phyaddr:5; /* MII address for enet0 */
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u8 et1phyaddr:5; /* MII address for enet1 */
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u8 et0mdcport:1; /* MDIO for enet0 */
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u8 et1mdcport:1; /* MDIO for enet1 */
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u8 board_rev; /* Board revision */
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u8 country_code:4; /* Country Code */
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u8 antenna_a:2; /* Antenna 0/1 available for A-PHY */
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u8 antenna_bg:2; /* Antenna 0/1 available for B-PHY and G-PHY */
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u16 pa0b0;
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u16 pa0b1;
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u16 pa0b2;
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u16 pa1b0;
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u16 pa1b1;
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u16 pa1b2;
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u8 gpio0; /* GPIO pin 0 */
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u8 gpio1; /* GPIO pin 1 */
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u8 gpio2; /* GPIO pin 2 */
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u8 gpio3; /* GPIO pin 3 */
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u16 maxpwr_a; /* A-PHY Power Amplifier Max Power (in dBm Q5.2) */
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u16 maxpwr_bg; /* B/G-PHY Power Amplifier Max Power (in dBm Q5.2) */
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u8 itssi_a; /* Idle TSSI Target for A-PHY */
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u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */
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u16 boardflags_lo; /* Boardflags (low 16 bits) */
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u8 antenna_gain_a; /* A-PHY Antenna gain (in dBm Q5.2) */
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u8 antenna_gain_bg; /* B/G-PHY Antenna gain (in dBm Q5.2) */
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u8 oem[8]; /* OEM string (rev 1 only) */
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};
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struct ssb_sprom_r2 {
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u16 boardflags_hi; /* Boardflags (high 16 bits) */
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u8 maxpwr_a_lo; /* A-PHY Max Power Low */
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u8 maxpwr_a_hi; /* A-PHY Max Power High */
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u16 pa1lob0; /* A-PHY PA Low Settings */
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u16 pa1lob1; /* A-PHY PA Low Settings */
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u16 pa1lob2; /* A-PHY PA Low Settings */
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u16 pa1hib0; /* A-PHY PA High Settings */
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u16 pa1hib1; /* A-PHY PA High Settings */
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u16 pa1hib2; /* A-PHY PA High Settings */
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u8 ofdm_pwr_off; /* OFDM Power Offset from CCK Level */
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u8 country_str[2]; /* Two char Country Code */
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};
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struct ssb_sprom_r3 {
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u32 ofdmapo; /* A-PHY OFDM Mid Power Offset */
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u32 ofdmalpo; /* A-PHY OFDM Low Power Offset */
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u32 ofdmahpo; /* A-PHY OFDM High Power Offset */
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u8 gpioldc_on_cnt; /* GPIO LED Powersave Duty Cycle ON count */
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u8 gpioldc_off_cnt; /* GPIO LED Powersave Duty Cycle OFF count */
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u8 cckpo_1M:4; /* CCK Power Offset for Rate 1M */
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u8 cckpo_2M:4; /* CCK Power Offset for Rate 2M */
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u8 cckpo_55M:4; /* CCK Power Offset for Rate 5.5M */
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u8 cckpo_11M:4; /* CCK Power Offset for Rate 11M */
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u32 ofdmgpo; /* G-PHY OFDM Power Offset */
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};
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struct ssb_sprom_r4 {
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/* TODO */
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};
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struct ssb_sprom {
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u8 revision;
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u8 crc;
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/* The valid r# fields are selected by the "revision".
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* Revision 3 and lower inherit from lower revisions.
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*/
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union {
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struct {
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struct ssb_sprom_r1 r1;
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struct ssb_sprom_r2 r2;
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struct ssb_sprom_r3 r3;
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};
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struct ssb_sprom_r4 r4;
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};
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};
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/* Information about the PCB the circuitry is soldered on. */
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struct ssb_boardinfo {
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u16 vendor;
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u16 type;
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u16 rev;
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};
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struct ssb_device;
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/* Lowlevel read/write operations on the device MMIO.
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* Internal, don't use that outside of ssb. */
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struct ssb_bus_ops {
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u16 (*read16)(struct ssb_device *dev, u16 offset);
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u32 (*read32)(struct ssb_device *dev, u16 offset);
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void (*write16)(struct ssb_device *dev, u16 offset, u16 value);
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void (*write32)(struct ssb_device *dev, u16 offset, u32 value);
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};
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/* Core-ID values. */
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#define SSB_DEV_CHIPCOMMON 0x800
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#define SSB_DEV_ILINE20 0x801
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#define SSB_DEV_SDRAM 0x803
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#define SSB_DEV_PCI 0x804
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#define SSB_DEV_MIPS 0x805
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#define SSB_DEV_ETHERNET 0x806
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#define SSB_DEV_V90 0x807
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#define SSB_DEV_USB11_HOSTDEV 0x808
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#define SSB_DEV_ADSL 0x809
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#define SSB_DEV_ILINE100 0x80A
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#define SSB_DEV_IPSEC 0x80B
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#define SSB_DEV_PCMCIA 0x80D
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#define SSB_DEV_INTERNAL_MEM 0x80E
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#define SSB_DEV_MEMC_SDRAM 0x80F
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#define SSB_DEV_EXTIF 0x811
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#define SSB_DEV_80211 0x812
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#define SSB_DEV_MIPS_3302 0x816
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#define SSB_DEV_USB11_HOST 0x817
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#define SSB_DEV_USB11_DEV 0x818
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#define SSB_DEV_USB20_HOST 0x819
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#define SSB_DEV_USB20_DEV 0x81A
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#define SSB_DEV_SDIO_HOST 0x81B
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#define SSB_DEV_ROBOSWITCH 0x81C
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#define SSB_DEV_PARA_ATA 0x81D
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#define SSB_DEV_SATA_XORDMA 0x81E
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#define SSB_DEV_ETHERNET_GBIT 0x81F
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#define SSB_DEV_PCIE 0x820
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#define SSB_DEV_MIMO_PHY 0x821
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#define SSB_DEV_SRAM_CTRLR 0x822
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#define SSB_DEV_MINI_MACPHY 0x823
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#define SSB_DEV_ARM_1176 0x824
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#define SSB_DEV_ARM_7TDMI 0x825
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/* Vendor-ID values */
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#define SSB_VENDOR_BROADCOM 0x4243
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/* Some kernel subsystems poke with dev->drvdata, so we must use the
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* following ugly workaround to get from struct device to struct ssb_device */
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struct __ssb_dev_wrapper {
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struct device dev;
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struct ssb_device *sdev;
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};
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struct ssb_device {
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/* Having a copy of the ops pointer in each dev struct
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* is an optimization. */
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const struct ssb_bus_ops *ops;
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struct device *dev;
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struct ssb_bus *bus;
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struct ssb_device_id id;
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u8 core_index;
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unsigned int irq;
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/* Internal-only stuff follows. */
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void *drvdata; /* Per-device data */
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void *devtypedata; /* Per-devicetype (eg 802.11) data */
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};
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/* Go from struct device to struct ssb_device. */
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static inline
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struct ssb_device * dev_to_ssb_dev(struct device *dev)
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{
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struct __ssb_dev_wrapper *wrap;
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wrap = container_of(dev, struct __ssb_dev_wrapper, dev);
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return wrap->sdev;
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}
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/* Device specific user data */
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static inline
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void ssb_set_drvdata(struct ssb_device *dev, void *data)
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{
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dev->drvdata = data;
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}
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static inline
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void * ssb_get_drvdata(struct ssb_device *dev)
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{
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return dev->drvdata;
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}
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/* Devicetype specific user data. This is per device-type (not per device) */
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void ssb_set_devtypedata(struct ssb_device *dev, void *data);
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static inline
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void * ssb_get_devtypedata(struct ssb_device *dev)
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{
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return dev->devtypedata;
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}
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struct ssb_driver {
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const char *name;
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const struct ssb_device_id *id_table;
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int (*probe)(struct ssb_device *dev, const struct ssb_device_id *id);
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void (*remove)(struct ssb_device *dev);
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int (*suspend)(struct ssb_device *dev, pm_message_t state);
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int (*resume)(struct ssb_device *dev);
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void (*shutdown)(struct ssb_device *dev);
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struct device_driver drv;
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};
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#define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
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extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
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static inline int ssb_driver_register(struct ssb_driver *drv)
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{
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return __ssb_driver_register(drv, THIS_MODULE);
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}
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extern void ssb_driver_unregister(struct ssb_driver *drv);
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enum ssb_bustype {
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SSB_BUSTYPE_SSB, /* This SSB bus is the system bus */
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SSB_BUSTYPE_PCI, /* SSB is connected to PCI bus */
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SSB_BUSTYPE_PCMCIA, /* SSB is connected to PCMCIA bus */
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};
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/* board_vendor */
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#define SSB_BOARDVENDOR_BCM 0x14E4 /* Broadcom */
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#define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */
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#define SSB_BOARDVENDOR_HP 0x0E11 /* HP */
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/* board_type */
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#define SSB_BOARD_BCM94306MP 0x0418
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#define SSB_BOARD_BCM4309G 0x0421
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#define SSB_BOARD_BCM4306CB 0x0417
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#define SSB_BOARD_BCM4309MP 0x040C
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#define SSB_BOARD_MP4318 0x044A
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#define SSB_BOARD_BU4306 0x0416
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#define SSB_BOARD_BU4309 0x040A
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/* chip_package */
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#define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */
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#define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */
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#define SSB_CHIPPACK_BCM4712L 0 /* Large 340pin 4712 */
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#include <linux/ssb/ssb_driver_chipcommon.h>
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#include <linux/ssb/ssb_driver_mips.h>
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#include <linux/ssb/ssb_driver_extif.h>
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#include <linux/ssb/ssb_driver_pci.h>
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struct ssb_bus {
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/* The MMIO area. */
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void __iomem *mmio;
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const struct ssb_bus_ops *ops;
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/* The core in the basic address register window. (PCI bus only) */
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struct ssb_device *mapped_device;
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/* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
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u8 mapped_pcmcia_seg;
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/* Lock for core and segment switching. */
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spinlock_t bar_lock;
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/* The bus this backplane is running on. */
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enum ssb_bustype bustype;
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/* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */
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struct pci_dev *host_pci;
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/* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */
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struct pcmcia_device *host_pcmcia;
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#ifdef CONFIG_SSB_PCIHOST
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/* Mutex to protect the SPROM writing. */
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struct mutex pci_sprom_mutex;
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#endif
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/* ID information about the Chip. */
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u16 chip_id;
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u16 chip_rev;
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u8 chip_package;
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/* List of devices (cores) on the backplane. */
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struct ssb_device devices[SSB_MAX_NR_CORES];
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u8 nr_devices;
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/* Reference count. Number of suspended devices. */
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u8 suspend_cnt;
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/* Software ID number for this bus. */
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unsigned int busnumber;
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/* The ChipCommon device (if available). */
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struct ssb_chipcommon chipco;
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/* The PCI-core device (if available). */
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struct ssb_pcicore pcicore;
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/* The MIPS-core device (if available). */
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struct ssb_mipscore mipscore;
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/* The EXTif-core device (if available). */
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struct ssb_extif extif;
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/* The following structure elements are not available in early
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* SSB initialization. Though, they are available for regular
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* registered drivers at any stage. So be careful when
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* using them in the ssb core code. */
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/* ID information about the PCB. */
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struct ssb_boardinfo boardinfo;
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/* Contents of the SPROM. */
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struct ssb_sprom sprom;
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/* Internal-only stuff follows. Do not touch. */
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struct list_head list;
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#ifdef CONFIG_SSB_DEBUG
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/* Is the bus already powered up? */
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bool powered_up;
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int power_warn_count;
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#endif /* DEBUG */
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};
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/* The initialization-invariants. */
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struct ssb_init_invariants {
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struct ssb_boardinfo boardinfo;
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struct ssb_sprom sprom;
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};
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/* Type of function to fetch the invariants. */
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typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus,
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struct ssb_init_invariants *iv);
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/* Register a SSB system bus. get_invariants() is called after the
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* basic system devices are initialized.
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* The invariants are usually fetched from some NVRAM.
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* Put the invariants into the struct pointed to by iv. */
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extern int ssb_bus_ssbbus_register(struct ssb_bus *bus,
|
||
|
|
unsigned long baseaddr,
|
||
|
|
ssb_invariants_func_t get_invariants);
|
||
|
|
#ifdef CONFIG_SSB_PCIHOST
|
||
|
|
extern int ssb_bus_pcibus_register(struct ssb_bus *bus,
|
||
|
|
struct pci_dev *host_pci);
|
||
|
|
#endif /* CONFIG_SSB_PCIHOST */
|
||
|
|
#ifdef CONFIG_SSB_PCMCIAHOST
|
||
|
|
extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
|
||
|
|
struct pcmcia_device *pcmcia_dev,
|
||
|
|
unsigned long baseaddr);
|
||
|
|
#endif /* CONFIG_SSB_PCMCIAHOST */
|
||
|
|
|
||
|
|
extern void ssb_bus_unregister(struct ssb_bus *bus);
|
||
|
|
|
||
|
|
extern u32 ssb_clockspeed(struct ssb_bus *bus);
|
||
|
|
|
||
|
|
/* Is the device enabled in hardware? */
|
||
|
|
int ssb_device_is_enabled(struct ssb_device *dev);
|
||
|
|
/* Enable a device and pass device-specific SSB_TMSLOW flags.
|
||
|
|
* If no device-specific flags are available, use 0. */
|
||
|
|
void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags);
|
||
|
|
/* Disable a device in hardware and pass SSB_TMSLOW flags (if any). */
|
||
|
|
void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags);
|
||
|
|
|
||
|
|
|
||
|
|
/* Device MMIO register read/write functions. */
|
||
|
|
static inline u16 ssb_read16(struct ssb_device *dev, u16 offset)
|
||
|
|
{
|
||
|
|
return dev->ops->read16(dev, offset);
|
||
|
|
}
|
||
|
|
static inline u32 ssb_read32(struct ssb_device *dev, u16 offset)
|
||
|
|
{
|
||
|
|
return dev->ops->read32(dev, offset);
|
||
|
|
}
|
||
|
|
static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
|
||
|
|
{
|
||
|
|
dev->ops->write16(dev, offset, value);
|
||
|
|
}
|
||
|
|
static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
|
||
|
|
{
|
||
|
|
dev->ops->write32(dev, offset, value);
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
/* Translation (routing) bits that need to be ORed to DMA
|
||
|
|
* addresses before they are given to a device. */
|
||
|
|
extern u32 ssb_dma_translation(struct ssb_device *dev);
|
||
|
|
#define SSB_DMA_TRANSLATION_MASK 0xC0000000
|
||
|
|
#define SSB_DMA_TRANSLATION_SHIFT 30
|
||
|
|
|
||
|
|
extern int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask);
|
||
|
|
|
||
|
|
|
||
|
|
#ifdef CONFIG_SSB_PCIHOST
|
||
|
|
/* PCI-host wrapper driver */
|
||
|
|
extern int ssb_pcihost_register(struct pci_driver *driver);
|
||
|
|
static inline void ssb_pcihost_unregister(struct pci_driver *driver)
|
||
|
|
{
|
||
|
|
pci_unregister_driver(driver);
|
||
|
|
}
|
||
|
|
#endif /* CONFIG_SSB_PCIHOST */
|
||
|
|
|
||
|
|
|
||
|
|
/* If a driver is shutdown or suspended, call this to signal
|
||
|
|
* that the bus may be completely powered down. SSB will decide,
|
||
|
|
* if it's really time to power down the bus, based on if there
|
||
|
|
* are other devices that want to run. */
|
||
|
|
extern int ssb_bus_may_powerdown(struct ssb_bus *bus);
|
||
|
|
/* Before initializing and enabling a device, call this to power-up the bus.
|
||
|
|
* If you want to allow use of dynamic-power-control, pass the flag.
|
||
|
|
* Otherwise static always-on powercontrol will be used. */
|
||
|
|
extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
|
||
|
|
|
||
|
|
|
||
|
|
/* Various helper functions */
|
||
|
|
extern u32 ssb_admatch_base(u32 adm);
|
||
|
|
extern u32 ssb_admatch_size(u32 adm);
|
||
|
|
|
||
|
|
|
||
|
|
#endif /* LINUX_SSB_H_ */
|