75 lines
1.9 KiB
C
75 lines
1.9 KiB
C
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* This file contains NUMA specific prototypes and definitions.
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*
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* 2002/08/05 Erich Focht <efocht@ess.nec.de>
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*
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*/
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#ifndef _ASM_IA64_NUMA_H
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#define _ASM_IA64_NUMA_H
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#include <linux/config.h>
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#ifdef CONFIG_NUMA
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#include <linux/cache.h>
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#include <linux/cpumask.h>
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#include <linux/numa.h>
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#include <linux/smp.h>
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#include <linux/threads.h>
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#include <asm/mmzone.h>
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extern u8 cpu_to_node_map[NR_CPUS] __cacheline_aligned;
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extern cpumask_t node_to_cpu_mask[MAX_NUMNODES] __cacheline_aligned;
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/* Stuff below this line could be architecture independent */
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extern int num_node_memblks; /* total number of memory chunks */
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/*
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* List of node memory chunks. Filled when parsing SRAT table to
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* obtain information about memory nodes.
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*/
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struct node_memblk_s {
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unsigned long start_paddr;
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unsigned long size;
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int nid; /* which logical node contains this chunk? */
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int bank; /* which mem bank on this node */
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};
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struct node_cpuid_s {
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u16 phys_id; /* id << 8 | eid */
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int nid; /* logical node containing this CPU */
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};
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extern struct node_memblk_s node_memblk[NR_NODE_MEMBLKS];
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extern struct node_cpuid_s node_cpuid[NR_CPUS];
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/*
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* ACPI 2.0 SLIT (System Locality Information Table)
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* http://devresource.hp.com/devresource/Docs/TechPapers/IA64/slit.pdf
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*
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* This is a matrix with "distances" between nodes, they should be
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* proportional to the memory access latency ratios.
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*/
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extern u8 numa_slit[MAX_NUMNODES * MAX_NUMNODES];
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#define node_distance(from,to) (numa_slit[(from) * num_online_nodes() + (to)])
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extern int paddr_to_nid(unsigned long paddr);
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#define local_nodeid (cpu_to_node_map[smp_processor_id()])
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#else /* !CONFIG_NUMA */
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#define paddr_to_nid(addr) 0
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#endif /* CONFIG_NUMA */
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#endif /* _ASM_IA64_NUMA_H */
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