2007-02-11 18:31:01 +01:00
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/* linux/arch/arm/mach-s3c2412/mach-vstms.c
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2006-09-20 21:32:33 +02:00
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*
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* (C) 2006 Thomas Gleixner <tglx@linutronix.de>
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*
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* Derived from mach-smdk2413.c - (C) 2006 Simtec Electronics
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/timer.h>
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#include <linux/init.h>
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2006-12-17 23:22:26 +01:00
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#include <linux/serial_core.h>
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2006-09-20 21:32:33 +02:00
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#include <linux/platform_device.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/nand_ecc.h>
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#include <linux/mtd/partitions.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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#include <asm/hardware.h>
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#include <asm/setup.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/mach-types.h>
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2007-07-22 17:05:25 +02:00
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#include <asm/plat-s3c/regs-serial.h>
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2006-09-20 21:32:33 +02:00
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#include <asm/arch/regs-gpio.h>
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#include <asm/arch/regs-lcd.h>
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#include <asm/arch/idle.h>
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#include <asm/arch/fb.h>
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2007-07-22 17:05:25 +02:00
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#include <asm/plat-s3c/nand.h>
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2006-09-20 21:32:33 +02:00
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2007-02-11 18:31:01 +01:00
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#include <asm/plat-s3c24xx/s3c2410.h>
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#include <asm/plat-s3c24xx/s3c2412.h>
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#include <asm/plat-s3c24xx/clock.h>
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#include <asm/plat-s3c24xx/devs.h>
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#include <asm/plat-s3c24xx/cpu.h>
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2006-09-20 21:32:33 +02:00
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static struct map_desc vstms_iodesc[] __initdata = {
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};
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static struct s3c2410_uartcfg vstms_uartcfgs[] __initdata = {
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[0] = {
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.hwport = 0,
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.flags = 0,
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.ucon = 0x3c5,
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.ulcon = 0x03,
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.ufcon = 0x51,
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},
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[1] = {
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.hwport = 1,
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.flags = 0,
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.ucon = 0x3c5,
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.ulcon = 0x03,
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.ufcon = 0x51,
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},
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[2] = {
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.hwport = 2,
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.flags = 0,
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.ucon = 0x3c5,
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.ulcon = 0x03,
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.ufcon = 0x51,
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}
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};
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static struct mtd_partition vstms_nand_part[] = {
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[0] = {
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.name = "Boot Agent",
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.size = 0x7C000,
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.offset = 0,
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},
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[1] = {
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.name = "UBoot Config",
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.offset = 0x7C000,
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.size = 0x4000,
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},
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[2] = {
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.name = "Kernel",
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.offset = 0x80000,
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.size = 0x200000,
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},
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[3] = {
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.name = "RFS",
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.offset = 0x280000,
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.size = 0x3d80000,
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},
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};
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static struct s3c2410_nand_set vstms_nand_sets[] = {
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[0] = {
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.name = "NAND",
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.nr_chips = 1,
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.nr_partitions = ARRAY_SIZE(vstms_nand_part),
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.partitions = vstms_nand_part,
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},
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};
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/* choose a set of timings which should suit most 512Mbit
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* chips and beyond.
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*/
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static struct s3c2410_platform_nand vstms_nand_info = {
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.tacls = 20,
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.twrph0 = 60,
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.twrph1 = 20,
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.nr_sets = ARRAY_SIZE(vstms_nand_sets),
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.sets = vstms_nand_sets,
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};
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static struct platform_device *vstms_devices[] __initdata = {
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&s3c_device_usb,
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&s3c_device_wdt,
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&s3c_device_i2c,
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&s3c_device_iis,
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&s3c_device_rtc,
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&s3c_device_nand,
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};
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static void __init vstms_fixup(struct machine_desc *desc,
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struct tag *tags, char **cmdline,
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struct meminfo *mi)
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{
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if (tags != phys_to_virt(S3C2410_SDRAM_PA + 0x100)) {
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mi->nr_banks=1;
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mi->bank[0].start = 0x30000000;
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mi->bank[0].size = SZ_64M;
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mi->bank[0].node = 0;
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}
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}
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static void __init vstms_map_io(void)
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{
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s3c_device_nand.dev.platform_data = &vstms_nand_info;
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s3c24xx_init_io(vstms_iodesc, ARRAY_SIZE(vstms_iodesc));
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s3c24xx_init_clocks(12000000);
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s3c24xx_init_uarts(vstms_uartcfgs, ARRAY_SIZE(vstms_uartcfgs));
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2007-04-20 12:19:16 +02:00
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}
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static void __init vstms_init(void)
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{
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platform_add_devices(vstms_devices, ARRAY_SIZE(vstms_devices));
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2006-09-20 21:32:33 +02:00
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}
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MACHINE_START(VSTMS, "VSTMS")
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.phys_io = S3C2410_PA_UART,
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.io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc,
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.boot_params = S3C2410_SDRAM_PA + 0x100,
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.fixup = vstms_fixup,
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.init_irq = s3c24xx_init_irq,
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2007-04-20 12:19:16 +02:00
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.init_machine = vstms_init,
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2006-09-20 21:32:33 +02:00
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.map_io = vstms_map_io,
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.timer = &s3c24xx_timer,
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MACHINE_END
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