2005-04-17 00:20:36 +02:00
|
|
|
#ifndef __x8664_PCI_H
|
|
|
|
#define __x8664_PCI_H
|
|
|
|
|
|
|
|
#include <asm/io.h>
|
|
|
|
|
|
|
|
#ifdef __KERNEL__
|
|
|
|
|
|
|
|
#include <linux/mm.h> /* for struct page */
|
|
|
|
|
|
|
|
/* Can be used to override the logic in pci_scan_bus for skipping
|
|
|
|
already-configured bus numbers - to be used for buggy BIOSes
|
|
|
|
or architectures with incomplete PCI setup by the loader */
|
|
|
|
|
|
|
|
#ifdef CONFIG_PCI
|
|
|
|
extern unsigned int pcibios_assign_all_busses(void);
|
|
|
|
#else
|
|
|
|
#define pcibios_assign_all_busses() 0
|
|
|
|
#endif
|
|
|
|
#define pcibios_scan_all_fns(a, b) 0
|
|
|
|
|
|
|
|
extern unsigned long pci_mem_start;
|
2005-08-15 03:21:30 +02:00
|
|
|
#define PCIBIOS_MIN_IO 0x1000
|
2005-04-17 00:20:36 +02:00
|
|
|
#define PCIBIOS_MIN_MEM (pci_mem_start)
|
|
|
|
|
2005-08-15 03:21:30 +02:00
|
|
|
#define PCIBIOS_MIN_CARDBUS_IO 0x4000
|
|
|
|
|
2005-04-17 00:20:36 +02:00
|
|
|
void pcibios_config_init(void);
|
|
|
|
struct pci_bus * pcibios_scan_root(int bus);
|
|
|
|
extern int (*pci_config_read)(int seg, int bus, int dev, int fn, int reg, int len, u32 *value);
|
|
|
|
extern int (*pci_config_write)(int seg, int bus, int dev, int fn, int reg, int len, u32 value);
|
|
|
|
|
|
|
|
void pcibios_set_master(struct pci_dev *dev);
|
2005-04-01 07:07:31 +02:00
|
|
|
void pcibios_penalize_isa_irq(int irq, int active);
|
2005-04-17 00:20:36 +02:00
|
|
|
struct irq_routing_table *pcibios_get_irq_routing_table(void);
|
|
|
|
int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq);
|
|
|
|
|
|
|
|
#include <linux/types.h>
|
|
|
|
#include <linux/slab.h>
|
|
|
|
#include <asm/scatterlist.h>
|
|
|
|
#include <linux/string.h>
|
|
|
|
#include <asm/page.h>
|
|
|
|
|
2006-06-26 13:58:11 +02:00
|
|
|
extern void pci_iommu_alloc(void);
|
2005-04-17 00:20:36 +02:00
|
|
|
extern int iommu_setup(char *opt);
|
|
|
|
|
|
|
|
/* The PCI address space does equal the physical memory
|
|
|
|
* address space. The networking and block device layers use
|
|
|
|
* this boolean for bounce buffer decisions
|
|
|
|
*
|
2006-01-11 22:44:42 +01:00
|
|
|
* On AMD64 it mostly equals, but we set it to zero if a hardware
|
|
|
|
* IOMMU (gart) of sotware IOMMU (swiotlb) is available.
|
2005-04-17 00:20:36 +02:00
|
|
|
*/
|
2006-01-11 22:44:42 +01:00
|
|
|
#define PCI_DMA_BUS_IS_PHYS (dma_ops->is_phys)
|
|
|
|
|
2006-06-26 13:58:14 +02:00
|
|
|
#if defined(CONFIG_IOMMU) || defined(CONFIG_CALGARY_IOMMU)
|
2005-04-17 00:20:36 +02:00
|
|
|
|
|
|
|
/*
|
|
|
|
* x86-64 always supports DAC, but sometimes it is useful to force
|
|
|
|
* devices through the IOMMU to get automatic sg list merging.
|
|
|
|
* Optional right now.
|
|
|
|
*/
|
|
|
|
extern int iommu_sac_force;
|
|
|
|
#define pci_dac_dma_supported(pci_dev, mask) (!iommu_sac_force)
|
|
|
|
|
|
|
|
#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
|
|
|
|
dma_addr_t ADDR_NAME;
|
|
|
|
#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
|
|
|
|
__u32 LEN_NAME;
|
|
|
|
#define pci_unmap_addr(PTR, ADDR_NAME) \
|
|
|
|
((PTR)->ADDR_NAME)
|
|
|
|
#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
|
|
|
|
(((PTR)->ADDR_NAME) = (VAL))
|
|
|
|
#define pci_unmap_len(PTR, LEN_NAME) \
|
|
|
|
((PTR)->LEN_NAME)
|
|
|
|
#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
|
|
|
|
(((PTR)->LEN_NAME) = (VAL))
|
|
|
|
|
|
|
|
#else
|
|
|
|
/* No IOMMU */
|
|
|
|
|
|
|
|
#define pci_dac_dma_supported(pci_dev, mask) 1
|
|
|
|
|
|
|
|
#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
|
|
|
|
#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
|
|
|
|
#define pci_unmap_addr(PTR, ADDR_NAME) (0)
|
|
|
|
#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
|
|
|
|
#define pci_unmap_len(PTR, LEN_NAME) (0)
|
|
|
|
#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#include <asm-generic/pci-dma-compat.h>
|
|
|
|
|
|
|
|
static inline dma64_addr_t
|
|
|
|
pci_dac_page_to_dma(struct pci_dev *pdev, struct page *page, unsigned long offset, int direction)
|
|
|
|
{
|
|
|
|
return ((dma64_addr_t) page_to_phys(page) +
|
|
|
|
(dma64_addr_t) offset);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline struct page *
|
|
|
|
pci_dac_dma_to_page(struct pci_dev *pdev, dma64_addr_t dma_addr)
|
|
|
|
{
|
|
|
|
return virt_to_page(__va(dma_addr));
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline unsigned long
|
|
|
|
pci_dac_dma_to_offset(struct pci_dev *pdev, dma64_addr_t dma_addr)
|
|
|
|
{
|
|
|
|
return (dma_addr & ~PAGE_MASK);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
pci_dac_dma_sync_single_for_cpu(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
pci_dac_dma_sync_single_for_device(struct pci_dev *pdev, dma64_addr_t dma_addr, size_t len, int direction)
|
|
|
|
{
|
|
|
|
flush_write_buffers();
|
|
|
|
}
|
|
|
|
|
2005-06-07 08:07:46 +02:00
|
|
|
#ifdef CONFIG_PCI
|
2005-06-02 21:55:50 +02:00
|
|
|
static inline void pci_dma_burst_advice(struct pci_dev *pdev,
|
|
|
|
enum pci_dma_burst_strategy *strat,
|
|
|
|
unsigned long *strategy_parameter)
|
|
|
|
{
|
|
|
|
*strat = PCI_DMA_BURST_INFINITY;
|
|
|
|
*strategy_parameter = ~0UL;
|
|
|
|
}
|
2005-06-07 08:07:46 +02:00
|
|
|
#endif
|
2005-06-02 21:55:50 +02:00
|
|
|
|
2005-04-17 00:20:36 +02:00
|
|
|
#define HAVE_PCI_MMAP
|
|
|
|
extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
|
|
|
|
enum pci_mmap_state mmap_state, int write_combine);
|
|
|
|
|
|
|
|
static inline void pcibios_add_platform_entries(struct pci_dev *dev)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* __KERNEL__ */
|
|
|
|
|
|
|
|
/* generic pci stuff */
|
|
|
|
#ifdef CONFIG_PCI
|
|
|
|
#include <asm-generic/pci.h>
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#endif /* __x8664_PCI_H */
|