43 lines
852 B
C
43 lines
852 B
C
|
/*
|
||
|
|
* include/asm-arm/arch-ixp4x//system.h
|
||
|
|
*
|
||
|
|
* Copyright (C) 2002 Intel Corporation.
|
||
|
|
*
|
||
|
|
* This program is free software; you can redistribute it and/or modify
|
||
|
|
* it under the terms of the GNU General Public License version 2 as
|
||
|
|
* published by the Free Software Foundation.
|
||
|
|
*
|
||
|
|
*/
|
||
|
|
|
||
|
|
#include <asm/hardware.h>
|
||
|
|
|
||
|
|
static inline void arch_idle(void)
|
||
|
|
{
|
||
|
|
#if 0
|
||
|
|
if (!hlt_counter)
|
||
|
|
cpu_do_idle(0);
|
||
|
|
#endif
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
static inline void arch_reset(char mode)
|
||
|
|
{
|
||
|
|
if ( 1 && mode == 's') {
|
||
|
|
/* Jump into ROM at address 0 */
|
||
|
|
cpu_reset(0);
|
||
|
|
} else {
|
||
|
|
/* Use on-chip reset capability */
|
||
|
|
|
||
|
|
/* set the "key" register to enable access to
|
||
|
|
* "timer" and "enable" registers
|
||
|
|
*/
|
||
|
|
*IXP4XX_OSWK = IXP4XX_WDT_KEY;
|
||
|
|
|
||
|
|
/* write 0 to the timer register for an immediate reset */
|
||
|
|
*IXP4XX_OSWT = 0;
|
||
|
|
|
||
|
|
*IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|