2005-06-24 07:01:26 +02:00
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/*
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* include/asm-xtensa/mmu_context.h
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*
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* Switch an MMU context.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001 - 2005 Tensilica Inc.
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*/
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#ifndef _XTENSA_MMU_CONTEXT_H
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#define _XTENSA_MMU_CONTEXT_H
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#include <linux/stringify.h>
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2007-06-01 02:47:01 +02:00
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#include <linux/sched.h>
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2005-06-24 07:01:26 +02:00
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#include <asm/pgtable.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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2007-05-02 19:27:14 +02:00
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#include <asm-generic/mm_hooks.h>
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2005-06-24 07:01:26 +02:00
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2006-12-10 11:18:48 +01:00
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#define XCHAL_MMU_ASID_BITS 8
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2005-06-24 07:01:26 +02:00
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#if (XCHAL_HAVE_TLBS != 1)
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# error "Linux must have an MMU!"
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#endif
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extern unsigned long asid_cache;
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/*
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* NO_CONTEXT is the invalid ASID value that we don't ever assign to
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2006-12-10 11:18:48 +01:00
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* any user or kernel context.
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*
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* 0 invalid
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* 1 kernel
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* 2 reserved
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* 3 reserved
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* 4...255 available
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2005-06-24 07:01:26 +02:00
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*/
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2006-12-10 11:18:48 +01:00
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#define NO_CONTEXT 0
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#define ASID_USER_FIRST 4
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#define ASID_MASK ((1 << XCHAL_MMU_ASID_BITS) - 1)
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#define ASID_INSERT(x) (0x03020001 | (((x) & ASID_MASK) << 8))
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2005-06-24 07:01:26 +02:00
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2005-09-04 00:57:53 +02:00
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static inline void set_rasid_register (unsigned long val)
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2005-06-24 07:01:26 +02:00
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{
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__asm__ __volatile__ (" wsr %0, "__stringify(RASID)"\n\t"
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" isync\n" : : "a" (val));
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}
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2005-09-04 00:57:53 +02:00
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static inline unsigned long get_rasid_register (void)
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2005-06-24 07:01:26 +02:00
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{
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unsigned long tmp;
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2006-12-10 11:18:48 +01:00
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__asm__ __volatile__ (" rsr %0,"__stringify(RASID)"\n\t" : "=a" (tmp));
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2005-06-24 07:01:26 +02:00
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return tmp;
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}
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2005-09-04 00:57:53 +02:00
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static inline void
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2006-12-10 11:18:48 +01:00
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__get_new_mmu_context(struct mm_struct *mm)
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2005-06-24 07:01:26 +02:00
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{
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extern void flush_tlb_all(void);
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2006-12-10 11:18:48 +01:00
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if (! (++asid_cache & ASID_MASK) ) {
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2005-06-24 07:01:26 +02:00
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flush_tlb_all(); /* start new asid cycle */
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2006-12-10 11:18:48 +01:00
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asid_cache += ASID_USER_FIRST;
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2005-06-24 07:01:26 +02:00
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}
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2006-12-10 11:18:48 +01:00
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mm->context = asid_cache;
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2005-06-24 07:01:26 +02:00
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}
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2005-09-04 00:57:53 +02:00
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static inline void
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2006-12-10 11:18:48 +01:00
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__load_mmu_context(struct mm_struct *mm)
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2005-06-24 07:01:26 +02:00
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{
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2006-12-10 11:18:48 +01:00
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set_rasid_register(ASID_INSERT(mm->context));
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invalidate_page_directory();
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2005-06-24 07:01:26 +02:00
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}
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/*
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* Initialize the context related info for a new mm_struct
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* instance.
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*/
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2005-09-04 00:57:53 +02:00
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static inline int
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2005-06-24 07:01:26 +02:00
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init_new_context(struct task_struct *tsk, struct mm_struct *mm)
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{
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mm->context = NO_CONTEXT;
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return 0;
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}
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2006-12-10 11:18:48 +01:00
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/*
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* After we have set current->mm to a new value, this activates
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* the context for the new mm so we see the new mappings.
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*/
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static inline void
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activate_mm(struct mm_struct *prev, struct mm_struct *next)
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{
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/* Unconditionally get a new ASID. */
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__get_new_mmu_context(next);
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__load_mmu_context(next);
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}
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2005-09-04 00:57:53 +02:00
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static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
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2005-06-24 07:01:26 +02:00
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struct task_struct *tsk)
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{
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unsigned long asid = asid_cache;
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/* Check if our ASID is of an older version and thus invalid */
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2006-12-10 11:18:48 +01:00
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if (next->context == NO_CONTEXT || ((next->context^asid) & ~ASID_MASK))
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__get_new_mmu_context(next);
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2005-06-24 07:01:26 +02:00
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2006-12-10 11:18:48 +01:00
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__load_mmu_context(next);
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2005-06-24 07:01:26 +02:00
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}
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#define deactivate_mm(tsk, mm) do { } while(0)
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/*
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* Destroy context related info for an mm_struct that is about
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* to be put to rest.
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*/
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2005-09-04 00:57:53 +02:00
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static inline void destroy_context(struct mm_struct *mm)
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2005-06-24 07:01:26 +02:00
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{
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invalidate_page_directory();
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}
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static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
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{
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/* Nothing to do. */
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}
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#endif /* _XTENSA_MMU_CONTEXT_H */
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