blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 23:50:22 +02:00
|
|
|
/*
|
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|
|
* File: arch/blackfin/mach-bf561/ezkit.c
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* Based on:
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* Author:
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*
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* Created:
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* Description:
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*
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* Modified:
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* Copyright 2004-2006 Analog Devices Inc.
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*
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* Bugs: Enter bugs at http://blackfin.uclinux.org/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see the file COPYING, or write
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* to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <linux/device.h>
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#include <linux/platform_device.h>
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#include <linux/spi/spi.h>
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#include <asm/irq.h>
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#include <asm/bfin5xx_spi.h>
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2007-05-21 12:09:13 +02:00
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#include <linux/interrupt.h>
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#include <linux/irq.h>
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 23:50:22 +02:00
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/*
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* Name the Board for the /proc/cpuinfo
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*/
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char *bfin_board_name = "ADDS-BF561-EZKIT";
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2007-05-21 12:09:13 +02:00
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#define ISP1761_BASE 0x2C0F0000
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#define ISP1761_IRQ IRQ_PF10
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#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
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static struct resource bfin_isp1761_resources[] = {
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[0] = {
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.name = "isp1761-regs",
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.start = ISP1761_BASE + 0x00000000,
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.end = ISP1761_BASE + 0x000fffff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = ISP1761_IRQ,
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.end = ISP1761_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device bfin_isp1761_device = {
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.name = "isp1761",
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.id = 0,
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.num_resources = ARRAY_SIZE(bfin_isp1761_resources),
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.resource = bfin_isp1761_resources,
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};
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static struct platform_device *bfin_isp1761_devices[] = {
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&bfin_isp1761_device,
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};
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int __init bfin_isp1761_init(void)
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{
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unsigned int num_devices=ARRAY_SIZE(bfin_isp1761_devices);
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printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
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set_irq_type(ISP1761_IRQ, IRQF_TRIGGER_FALLING);
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return platform_add_devices(bfin_isp1761_devices, num_devices);
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}
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void __exit bfin_isp1761_exit(void)
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{
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platform_device_unregister(&bfin_isp1761_device);
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}
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arch_initcall(bfin_isp1761_init);
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#endif
|
|
|
|
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 23:50:22 +02:00
|
|
|
/*
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|
|
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* USB-LAN EzExtender board
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* Driver needs to know address, irq and flag pin.
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*/
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#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
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static struct resource smc91x_resources[] = {
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{
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.name = "smc91x-regs",
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.start = 0x2C010300,
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.end = 0x2C010300 + 16,
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.flags = IORESOURCE_MEM,
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},{
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.start = IRQ_PF9,
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.end = IRQ_PF9,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
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},
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};
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static struct platform_device smc91x_device = {
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.name = "smc91x",
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.id = 0,
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.num_resources = ARRAY_SIZE(smc91x_resources),
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.resource = smc91x_resources,
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};
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#endif
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#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
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static struct resource bfin_uart_resources[] = {
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{
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.start = 0xFFC00400,
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.end = 0xFFC004FF,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device bfin_uart_device = {
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.name = "bfin-uart",
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.id = 1,
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.num_resources = ARRAY_SIZE(bfin_uart_resources),
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.resource = bfin_uart_resources,
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|
|
};
|
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#endif
|
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#ifdef CONFIG_SPI_BFIN
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|
|
#if defined(CONFIG_SND_BLACKFIN_AD1836) \
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|| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
|
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|
|
static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
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|
|
.enable_dma = 0,
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|
|
.bits_per_word = 16,
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|
|
};
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|
#endif
|
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|
|
#endif
|
|
|
|
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|
|
/* SPI controller data */
|
|
|
|
static struct bfin5xx_spi_master spi_bfin_master_info = {
|
|
|
|
.num_chipselect = 8,
|
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|
|
.enable_dma = 1, /* master has the ability to do dma transfer */
|
|
|
|
};
|
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|
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|
|
static struct platform_device spi_bfin_master_device = {
|
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|
|
.name = "bfin-spi-master",
|
|
|
|
.id = 1, /* Bus number */
|
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|
|
.dev = {
|
|
|
|
.platform_data = &spi_bfin_master_info, /* Passed to driver */
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct spi_board_info bfin_spi_board_info[] __initdata = {
|
|
|
|
#if defined(CONFIG_SND_BLACKFIN_AD1836) \
|
|
|
|
|| defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
|
|
|
|
{
|
|
|
|
.modalias = "ad1836-spi",
|
|
|
|
.max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
|
|
|
|
.bus_num = 1,
|
|
|
|
.chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
|
|
|
|
.controller_data = &ad1836_spi_chip_info,
|
|
|
|
},
|
|
|
|
#endif
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct platform_device *ezkit_devices[] __initdata = {
|
|
|
|
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
|
|
|
|
&smc91x_device,
|
|
|
|
#endif
|
|
|
|
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
|
|
|
&spi_bfin_master_device,
|
|
|
|
#endif
|
|
|
|
#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
|
|
|
|
&bfin_uart_device,
|
|
|
|
#endif
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init ezkit_init(void)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
2007-05-21 12:09:25 +02:00
|
|
|
printk(KERN_INFO "%s(): registering device resources\n", __func__);
|
|
|
|
|
|
|
|
ret = platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 23:50:22 +02:00
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
2007-05-21 12:09:25 +02:00
|
|
|
|
|
|
|
#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
|
|
|
|
bfin_write_FIO0_DIR(bfin_read_FIO0_DIR() | (1 << 12));
|
|
|
|
SSYNC();
|
|
|
|
#endif
|
|
|
|
|
|
|
|
return spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-06 23:50:22 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
arch_initcall(ezkit_init);
|