90 lines
2.9 KiB
C
90 lines
2.9 KiB
C
|
/*
|
||
|
* BRIEF MODULE DESCRIPTION
|
||
|
* Galileo EV96100 rtc routines.
|
||
|
*
|
||
|
* Copyright 2000 MontaVista Software Inc.
|
||
|
* Author: MontaVista Software, Inc.
|
||
|
* ppopov@mvista.com or source@mvista.com
|
||
|
*
|
||
|
* This file was derived from Carsten Langgaard's
|
||
|
* arch/mips/mips-boards/atlas/atlas_rtc.c.
|
||
|
*
|
||
|
* Carsten Langgaard, carstenl@mips.com
|
||
|
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
|
||
|
*
|
||
|
* This program is free software; you can redistribute it and/or modify it
|
||
|
* under the terms of the GNU General Public License as published by the
|
||
|
* Free Software Foundation; either version 2 of the License, or (at your
|
||
|
* option) any later version.
|
||
|
*
|
||
|
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||
|
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||
|
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
|
||
|
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||
|
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
|
||
|
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||
|
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||
|
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||
|
*
|
||
|
* You should have received a copy of the GNU General Public License along
|
||
|
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||
|
* 675 Mass Ave, Cambridge, MA 02139, USA.
|
||
|
*/
|
||
|
#include <linux/config.h>
|
||
|
#include <linux/init.h>
|
||
|
#include <linux/kernel_stat.h>
|
||
|
#include <linux/module.h>
|
||
|
#include <linux/sched.h>
|
||
|
#include <linux/spinlock.h>
|
||
|
#include <linux/timex.h>
|
||
|
|
||
|
#include <asm/mipsregs.h>
|
||
|
#include <asm/ptrace.h>
|
||
|
#include <asm/time.h>
|
||
|
|
||
|
|
||
|
#define ALLINTS (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4 | IE_IRQ5)
|
||
|
|
||
|
extern volatile unsigned long wall_jiffies;
|
||
|
unsigned long missed_heart_beats = 0;
|
||
|
|
||
|
static unsigned long r4k_offset; /* Amount to increment compare reg each time */
|
||
|
static unsigned long r4k_cur; /* What counter should be at next timer irq */
|
||
|
|
||
|
static inline void ack_r4ktimer(unsigned long newval)
|
||
|
{
|
||
|
write_c0_compare(newval);
|
||
|
}
|
||
|
|
||
|
/*
|
||
|
* There are a lot of conceptually broken versions of the MIPS timer interrupt
|
||
|
* handler floating around. This one is rather different, but the algorithm
|
||
|
* is probably more robust.
|
||
|
*/
|
||
|
void mips_timer_interrupt(struct pt_regs *regs)
|
||
|
{
|
||
|
int irq = 7; /* FIX ME */
|
||
|
|
||
|
if (r4k_offset == 0) {
|
||
|
goto null;
|
||
|
}
|
||
|
|
||
|
do {
|
||
|
kstat_this_cpu.irqs[irq]++;
|
||
|
do_timer(regs);
|
||
|
#ifndef CONFIG_SMP
|
||
|
update_process_times(user_mode(regs));
|
||
|
#endif
|
||
|
r4k_cur += r4k_offset;
|
||
|
ack_r4ktimer(r4k_cur);
|
||
|
|
||
|
} while (((unsigned long)read_c0_count()
|
||
|
- r4k_cur) < 0x7fffffff);
|
||
|
return;
|
||
|
|
||
|
null:
|
||
|
ack_r4ktimer(0);
|
||
|
}
|