2008-06-18 17:08:48 +02:00
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#ifndef ASM_X86__MSIDEF_H
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#define ASM_X86__MSIDEF_H
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2006-10-04 11:16:43 +02:00
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/*
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* Constants for Intel APIC based MSI messages.
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*/
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/*
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* Shifts for MSI data
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*/
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#define MSI_DATA_VECTOR_SHIFT 0
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#define MSI_DATA_VECTOR_MASK 0x000000ff
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2008-03-23 09:02:50 +01:00
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#define MSI_DATA_VECTOR(v) (((v) << MSI_DATA_VECTOR_SHIFT) & \
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MSI_DATA_VECTOR_MASK)
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2006-10-04 11:16:43 +02:00
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#define MSI_DATA_DELIVERY_MODE_SHIFT 8
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#define MSI_DATA_DELIVERY_FIXED (0 << MSI_DATA_DELIVERY_MODE_SHIFT)
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#define MSI_DATA_DELIVERY_LOWPRI (1 << MSI_DATA_DELIVERY_MODE_SHIFT)
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#define MSI_DATA_LEVEL_SHIFT 14
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#define MSI_DATA_LEVEL_DEASSERT (0 << MSI_DATA_LEVEL_SHIFT)
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#define MSI_DATA_LEVEL_ASSERT (1 << MSI_DATA_LEVEL_SHIFT)
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#define MSI_DATA_TRIGGER_SHIFT 15
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#define MSI_DATA_TRIGGER_EDGE (0 << MSI_DATA_TRIGGER_SHIFT)
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#define MSI_DATA_TRIGGER_LEVEL (1 << MSI_DATA_TRIGGER_SHIFT)
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/*
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* Shift/mask fields for msi address
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*/
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#define MSI_ADDR_BASE_HI 0
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#define MSI_ADDR_BASE_LO 0xfee00000
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#define MSI_ADDR_DEST_MODE_SHIFT 2
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#define MSI_ADDR_DEST_MODE_PHYSICAL (0 << MSI_ADDR_DEST_MODE_SHIFT)
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#define MSI_ADDR_DEST_MODE_LOGICAL (1 << MSI_ADDR_DEST_MODE_SHIFT)
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#define MSI_ADDR_REDIRECTION_SHIFT 3
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2008-03-23 09:02:50 +01:00
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#define MSI_ADDR_REDIRECTION_CPU (0 << MSI_ADDR_REDIRECTION_SHIFT)
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/* dedicated cpu */
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#define MSI_ADDR_REDIRECTION_LOWPRI (1 << MSI_ADDR_REDIRECTION_SHIFT)
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/* lowest priority */
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2006-10-04 11:16:43 +02:00
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#define MSI_ADDR_DEST_ID_SHIFT 12
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#define MSI_ADDR_DEST_ID_MASK 0x00ffff0
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2008-03-23 09:02:50 +01:00
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#define MSI_ADDR_DEST_ID(dest) (((dest) << MSI_ADDR_DEST_ID_SHIFT) & \
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MSI_ADDR_DEST_ID_MASK)
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2006-10-04 11:16:43 +02:00
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2008-07-10 20:16:57 +02:00
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#define MSI_ADDR_IR_EXT_INT (1 << 4)
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#define MSI_ADDR_IR_SHV (1 << 3)
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#define MSI_ADDR_IR_INDEX1(index) ((index & 0x8000) >> 13)
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#define MSI_ADDR_IR_INDEX2(index) ((index & 0x7fff) << 5)
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2008-06-18 17:08:48 +02:00
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#endif /* ASM_X86__MSIDEF_H */
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