2009-04-23 13:24:13 +02:00
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/*
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* DMA helper routines for Freescale STMP37XX/STMP378X
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*
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* Author: dmitry pervushin <dpervushin@embeddedalley.com>
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*
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* Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
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* Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
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*/
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/*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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#include <linux/kernel.h>
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#include <linux/device.h>
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#include <linux/dmapool.h>
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#include <linux/sysdev.h>
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#include <linux/cpufreq.h>
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#include <asm/page.h>
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2009-05-31 14:32:11 +02:00
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#include <mach/platform.h>
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2009-04-23 13:24:13 +02:00
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#include <mach/dma.h>
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#include <mach/regs-apbx.h>
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#include <mach/regs-apbh.h>
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static const size_t pool_item_size = sizeof(struct stmp3xxx_dma_command);
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static const size_t pool_alignment = 8;
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static struct stmp3xxx_dma_user {
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void *pool;
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int inuse;
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const char *name;
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} channels[MAX_DMA_CHANNELS];
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#define IS_VALID_CHANNEL(ch) ((ch) >= 0 && (ch) < MAX_DMA_CHANNELS)
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#define IS_USED(ch) (channels[ch].inuse)
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int stmp3xxx_dma_request(int ch, struct device *dev, const char *name)
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{
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struct stmp3xxx_dma_user *user;
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int err = 0;
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user = channels + ch;
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if (!IS_VALID_CHANNEL(ch)) {
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err = -ENODEV;
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goto out;
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}
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if (IS_USED(ch)) {
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err = -EBUSY;
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goto out;
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}
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/* Create a pool to allocate dma commands from */
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user->pool = dma_pool_create(name, dev, pool_item_size,
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pool_alignment, PAGE_SIZE);
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if (user->pool == NULL) {
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err = -ENOMEM;
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goto out;
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}
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user->name = name;
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user->inuse++;
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out:
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return err;
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}
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EXPORT_SYMBOL(stmp3xxx_dma_request);
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int stmp3xxx_dma_release(int ch)
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{
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struct stmp3xxx_dma_user *user = channels + ch;
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int err = 0;
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if (!IS_VALID_CHANNEL(ch)) {
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err = -ENODEV;
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goto out;
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}
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if (!IS_USED(ch)) {
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err = -EBUSY;
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goto out;
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}
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BUG_ON(user->pool == NULL);
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dma_pool_destroy(user->pool);
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user->inuse--;
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out:
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return err;
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}
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EXPORT_SYMBOL(stmp3xxx_dma_release);
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int stmp3xxx_dma_read_semaphore(int channel)
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{
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int sem = -1;
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2009-05-31 14:32:11 +02:00
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switch (STMP3XXX_DMA_BUS(channel)) {
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2009-04-23 13:24:13 +02:00
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case STMP3XXX_BUS_APBH:
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2009-05-31 14:32:11 +02:00
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sem = __raw_readl(REGS_APBH_BASE + HW_APBH_CHn_SEMA +
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STMP3XXX_DMA_CHANNEL(channel) * 0x70);
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sem &= BM_APBH_CHn_SEMA_PHORE;
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sem >>= BP_APBH_CHn_SEMA_PHORE;
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2009-04-23 13:24:13 +02:00
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break;
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case STMP3XXX_BUS_APBX:
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2009-05-31 14:32:11 +02:00
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sem = __raw_readl(REGS_APBX_BASE + HW_APBX_CHn_SEMA +
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STMP3XXX_DMA_CHANNEL(channel) * 0x70);
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sem &= BM_APBX_CHn_SEMA_PHORE;
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sem >>= BP_APBX_CHn_SEMA_PHORE;
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2009-04-23 13:24:13 +02:00
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break;
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default:
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BUG();
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}
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return sem;
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}
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EXPORT_SYMBOL(stmp3xxx_dma_read_semaphore);
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int stmp3xxx_dma_allocate_command(int channel,
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struct stmp3xxx_dma_descriptor *descriptor)
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{
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struct stmp3xxx_dma_user *user = channels + channel;
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int err = 0;
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if (!IS_VALID_CHANNEL(channel)) {
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err = -ENODEV;
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goto out;
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}
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if (!IS_USED(channel)) {
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err = -EBUSY;
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goto out;
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}
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if (descriptor == NULL) {
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err = -EINVAL;
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goto out;
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}
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/* Allocate memory for a command from the buffer */
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descriptor->command =
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dma_pool_alloc(user->pool, GFP_KERNEL, &descriptor->handle);
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/* Check it worked */
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if (!descriptor->command) {
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err = -ENOMEM;
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goto out;
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}
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memset(descriptor->command, 0, pool_item_size);
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out:
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WARN_ON(err);
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return err;
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}
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EXPORT_SYMBOL(stmp3xxx_dma_allocate_command);
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int stmp3xxx_dma_free_command(int channel,
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struct stmp3xxx_dma_descriptor *descriptor)
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{
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int err = 0;
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if (!IS_VALID_CHANNEL(channel)) {
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err = -ENODEV;
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goto out;
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}
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if (!IS_USED(channel)) {
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err = -EBUSY;
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goto out;
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}
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/* Return the command memory to the pool */
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dma_pool_free(channels[channel].pool, descriptor->command,
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descriptor->handle);
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/* Initialise descriptor so we're not tempted to use it */
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descriptor->command = NULL;
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descriptor->handle = 0;
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descriptor->virtual_buf_ptr = NULL;
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descriptor->next_descr = NULL;
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WARN_ON(err);
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out:
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return err;
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}
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EXPORT_SYMBOL(stmp3xxx_dma_free_command);
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void stmp3xxx_dma_go(int channel,
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struct stmp3xxx_dma_descriptor *head, u32 semaphore)
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{
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2009-05-31 14:32:11 +02:00
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int ch = STMP3XXX_DMA_CHANNEL(channel);
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void __iomem *c, *s;
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2009-04-23 13:24:13 +02:00
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2009-05-31 14:32:11 +02:00
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switch (STMP3XXX_DMA_BUS(channel)) {
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2009-04-23 13:24:13 +02:00
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case STMP3XXX_BUS_APBH:
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2009-05-31 14:32:11 +02:00
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c = REGS_APBH_BASE + HW_APBH_CHn_NXTCMDAR + 0x70 * ch;
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s = REGS_APBH_BASE + HW_APBH_CHn_SEMA + 0x70 * ch;
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2009-04-23 13:24:13 +02:00
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break;
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case STMP3XXX_BUS_APBX:
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2009-05-31 14:32:11 +02:00
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c = REGS_APBX_BASE + HW_APBX_CHn_NXTCMDAR + 0x70 * ch;
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s = REGS_APBX_BASE + HW_APBX_CHn_SEMA + 0x70 * ch;
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2009-04-23 13:24:13 +02:00
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break;
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2009-05-31 14:32:11 +02:00
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default:
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return;
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2009-04-23 13:24:13 +02:00
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}
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2009-05-31 14:32:11 +02:00
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/* Set next command */
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__raw_writel(head->handle, c);
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/* Set counting semaphore (kicks off transfer). Assumes
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peripheral has been set up correctly */
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__raw_writel(semaphore, s);
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2009-04-23 13:24:13 +02:00
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}
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EXPORT_SYMBOL(stmp3xxx_dma_go);
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int stmp3xxx_dma_running(int channel)
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{
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2009-05-31 14:32:11 +02:00
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switch (STMP3XXX_DMA_BUS(channel)) {
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2009-04-23 13:24:13 +02:00
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case STMP3XXX_BUS_APBH:
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2009-05-31 14:32:11 +02:00
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return (__raw_readl(REGS_APBH_BASE + HW_APBH_CHn_SEMA +
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0x70 * STMP3XXX_DMA_CHANNEL(channel))) &
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BM_APBH_CHn_SEMA_PHORE;
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2009-04-23 13:24:13 +02:00
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case STMP3XXX_BUS_APBX:
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2009-05-31 14:32:11 +02:00
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return (__raw_readl(REGS_APBX_BASE + HW_APBX_CHn_SEMA +
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0x70 * STMP3XXX_DMA_CHANNEL(channel))) &
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BM_APBX_CHn_SEMA_PHORE;
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2009-04-23 13:24:13 +02:00
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default:
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BUG();
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return 0;
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}
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}
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EXPORT_SYMBOL(stmp3xxx_dma_running);
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/*
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* Circular dma chain management
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*/
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void stmp3xxx_dma_free_chain(struct stmp37xx_circ_dma_chain *chain)
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{
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int i;
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for (i = 0; i < chain->total_count; i++)
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stmp3xxx_dma_free_command(
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2009-05-31 14:32:11 +02:00
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STMP3XXX_DMA(chain->channel, chain->bus),
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2009-04-23 13:24:13 +02:00
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&chain->chain[i]);
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}
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EXPORT_SYMBOL(stmp3xxx_dma_free_chain);
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int stmp3xxx_dma_make_chain(int ch, struct stmp37xx_circ_dma_chain *chain,
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struct stmp3xxx_dma_descriptor descriptors[],
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unsigned items)
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{
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int i;
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int err = 0;
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if (items == 0)
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return err;
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for (i = 0; i < items; i++) {
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err = stmp3xxx_dma_allocate_command(ch, &descriptors[i]);
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if (err) {
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WARN_ON(err);
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/*
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* Couldn't allocate the whole chain.
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* deallocate what has been allocated
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*/
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if (i) {
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do {
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stmp3xxx_dma_free_command(ch,
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&descriptors
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[i]);
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2009-09-18 21:44:18 +02:00
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} while (i-- > 0);
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2009-04-23 13:24:13 +02:00
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}
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return err;
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}
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/* link them! */
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if (i > 0) {
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descriptors[i - 1].next_descr = &descriptors[i];
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descriptors[i - 1].command->next =
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descriptors[i].handle;
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}
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}
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/* make list circular */
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descriptors[items - 1].next_descr = &descriptors[0];
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descriptors[items - 1].command->next = descriptors[0].handle;
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chain->total_count = items;
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chain->chain = descriptors;
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chain->free_index = 0;
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chain->active_index = 0;
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chain->cooked_index = 0;
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chain->free_count = items;
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chain->active_count = 0;
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chain->cooked_count = 0;
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2009-05-31 14:32:11 +02:00
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chain->bus = STMP3XXX_DMA_BUS(ch);
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chain->channel = STMP3XXX_DMA_CHANNEL(ch);
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2009-04-23 13:24:13 +02:00
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return err;
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}
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EXPORT_SYMBOL(stmp3xxx_dma_make_chain);
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void stmp37xx_circ_clear_chain(struct stmp37xx_circ_dma_chain *chain)
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{
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2009-05-31 14:32:11 +02:00
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BUG_ON(stmp3xxx_dma_running(STMP3XXX_DMA(chain->channel, chain->bus)));
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2009-04-23 13:24:13 +02:00
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chain->free_index = 0;
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chain->active_index = 0;
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chain->cooked_index = 0;
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chain->free_count = chain->total_count;
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chain->active_count = 0;
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chain->cooked_count = 0;
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}
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EXPORT_SYMBOL(stmp37xx_circ_clear_chain);
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void stmp37xx_circ_advance_free(struct stmp37xx_circ_dma_chain *chain,
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unsigned count)
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{
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BUG_ON(chain->cooked_count < count);
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chain->cooked_count -= count;
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chain->cooked_index += count;
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chain->cooked_index %= chain->total_count;
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chain->free_count += count;
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}
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EXPORT_SYMBOL(stmp37xx_circ_advance_free);
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void stmp37xx_circ_advance_active(struct stmp37xx_circ_dma_chain *chain,
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unsigned count)
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{
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2009-05-31 14:32:11 +02:00
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void __iomem *c;
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u32 mask_clr, mask;
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2009-04-23 13:24:13 +02:00
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BUG_ON(chain->free_count < count);
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chain->free_count -= count;
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chain->free_index += count;
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chain->free_index %= chain->total_count;
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chain->active_count += count;
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switch (chain->bus) {
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case STMP3XXX_BUS_APBH:
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2009-05-31 14:32:11 +02:00
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c = REGS_APBH_BASE + HW_APBH_CHn_SEMA + 0x70 * chain->channel;
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mask_clr = BM_APBH_CHn_SEMA_INCREMENT_SEMA;
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mask = BF(count, APBH_CHn_SEMA_INCREMENT_SEMA);
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2009-04-23 13:24:13 +02:00
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break;
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case STMP3XXX_BUS_APBX:
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2009-05-31 14:32:11 +02:00
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c = REGS_APBX_BASE + HW_APBX_CHn_SEMA + 0x70 * chain->channel;
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mask_clr = BM_APBX_CHn_SEMA_INCREMENT_SEMA;
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mask = BF(count, APBX_CHn_SEMA_INCREMENT_SEMA);
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2009-04-23 13:24:13 +02:00
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break;
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default:
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BUG();
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2009-05-31 14:32:11 +02:00
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return;
|
2009-04-23 13:24:13 +02:00
|
|
|
}
|
2009-05-31 14:32:11 +02:00
|
|
|
|
|
|
|
/* Set counting semaphore (kicks off transfer). Assumes
|
|
|
|
peripheral has been set up correctly */
|
|
|
|
stmp3xxx_clearl(mask_clr, c);
|
|
|
|
stmp3xxx_setl(mask, c);
|
2009-04-23 13:24:13 +02:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(stmp37xx_circ_advance_active);
|
|
|
|
|
|
|
|
unsigned stmp37xx_circ_advance_cooked(struct stmp37xx_circ_dma_chain *chain)
|
|
|
|
{
|
|
|
|
unsigned cooked;
|
|
|
|
|
|
|
|
cooked = chain->active_count -
|
2009-05-31 14:32:11 +02:00
|
|
|
stmp3xxx_dma_read_semaphore(STMP3XXX_DMA(chain->channel, chain->bus));
|
2009-04-23 13:24:13 +02:00
|
|
|
|
|
|
|
chain->active_count -= cooked;
|
|
|
|
chain->active_index += cooked;
|
|
|
|
chain->active_index %= chain->total_count;
|
|
|
|
|
|
|
|
chain->cooked_count += cooked;
|
|
|
|
|
|
|
|
return cooked;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(stmp37xx_circ_advance_cooked);
|
|
|
|
|
|
|
|
void stmp3xxx_dma_set_alt_target(int channel, int function)
|
|
|
|
{
|
|
|
|
#if defined(CONFIG_ARCH_STMP37XX)
|
|
|
|
unsigned bits = 4;
|
|
|
|
#elif defined(CONFIG_ARCH_STMP378X)
|
|
|
|
unsigned bits = 2;
|
|
|
|
#else
|
|
|
|
#error wrong arch
|
|
|
|
#endif
|
2009-05-31 14:32:11 +02:00
|
|
|
int shift = STMP3XXX_DMA_CHANNEL(channel) * bits;
|
2009-04-23 13:24:13 +02:00
|
|
|
unsigned mask = (1<<bits) - 1;
|
2009-05-31 14:32:11 +02:00
|
|
|
void __iomem *c;
|
2009-04-23 13:24:13 +02:00
|
|
|
|
|
|
|
BUG_ON(function < 0 || function >= (1<<bits));
|
|
|
|
pr_debug("%s: channel = %d, using mask %x, "
|
|
|
|
"shift = %d\n", __func__, channel, mask, shift);
|
|
|
|
|
2009-05-31 14:32:11 +02:00
|
|
|
switch (STMP3XXX_DMA_BUS(channel)) {
|
2009-04-23 13:24:13 +02:00
|
|
|
case STMP3XXX_BUS_APBH:
|
2009-05-31 14:32:11 +02:00
|
|
|
c = REGS_APBH_BASE + HW_APBH_DEVSEL;
|
2009-04-23 13:24:13 +02:00
|
|
|
break;
|
|
|
|
case STMP3XXX_BUS_APBX:
|
2009-05-31 14:32:11 +02:00
|
|
|
c = REGS_APBX_BASE + HW_APBX_DEVSEL;
|
2009-04-23 13:24:13 +02:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
BUG();
|
|
|
|
}
|
2009-05-31 14:32:11 +02:00
|
|
|
stmp3xxx_clearl(mask << shift, c);
|
|
|
|
stmp3xxx_setl(mask << shift, c);
|
2009-04-23 13:24:13 +02:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(stmp3xxx_dma_set_alt_target);
|
|
|
|
|
|
|
|
void stmp3xxx_dma_suspend(void)
|
|
|
|
{
|
2009-05-31 14:32:11 +02:00
|
|
|
stmp3xxx_setl(BM_APBH_CTRL0_CLKGATE, REGS_APBH_BASE + HW_APBH_CTRL0);
|
|
|
|
stmp3xxx_setl(BM_APBX_CTRL0_CLKGATE, REGS_APBX_BASE + HW_APBX_CTRL0);
|
2009-04-23 13:24:13 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
void stmp3xxx_dma_resume(void)
|
|
|
|
{
|
2009-05-31 14:32:11 +02:00
|
|
|
stmp3xxx_clearl(BM_APBH_CTRL0_CLKGATE | BM_APBH_CTRL0_SFTRST,
|
|
|
|
REGS_APBH_BASE + HW_APBH_CTRL0);
|
|
|
|
stmp3xxx_clearl(BM_APBX_CTRL0_CLKGATE | BM_APBX_CTRL0_SFTRST,
|
|
|
|
REGS_APBX_BASE + HW_APBX_CTRL0);
|
2009-04-23 13:24:13 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_CPU_FREQ
|
|
|
|
|
|
|
|
struct dma_notifier_block {
|
|
|
|
struct notifier_block nb;
|
|
|
|
void *data;
|
|
|
|
};
|
|
|
|
|
|
|
|
static int dma_cpufreq_notifier(struct notifier_block *self,
|
|
|
|
unsigned long phase, void *p)
|
|
|
|
{
|
|
|
|
switch (phase) {
|
|
|
|
case CPUFREQ_POSTCHANGE:
|
|
|
|
stmp3xxx_dma_resume();
|
|
|
|
break;
|
|
|
|
|
|
|
|
case CPUFREQ_PRECHANGE:
|
|
|
|
stmp3xxx_dma_suspend();
|
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return NOTIFY_DONE;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct dma_notifier_block dma_cpufreq_nb = {
|
|
|
|
.nb = {
|
|
|
|
.notifier_call = dma_cpufreq_notifier,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
#endif /* CONFIG_CPU_FREQ */
|
|
|
|
|
|
|
|
void __init stmp3xxx_dma_init(void)
|
|
|
|
{
|
2009-05-31 14:32:11 +02:00
|
|
|
stmp3xxx_clearl(BM_APBH_CTRL0_CLKGATE | BM_APBH_CTRL0_SFTRST,
|
|
|
|
REGS_APBH_BASE + HW_APBH_CTRL0);
|
|
|
|
stmp3xxx_clearl(BM_APBX_CTRL0_CLKGATE | BM_APBX_CTRL0_SFTRST,
|
|
|
|
REGS_APBX_BASE + HW_APBX_CTRL0);
|
2009-04-23 13:24:13 +02:00
|
|
|
#ifdef CONFIG_CPU_FREQ
|
|
|
|
cpufreq_register_notifier(&dma_cpufreq_nb.nb,
|
|
|
|
CPUFREQ_TRANSITION_NOTIFIER);
|
|
|
|
#endif /* CONFIG_CPU_FREQ */
|
|
|
|
}
|