2005-06-22 02:16:10 +02:00
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/*
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* linux/arch/m32r/kernel/setup_mappi3.c
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*
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* Setup routines for Renesas MAPPI-III(M3A-2170) Board
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*
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2005-07-08 02:59:32 +02:00
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* Copyright (c) 2001-2005 Hiroyuki Kondo, Hirokazu Takata,
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* Hitoshi Yamamoto, Mamoru Sakugawa
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2005-06-22 02:16:10 +02:00
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*/
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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2005-10-29 20:07:23 +02:00
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#include <linux/platform_device.h>
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2005-06-22 02:16:10 +02:00
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#include <asm/system.h>
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#include <asm/m32r.h>
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#include <asm/io.h>
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#define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
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icu_data_t icu_data[NR_IRQS];
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static void disable_mappi3_irq(unsigned int irq)
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{
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unsigned long port, data;
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if ((irq == 0) ||(irq >= NR_IRQS)) {
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printk("bad irq 0x%08x\n", irq);
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return;
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}
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port = irq2port(irq);
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data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
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outl(data, port);
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}
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static void enable_mappi3_irq(unsigned int irq)
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{
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unsigned long port, data;
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if ((irq == 0) ||(irq >= NR_IRQS)) {
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printk("bad irq 0x%08x\n", irq);
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return;
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}
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port = irq2port(irq);
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data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
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outl(data, port);
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}
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static void mask_and_ack_mappi3(unsigned int irq)
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{
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disable_mappi3_irq(irq);
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}
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static void end_mappi3_irq(unsigned int irq)
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{
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enable_mappi3_irq(irq);
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}
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static unsigned int startup_mappi3_irq(unsigned int irq)
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{
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enable_mappi3_irq(irq);
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return (0);
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}
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static void shutdown_mappi3_irq(unsigned int irq)
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{
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unsigned long port;
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port = irq2port(irq);
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outl(M32R_ICUCR_ILEVEL7, port);
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}
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static struct hw_interrupt_type mappi3_irq_type =
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{
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2005-06-22 02:16:13 +02:00
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.typename = "MAPPI3-IRQ",
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.startup = startup_mappi3_irq,
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.shutdown = shutdown_mappi3_irq,
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.enable = enable_mappi3_irq,
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.disable = disable_mappi3_irq,
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.ack = mask_and_ack_mappi3,
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.end = end_mappi3_irq
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2005-06-22 02:16:10 +02:00
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};
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void __init init_IRQ(void)
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{
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#if defined(CONFIG_SMC91X)
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/* INT0 : LAN controller (SMC91111) */
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irq_desc[M32R_IRQ_INT0].status = IRQ_DISABLED;
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[PATCH] genirq: rename desc->handler to desc->chip
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.
While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.
The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.
This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.
As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.
The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.
We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.
This patch:
rename desc->handler to desc->chip.
Originally i did not want to do this, because it's a big patch. But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.
I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.
So lets get over with this quickly. The conversion was done automatically
via scripts and converts all the code in the kernel.
This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.
[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-29 11:24:36 +02:00
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irq_desc[M32R_IRQ_INT0].chip = &mappi3_irq_type;
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2005-06-22 02:16:10 +02:00
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irq_desc[M32R_IRQ_INT0].action = 0;
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irq_desc[M32R_IRQ_INT0].depth = 1;
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icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
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disable_mappi3_irq(M32R_IRQ_INT0);
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#endif /* CONFIG_SMC91X */
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/* MFT2 : system timer */
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irq_desc[M32R_IRQ_MFT2].status = IRQ_DISABLED;
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[PATCH] genirq: rename desc->handler to desc->chip
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.
While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.
The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.
This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.
As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.
The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.
We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.
This patch:
rename desc->handler to desc->chip.
Originally i did not want to do this, because it's a big patch. But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.
I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.
So lets get over with this quickly. The conversion was done automatically
via scripts and converts all the code in the kernel.
This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.
[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-29 11:24:36 +02:00
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irq_desc[M32R_IRQ_MFT2].chip = &mappi3_irq_type;
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2005-06-22 02:16:10 +02:00
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irq_desc[M32R_IRQ_MFT2].action = 0;
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irq_desc[M32R_IRQ_MFT2].depth = 1;
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icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
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disable_mappi3_irq(M32R_IRQ_MFT2);
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#ifdef CONFIG_SERIAL_M32R_SIO
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/* SIO0_R : uart receive data */
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irq_desc[M32R_IRQ_SIO0_R].status = IRQ_DISABLED;
|
[PATCH] genirq: rename desc->handler to desc->chip
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.
While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.
The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.
This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.
As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.
The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.
We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.
This patch:
rename desc->handler to desc->chip.
Originally i did not want to do this, because it's a big patch. But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.
I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.
So lets get over with this quickly. The conversion was done automatically
via scripts and converts all the code in the kernel.
This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.
[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-29 11:24:36 +02:00
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irq_desc[M32R_IRQ_SIO0_R].chip = &mappi3_irq_type;
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2005-06-22 02:16:10 +02:00
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irq_desc[M32R_IRQ_SIO0_R].action = 0;
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irq_desc[M32R_IRQ_SIO0_R].depth = 1;
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icu_data[M32R_IRQ_SIO0_R].icucr = 0;
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disable_mappi3_irq(M32R_IRQ_SIO0_R);
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/* SIO0_S : uart send data */
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irq_desc[M32R_IRQ_SIO0_S].status = IRQ_DISABLED;
|
[PATCH] genirq: rename desc->handler to desc->chip
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.
While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.
The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.
This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.
As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.
The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.
We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.
This patch:
rename desc->handler to desc->chip.
Originally i did not want to do this, because it's a big patch. But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.
I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.
So lets get over with this quickly. The conversion was done automatically
via scripts and converts all the code in the kernel.
This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.
[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-29 11:24:36 +02:00
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irq_desc[M32R_IRQ_SIO0_S].chip = &mappi3_irq_type;
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2005-06-22 02:16:10 +02:00
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irq_desc[M32R_IRQ_SIO0_S].action = 0;
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irq_desc[M32R_IRQ_SIO0_S].depth = 1;
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icu_data[M32R_IRQ_SIO0_S].icucr = 0;
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disable_mappi3_irq(M32R_IRQ_SIO0_S);
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/* SIO1_R : uart receive data */
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irq_desc[M32R_IRQ_SIO1_R].status = IRQ_DISABLED;
|
[PATCH] genirq: rename desc->handler to desc->chip
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.
While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.
The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.
This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.
As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.
The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.
We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.
This patch:
rename desc->handler to desc->chip.
Originally i did not want to do this, because it's a big patch. But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.
I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.
So lets get over with this quickly. The conversion was done automatically
via scripts and converts all the code in the kernel.
This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.
[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-29 11:24:36 +02:00
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irq_desc[M32R_IRQ_SIO1_R].chip = &mappi3_irq_type;
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2005-06-22 02:16:10 +02:00
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irq_desc[M32R_IRQ_SIO1_R].action = 0;
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irq_desc[M32R_IRQ_SIO1_R].depth = 1;
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icu_data[M32R_IRQ_SIO1_R].icucr = 0;
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disable_mappi3_irq(M32R_IRQ_SIO1_R);
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/* SIO1_S : uart send data */
|
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irq_desc[M32R_IRQ_SIO1_S].status = IRQ_DISABLED;
|
[PATCH] genirq: rename desc->handler to desc->chip
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.
While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.
The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.
This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.
As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.
The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.
We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.
This patch:
rename desc->handler to desc->chip.
Originally i did not want to do this, because it's a big patch. But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.
I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.
So lets get over with this quickly. The conversion was done automatically
via scripts and converts all the code in the kernel.
This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.
[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-29 11:24:36 +02:00
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irq_desc[M32R_IRQ_SIO1_S].chip = &mappi3_irq_type;
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2005-06-22 02:16:10 +02:00
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irq_desc[M32R_IRQ_SIO1_S].action = 0;
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irq_desc[M32R_IRQ_SIO1_S].depth = 1;
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icu_data[M32R_IRQ_SIO1_S].icucr = 0;
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disable_mappi3_irq(M32R_IRQ_SIO1_S);
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#endif /* CONFIG_M32R_USE_DBG_CONSOLE */
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#if defined(CONFIG_USB)
|
|
|
|
|
/* INT1 : USB Host controller interrupt */
|
|
|
|
|
irq_desc[M32R_IRQ_INT1].status = IRQ_DISABLED;
|
[PATCH] genirq: rename desc->handler to desc->chip
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.
While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.
The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.
This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.
As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.
The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.
We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.
This patch:
rename desc->handler to desc->chip.
Originally i did not want to do this, because it's a big patch. But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.
I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.
So lets get over with this quickly. The conversion was done automatically
via scripts and converts all the code in the kernel.
This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.
[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-29 11:24:36 +02:00
|
|
|
irq_desc[M32R_IRQ_INT1].chip = &mappi3_irq_type;
|
2005-06-22 02:16:10 +02:00
|
|
|
irq_desc[M32R_IRQ_INT1].action = 0;
|
|
|
|
|
irq_desc[M32R_IRQ_INT1].depth = 1;
|
|
|
|
|
icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
|
|
|
|
|
disable_mappi3_irq(M32R_IRQ_INT1);
|
|
|
|
|
#endif /* CONFIG_USB */
|
|
|
|
|
|
2005-11-28 22:44:00 +01:00
|
|
|
/* CFC IREQ */
|
2005-06-22 02:16:10 +02:00
|
|
|
irq_desc[PLD_IRQ_CFIREQ].status = IRQ_DISABLED;
|
[PATCH] genirq: rename desc->handler to desc->chip
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.
While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.
The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.
This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.
As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.
The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.
We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.
This patch:
rename desc->handler to desc->chip.
Originally i did not want to do this, because it's a big patch. But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.
I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.
So lets get over with this quickly. The conversion was done automatically
via scripts and converts all the code in the kernel.
This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.
[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-29 11:24:36 +02:00
|
|
|
irq_desc[PLD_IRQ_CFIREQ].chip = &mappi3_irq_type;
|
2005-06-22 02:16:10 +02:00
|
|
|
irq_desc[PLD_IRQ_CFIREQ].action = 0;
|
|
|
|
|
irq_desc[PLD_IRQ_CFIREQ].depth = 1; /* disable nested irq */
|
|
|
|
|
icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
|
|
|
|
|
disable_mappi3_irq(PLD_IRQ_CFIREQ);
|
|
|
|
|
|
|
|
|
|
#if defined(CONFIG_M32R_CFC)
|
2005-11-28 22:44:00 +01:00
|
|
|
/* ICUCR41: CFC Insert & eject */
|
2005-06-22 02:16:10 +02:00
|
|
|
irq_desc[PLD_IRQ_CFC_INSERT].status = IRQ_DISABLED;
|
[PATCH] genirq: rename desc->handler to desc->chip
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.
While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.
The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.
This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.
As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.
The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.
We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.
This patch:
rename desc->handler to desc->chip.
Originally i did not want to do this, because it's a big patch. But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.
I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.
So lets get over with this quickly. The conversion was done automatically
via scripts and converts all the code in the kernel.
This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.
[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-29 11:24:36 +02:00
|
|
|
irq_desc[PLD_IRQ_CFC_INSERT].chip = &mappi3_irq_type;
|
2005-06-22 02:16:10 +02:00
|
|
|
irq_desc[PLD_IRQ_CFC_INSERT].action = 0;
|
|
|
|
|
irq_desc[PLD_IRQ_CFC_INSERT].depth = 1; /* disable nested irq */
|
|
|
|
|
icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
|
|
|
|
|
disable_mappi3_irq(PLD_IRQ_CFC_INSERT);
|
|
|
|
|
|
|
|
|
|
#endif /* CONFIG_M32R_CFC */
|
2005-11-28 22:44:00 +01:00
|
|
|
|
|
|
|
|
/* IDE IREQ */
|
|
|
|
|
irq_desc[PLD_IRQ_IDEIREQ].status = IRQ_DISABLED;
|
[PATCH] genirq: rename desc->handler to desc->chip
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.
While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.
The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.
This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.
As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.
The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.
We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.
This patch:
rename desc->handler to desc->chip.
Originally i did not want to do this, because it's a big patch. But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.
I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.
So lets get over with this quickly. The conversion was done automatically
via scripts and converts all the code in the kernel.
This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.
[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-29 11:24:36 +02:00
|
|
|
irq_desc[PLD_IRQ_IDEIREQ].chip = &mappi3_irq_type;
|
2005-11-28 22:44:00 +01:00
|
|
|
irq_desc[PLD_IRQ_IDEIREQ].action = 0;
|
|
|
|
|
irq_desc[PLD_IRQ_IDEIREQ].depth = 1; /* disable nested irq */
|
|
|
|
|
icu_data[PLD_IRQ_IDEIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
|
|
|
|
|
disable_mappi3_irq(PLD_IRQ_IDEIREQ);
|
|
|
|
|
|
2005-06-22 02:16:10 +02:00
|
|
|
}
|
|
|
|
|
|
2005-07-08 02:59:32 +02:00
|
|
|
#if defined(CONFIG_SMC91X)
|
|
|
|
|
|
2005-06-22 02:16:10 +02:00
|
|
|
#define LAN_IOSTART 0x300
|
|
|
|
|
#define LAN_IOEND 0x320
|
|
|
|
|
static struct resource smc91x_resources[] = {
|
|
|
|
|
[0] = {
|
|
|
|
|
.start = (LAN_IOSTART),
|
|
|
|
|
.end = (LAN_IOEND),
|
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
|
},
|
|
|
|
|
[1] = {
|
|
|
|
|
.start = M32R_IRQ_INT0,
|
|
|
|
|
.end = M32R_IRQ_INT0,
|
|
|
|
|
.flags = IORESOURCE_IRQ,
|
|
|
|
|
}
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static struct platform_device smc91x_device = {
|
|
|
|
|
.name = "smc91x",
|
|
|
|
|
.id = 0,
|
|
|
|
|
.num_resources = ARRAY_SIZE(smc91x_resources),
|
|
|
|
|
.resource = smc91x_resources,
|
|
|
|
|
};
|
|
|
|
|
|
2005-07-08 02:59:32 +02:00
|
|
|
#endif
|
|
|
|
|
|
|
|
|
|
#if defined(CONFIG_FB_S1D13XXX)
|
|
|
|
|
|
|
|
|
|
#include <video/s1d13xxxfb.h>
|
|
|
|
|
#include <asm/s1d13806.h>
|
|
|
|
|
|
|
|
|
|
static struct s1d13xxxfb_pdata s1d13xxxfb_data = {
|
|
|
|
|
.initregs = s1d13xxxfb_initregs,
|
|
|
|
|
.initregssize = ARRAY_SIZE(s1d13xxxfb_initregs),
|
|
|
|
|
.platform_init_video = NULL,
|
|
|
|
|
#ifdef CONFIG_PM
|
|
|
|
|
.platform_suspend_video = NULL,
|
|
|
|
|
.platform_resume_video = NULL,
|
|
|
|
|
#endif
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static struct resource s1d13xxxfb_resources[] = {
|
|
|
|
|
[0] = {
|
|
|
|
|
.start = 0x1d600000UL,
|
|
|
|
|
.end = 0x1d73FFFFUL,
|
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
|
},
|
|
|
|
|
[1] = {
|
|
|
|
|
.start = 0x1d400000UL,
|
|
|
|
|
.end = 0x1d4001FFUL,
|
|
|
|
|
.flags = IORESOURCE_MEM,
|
|
|
|
|
}
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static struct platform_device s1d13xxxfb_device = {
|
|
|
|
|
.name = S1D_DEVICENAME,
|
|
|
|
|
.id = 0,
|
|
|
|
|
.dev = {
|
|
|
|
|
.platform_data = &s1d13xxxfb_data,
|
|
|
|
|
},
|
|
|
|
|
.num_resources = ARRAY_SIZE(s1d13xxxfb_resources),
|
|
|
|
|
.resource = s1d13xxxfb_resources,
|
|
|
|
|
};
|
|
|
|
|
#endif
|
|
|
|
|
|
2005-06-22 02:16:10 +02:00
|
|
|
static int __init platform_init(void)
|
|
|
|
|
{
|
2005-07-08 02:59:32 +02:00
|
|
|
#if defined(CONFIG_SMC91X)
|
2005-06-22 02:16:10 +02:00
|
|
|
platform_device_register(&smc91x_device);
|
2005-07-08 02:59:32 +02:00
|
|
|
#endif
|
|
|
|
|
#if defined(CONFIG_FB_S1D13XXX)
|
|
|
|
|
platform_device_register(&s1d13xxxfb_device);
|
|
|
|
|
#endif
|
2005-06-22 02:16:10 +02:00
|
|
|
return 0;
|
|
|
|
|
}
|
|
|
|
|
arch_initcall(platform_init);
|
