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icnss: Vote for chain1 regulators if RD card is 2x2

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Wlan fw will provide RD card chain mask capability
for as part of cap qmi message exchange between host
platform and fw platform. Using this info host platform
will determine whether RD card chain is 1x1 or 2x2. It
will enabled chain1 regulator if RD card is 2x2 and also
if wlan fw doesn't provide any details about RD card
chain mask capability chain1 regulator will enabled
by default.

Change-Id: I83d9058fe505f2519a2300a4989e08acbdbcaafb
Signed-off-by: Sandeep Singh <sandsing@codeaurora.org>
This commit is contained in:
Sandeep Singh 2020-08-31 12:42:01 +05:30
parent a4f921d879
commit 0f5f6d60e3
3 changed files with 33 additions and 18 deletions
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45
drivers/soc/qcom/icnss.c
View file

@ -54,6 +54,7 @@
#define ICNSS_SERVICE_LOCATION_CLIENT_NAME "ICNSS-WLAN"
#define ICNSS_WLAN_SERVICE_NAME "wlan/fw"
#define ICNSS_CHAIN1_REGULATOR "vdd-3.3-ch1"
#define ICNSS_THRESHOLD_HIGH 3600000
#define ICNSS_THRESHOLD_LOW 3450000
#define ICNSS_THRESHOLD_GUARD 20000
@ -114,11 +115,11 @@ struct icnss_msa_perm_list_t msa_perm_list[ICNSS_MSA_PERM_MAX] = {
};
static struct icnss_vreg_info icnss_vreg_info[] = {
{NULL, "vdd-cx-mx", 752000, 752000, 0, 0, false},
{NULL, "vdd-1.8-xo", 1800000, 1800000, 0, 0, false},
{NULL, "vdd-1.3-rfa", 1304000, 1304000, 0, 0, false},
{NULL, "vdd-3.3-ch1", 3312000, 3312000, 0, 0, false},
{NULL, "vdd-3.3-ch0", 3312000, 3312000, 0, 0, false},
{NULL, "vdd-cx-mx", 752000, 752000, 0, 0, false, true},
{NULL, "vdd-1.8-xo", 1800000, 1800000, 0, 0, false, true},
{NULL, "vdd-1.3-rfa", 1304000, 1304000, 0, 0, false, true},
{NULL, "vdd-3.3-ch1", 3312000, 3312000, 0, 0, false, true},
{NULL, "vdd-3.3-ch0", 3312000, 3312000, 0, 0, false, true},
};
#define ICNSS_VREG_INFO_SIZE ARRAY_SIZE(icnss_vreg_info)
@ -391,9 +392,18 @@ static int icnss_vreg_on(struct icnss_priv *priv)
for (i = 0; i < ICNSS_VREG_INFO_SIZE; i++) {
vreg_info = &priv->vreg_info[i];
if (!vreg_info->reg)
if (!vreg_info->reg || !vreg_info->is_supported)
continue;
if (!priv->chain_reg_info_updated &&
!strcmp(ICNSS_CHAIN1_REGULATOR, vreg_info->name)) {
priv->chain_reg_info_updated = true;
if (!priv->is_chain1_supported) {
vreg_info->is_supported = false;
continue;
}
}
if (vreg_info->min_v || vreg_info->max_v) {
icnss_pr_vdbg("Set voltage for regulator %s\n",
vreg_info->name);
@ -440,7 +450,7 @@ static int icnss_vreg_on(struct icnss_priv *priv)
for (; i >= 0; i--) {
vreg_info = &priv->vreg_info[i];
if (!vreg_info->reg)
if (!vreg_info->reg || !vreg_info->is_supported)
continue;
regulator_disable(vreg_info->reg);
@ -465,7 +475,7 @@ static int icnss_vreg_off(struct icnss_priv *priv)
for (i = ICNSS_VREG_INFO_SIZE - 1; i >= 0; i--) {
vreg_info = &priv->vreg_info[i];
if (!vreg_info->reg)
if (!vreg_info->reg || !vreg_info->is_supported)
continue;
icnss_pr_vdbg("Regulator %s being disabled\n", vreg_info->name);
@ -1064,10 +1074,6 @@ static int icnss_driver_event_server_arrive(void *data)
set_bit(ICNSS_WLFW_CONNECTED, &penv->state);
ret = icnss_hw_power_on(penv);
if (ret)
goto clear_server;
ret = wlfw_ind_register_send_sync_msg(penv);
if (ret < 0) {
if (ret == -EALREADY) {
@ -1075,26 +1081,26 @@ static int icnss_driver_event_server_arrive(void *data)
goto qmi_registered;
}
ignore_assert = true;
goto err_power_on;
goto clear_server;
}
if (!penv->msa_va) {
icnss_pr_err("Invalid MSA address\n");
ret = -EINVAL;
goto err_power_on;
goto clear_server;
}
ret = wlfw_msa_mem_info_send_sync_msg(penv);
if (ret < 0) {
ignore_assert = true;
goto err_power_on;
goto clear_server;
}
if (!test_bit(ICNSS_MSA0_ASSIGNED, &penv->state)) {
ret = icnss_assign_msa_perm_all(penv,
ICNSS_MSA_PERM_WLAN_HW_RW);
if (ret < 0)
goto err_power_on;
goto clear_server;
set_bit(ICNSS_MSA0_ASSIGNED, &penv->state);
}
@ -1110,6 +1116,10 @@ static int icnss_driver_event_server_arrive(void *data)
goto err_setup_msa;
}
ret = icnss_hw_power_on(penv);
if (ret)
goto err_setup_msa;
wlfw_dynamic_feature_mask_send_sync_msg(penv,
dynamic_feature_mask);
@ -1130,8 +1140,6 @@ static int icnss_driver_event_server_arrive(void *data)
err_setup_msa:
icnss_assign_msa_perm_all(penv, ICNSS_MSA_PERM_HLOS_ALL);
clear_bit(ICNSS_MSA0_ASSIGNED, &penv->state);
err_power_on:
icnss_hw_power_off(penv);
clear_server:
icnss_clear_server(penv);
fail:
@ -3800,6 +3808,7 @@ static int icnss_probe(struct platform_device *pdev)
priv->pdev = pdev;
priv->vreg_info = icnss_vreg_info;
priv->is_chain1_supported = true;
icnss_allow_recursive_recovery(dev);

3
drivers/soc/qcom/icnss_private.h
View file

@ -175,6 +175,7 @@ struct icnss_vreg_info {
u32 load_ua;
unsigned long settle_delay;
bool required;
bool is_supported;
};
struct icnss_clk_info {
@ -385,6 +386,8 @@ struct icnss_priv {
int last_updated_voltage;
struct work_struct soc_update_work;
struct workqueue_struct *soc_update_wq;
bool is_chain1_supported;
bool chain_reg_info_updated;
};
struct icnss_reg_info {

3
drivers/soc/qcom/icnss_qmi.c
View file

@ -408,6 +408,9 @@ int wlfw_cap_send_sync_msg(struct icnss_priv *priv)
if (resp->fw_build_id_valid)
strlcpy(priv->fw_build_id, resp->fw_build_id,
QMI_WLFW_MAX_BUILD_ID_LEN_V01 + 1);
if (resp->rd_card_chain_cap_valid &&
resp->rd_card_chain_cap == WLFW_RD_CARD_CHAIN_CAP_1x1_V01)
priv->is_chain1_supported = false;
icnss_pr_dbg("Capability, chip_id: 0x%x, chip_family: 0x%x, board_id: 0x%x, soc_id: 0x%x, fw_version: 0x%x, fw_build_timestamp: %s, fw_build_id: %s",
priv->chip_info.chip_id, priv->chip_info.chip_family,