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Merge "dt-bindings: msm: Update documentation of qcom,llcc"

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qctecmdr Service 2018-09-13 18:57:06 -07:00 committed by Gerrit - the friendly Code Review server
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17
Documentation/devicetree/bindings/arm/msm/qcom,llcc.txt
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@ -16,17 +16,26 @@ Properties:
- reg:
Usage: required
Value Type: <prop-encoded-array>
Definition: Start address and the the size of the register regions.
Definition: The first element specifies the llcc base start address and
the size of the register region. The second element specifies
the llcc broadcast base address and size of the register region.
- regnames:
- reg-names:
Usage: required
Value Type: <stringlist>
Definition: Register region names. Must be "llcc_*"
Definition: Register region names. Must be "llcc_base", "llcc_broadcast_base".
- interrupts:
Usage: required
Definition: The interrupt is associated with the llcc edac device.
It's used for llcc cache single and double bit error detection
and reporting.
Example:
cache-controller@9200000 {
compatible = "qcom,kona-llcc";
reg = <0x9200000 0x200000> <0x9600000 0x50000>;
reg-names = "llcc_base", "llcc_bcast_base";
reg-names = "llcc_base", "llcc_broadcast_base";
interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
};