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49
Documentation/DocBook/libata.tmpl
View file

@ -107,10 +107,6 @@ void (*dev_config) (struct ata_port *, struct ata_device *);
issue of SET FEATURES - XFER MODE, and prior to operation.
</para>
<para>
Called by ata_device_add() after ata_dev_identify() determines
a device is present.
</para>
<para>
This entry may be specified as NULL in ata_port_operations.
</para>
@ -154,8 +150,8 @@ unsigned int (*mode_filter) (struct ata_port *, struct ata_device *, unsigned in
<sect2><title>Taskfile read/write</title>
<programlisting>
void (*tf_load) (struct ata_port *ap, struct ata_taskfile *tf);
void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf);
void (*sff_tf_load) (struct ata_port *ap, struct ata_taskfile *tf);
void (*sff_tf_read) (struct ata_port *ap, struct ata_taskfile *tf);
</programlisting>
<para>
@ -164,36 +160,35 @@ void (*tf_read) (struct ata_port *ap, struct ata_taskfile *tf);
hardware registers / DMA buffers, to obtain the current set of
taskfile register values.
Most drivers for taskfile-based hardware (PIO or MMIO) use
ata_tf_load() and ata_tf_read() for these hooks.
ata_sff_tf_load() and ata_sff_tf_read() for these hooks.
</para>
</sect2>
<sect2><title>PIO data read/write</title>
<programlisting>
void (*data_xfer) (struct ata_device *, unsigned char *, unsigned int, int);
void (*sff_data_xfer) (struct ata_device *, unsigned char *, unsigned int, int);
</programlisting>
<para>
All bmdma-style drivers must implement this hook. This is the low-level
operation that actually copies the data bytes during a PIO data
transfer.
Typically the driver
will choose one of ata_pio_data_xfer_noirq(), ata_pio_data_xfer(), or
ata_mmio_data_xfer().
Typically the driver will choose one of ata_sff_data_xfer_noirq(),
ata_sff_data_xfer(), or ata_sff_data_xfer32().
</para>
</sect2>
<sect2><title>ATA command execute</title>
<programlisting>
void (*exec_command)(struct ata_port *ap, struct ata_taskfile *tf);
void (*sff_exec_command)(struct ata_port *ap, struct ata_taskfile *tf);
</programlisting>
<para>
causes an ATA command, previously loaded with
->tf_load(), to be initiated in hardware.
Most drivers for taskfile-based hardware use ata_exec_command()
Most drivers for taskfile-based hardware use ata_sff_exec_command()
for this hook.
</para>
@ -218,8 +213,8 @@ command.
<sect2><title>Read specific ATA shadow registers</title>
<programlisting>
u8 (*check_status)(struct ata_port *ap);
u8 (*check_altstatus)(struct ata_port *ap);
u8 (*sff_check_status)(struct ata_port *ap);
u8 (*sff_check_altstatus)(struct ata_port *ap);
</programlisting>
<para>
@ -227,20 +222,14 @@ u8 (*check_altstatus)(struct ata_port *ap);
hardware. On some hardware, reading the Status register has
the side effect of clearing the interrupt condition.
Most drivers for taskfile-based hardware use
ata_check_status() for this hook.
</para>
<para>
Note that because this is called from ata_device_add(), at
least a dummy function that clears device interrupts must be
provided for all drivers, even if the controller doesn't
actually have a taskfile status register.
ata_sff_check_status() for this hook.
</para>
</sect2>
<sect2><title>Select ATA device on bus</title>
<programlisting>
void (*dev_select)(struct ata_port *ap, unsigned int device);
void (*sff_dev_select)(struct ata_port *ap, unsigned int device);
</programlisting>
<para>
@ -251,9 +240,7 @@ void (*dev_select)(struct ata_port *ap, unsigned int device);
</para>
<para>
Most drivers for taskfile-based hardware use
ata_std_dev_select() for this hook. Controllers which do not
support second drives on a port (such as SATA contollers) will
use ata_noop_dev_select().
ata_sff_dev_select() for this hook.
</para>
</sect2>
@ -441,13 +428,13 @@ void (*irq_clear) (struct ata_port *);
to struct ata_host_set.
</para>
<para>
Most legacy IDE drivers use ata_interrupt() for the
Most legacy IDE drivers use ata_sff_interrupt() for the
irq_handler hook, which scans all ports in the host_set,
determines which queued command was active (if any), and calls
ata_host_intr(ap,qc).
ata_sff_host_intr(ap,qc).
</para>
<para>
Most legacy IDE drivers use ata_bmdma_irq_clear() for the
Most legacy IDE drivers use ata_sff_irq_clear() for the
irq_clear() hook, which simply clears the interrupt and error
flags in the DMA status register.
</para>
@ -496,10 +483,6 @@ void (*host_stop) (struct ata_host_set *host_set);
data from port at this time.
</para>
<para>
Many drivers use ata_port_stop() as this hook, which frees the
PRD table.
</para>
<para>
->host_stop() is called after all ->port_stop() calls
have completed. The hook must finalize hardware shutdown, release DMA
and other resources, etc.

13
Documentation/DocBook/tracepoint.tmpl
View file

@ -16,6 +16,15 @@
</address>
</affiliation>
</author>
<author>
<firstname>William</firstname>
<surname>Cohen</surname>
<affiliation>
<address>
<email>wcohen@redhat.com</email>
</address>
</affiliation>
</author>
</authorgroup>
<legalnotice>
@ -91,4 +100,8 @@
!Iinclude/trace/events/signal.h
</chapter>
<chapter id="block">
<title>Block IO</title>
!Iinclude/trace/events/block.h
</chapter>
</book>

2
Documentation/HOWTO
View file

@ -234,7 +234,7 @@ process is as follows:
Linus, usually the patches that have already been included in the
-next kernel for a few weeks. The preferred way to submit big changes
is using git (the kernel's source management tool, more information
can be found at http://git.or.cz/) but plain patches are also just
can be found at http://git-scm.com/) but plain patches are also just
fine.
- After two weeks a -rc1 kernel is released it is now possible to push
only patches that do not include new features that could affect the

37
Documentation/RCU/NMI-RCU.txt
View file

@ -34,7 +34,7 @@ NMI handler.
cpu = smp_processor_id();
++nmi_count(cpu);
if (!rcu_dereference(nmi_callback)(regs, cpu))
if (!rcu_dereference_sched(nmi_callback)(regs, cpu))
default_do_nmi(regs);
nmi_exit();
@ -47,12 +47,13 @@ function pointer. If this handler returns zero, do_nmi() invokes the
default_do_nmi() function to handle a machine-specific NMI. Finally,
preemption is restored.
Strictly speaking, rcu_dereference() is not needed, since this code runs
only on i386, which does not need rcu_dereference() anyway. However,
it is a good documentation aid, particularly for anyone attempting to
do something similar on Alpha.
In theory, rcu_dereference_sched() is not needed, since this code runs
only on i386, which in theory does not need rcu_dereference_sched()
anyway. However, in practice it is a good documentation aid, particularly
for anyone attempting to do something similar on Alpha or on systems
with aggressive optimizing compilers.
Quick Quiz: Why might the rcu_dereference() be necessary on Alpha,
Quick Quiz: Why might the rcu_dereference_sched() be necessary on Alpha,
given that the code referenced by the pointer is read-only?
@ -99,17 +100,21 @@ invoke irq_enter() and irq_exit() on NMI entry and exit, respectively.
Answer to Quick Quiz
Why might the rcu_dereference() be necessary on Alpha, given
Why might the rcu_dereference_sched() be necessary on Alpha, given
that the code referenced by the pointer is read-only?
Answer: The caller to set_nmi_callback() might well have
initialized some data that is to be used by the
new NMI handler. In this case, the rcu_dereference()
would be needed, because otherwise a CPU that received
an NMI just after the new handler was set might see
the pointer to the new NMI handler, but the old
pre-initialized version of the handler's data.
initialized some data that is to be used by the new NMI
handler. In this case, the rcu_dereference_sched() would
be needed, because otherwise a CPU that received an NMI
just after the new handler was set might see the pointer
to the new NMI handler, but the old pre-initialized
version of the handler's data.
More important, the rcu_dereference() makes it clear
to someone reading the code that the pointer is being
protected by RCU.
This same sad story can happen on other CPUs when using
a compiler with aggressive pointer-value speculation
optimizations.
More important, the rcu_dereference_sched() makes it
clear to someone reading the code that the pointer is
being protected by RCU-sched.

7
Documentation/RCU/checklist.txt
View file

@ -260,7 +260,8 @@ over a rather long period of time, but improvements are always welcome!
The reason that it is permissible to use RCU list-traversal
primitives when the update-side lock is held is that doing so
can be quite helpful in reducing code bloat when common code is
shared between readers and updaters.
shared between readers and updaters. Additional primitives
are provided for this case, as discussed in lockdep.txt.
10. Conversely, if you are in an RCU read-side critical section,
and you don't hold the appropriate update-side lock, you -must-
@ -344,8 +345,8 @@ over a rather long period of time, but improvements are always welcome!
requiring SRCU's read-side deadlock immunity or low read-side
realtime latency.
Note that, rcu_assign_pointer() and rcu_dereference() relate to
SRCU just as they do to other forms of RCU.
Note that, rcu_assign_pointer() relates to SRCU just as they do
to other forms of RCU.
15. The whole point of call_rcu(), synchronize_rcu(), and friends
is to wait until all pre-existing readers have finished before

28
Documentation/RCU/lockdep.txt
View file

@ -32,9 +32,20 @@ checking of rcu_dereference() primitives:
srcu_dereference(p, sp):
Check for SRCU read-side critical section.
rcu_dereference_check(p, c):
Use explicit check expression "c".
Use explicit check expression "c". This is useful in
code that is invoked by both readers and updaters.
rcu_dereference_raw(p)
Don't check. (Use sparingly, if at all.)
rcu_dereference_protected(p, c):
Use explicit check expression "c", and omit all barriers
and compiler constraints. This is useful when the data
structure cannot change, for example, in code that is
invoked only by updaters.
rcu_access_pointer(p):
Return the value of the pointer and omit all barriers,
but retain the compiler constraints that prevent duplicating
or coalescsing. This is useful when when testing the
value of the pointer itself, for example, against NULL.
The rcu_dereference_check() check expression can be any boolean
expression, but would normally include one of the rcu_read_lock_held()
@ -59,7 +70,20 @@ In case (1), the pointer is picked up in an RCU-safe manner for vanilla
RCU read-side critical sections, in case (2) the ->file_lock prevents
any change from taking place, and finally, in case (3) the current task
is the only task accessing the file_struct, again preventing any change
from taking place.
from taking place. If the above statement was invoked only from updater
code, it could instead be written as follows:
file = rcu_dereference_protected(fdt->fd[fd],
lockdep_is_held(&files->file_lock) ||
atomic_read(&files->count) == 1);
This would verify cases #2 and #3 above, and furthermore lockdep would
complain if this was used in an RCU read-side critical section unless one
of these two cases held. Because rcu_dereference_protected() omits all
barriers and compiler constraints, it generates better code than do the
other flavors of rcu_dereference(). On the other hand, it is illegal
to use rcu_dereference_protected() if either the RCU-protected pointer
or the RCU-protected data that it points to can change concurrently.
There are currently only "universal" versions of the rcu_assign_pointer()
and RCU list-/tree-traversal primitives, which do not (yet) check for

6
Documentation/RCU/whatisRCU.txt
View file

@ -840,6 +840,12 @@ SRCU: Initialization/cleanup
init_srcu_struct
cleanup_srcu_struct
All: lockdep-checked RCU-protected pointer access
rcu_dereference_check
rcu_dereference_protected
rcu_access_pointer
See the comment headers in the source code (or the docbook generated
from them) for more information.

4
Documentation/block/biodoc.txt
View file

@ -1162,8 +1162,8 @@ where a driver received a request ala this before:
As mentioned, there is no virtual mapping of a bio. For DMA, this is
not a problem as the driver probably never will need a virtual mapping.
Instead it needs a bus mapping (pci_map_page for a single segment or
use blk_rq_map_sg for scatter gather) to be able to ship it to the driver. For
Instead it needs a bus mapping (dma_map_page for a single segment or
use dma_map_sg for scatter gather) to be able to ship it to the driver. For
PIO drivers (or drivers that need to revert to PIO transfer once in a
while (IDE for example)), where the CPU is doing the actual data
transfer a virtual mapping is needed. If the driver supports highmem I/O,

3
Documentation/cgroups/cgroups.txt
View file

@ -235,8 +235,7 @@ containing the following files describing that cgroup:
- cgroup.procs: list of tgids in the cgroup. This list is not
guaranteed to be sorted or free of duplicate tgids, and userspace
should sort/uniquify the list if this property is required.
Writing a tgid into this file moves all threads with that tgid into
this cgroup.
This is a read-only file, for now.
- notify_on_release flag: run the release agent on exit?
- release_agent: the path to use for release notifications (this file
exists in the top cgroup only)

14
Documentation/fb/imacfb.txt → Documentation/fb/efifb.txt
View file

@ -1,9 +1,9 @@
What is imacfb?
What is efifb?
===============
This is a generic EFI platform driver for Intel based Apple computers.
Imacfb is only for EFI booted Intel Macs.
efifb is only for EFI booted Intel Macs.
Supported Hardware
==================
@ -16,16 +16,16 @@ MacMini
How to use it?
==============
Imacfb does not have any kind of autodetection of your machine.
efifb does not have any kind of autodetection of your machine.
You have to add the following kernel parameters in your elilo.conf:
Macbook :
video=imacfb:macbook
video=efifb:macbook
MacMini :
video=imacfb:mini
video=efifb:mini
Macbook Pro 15", iMac 17" :
video=imacfb:i17
video=efifb:i17
Macbook Pro 17", iMac 20" :
video=imacfb:i20
video=efifb:i20
--
Edgar Hucek <gimli@dark-green.com>

5
Documentation/i2c/writing-clients
View file

@ -74,6 +74,11 @@ structure at all. You should use this to keep device-specific data.
/* retrieve the value */
void *i2c_get_clientdata(const struct i2c_client *client);
Note that starting with kernel 2.6.34, you don't have to set the `data' field
to NULL in remove() or if probe() failed anymore. The i2c-core does this
automatically on these occasions. Those are also the only times the core will
touch this field.
Accessing the client
====================

8
Documentation/input/elantech.txt
View file

@ -333,14 +333,14 @@ byte 0:
byte 1:
bit 7 6 5 4 3 2 1 0
x15 x14 x13 x12 x11 x10 x9 x8
. . . . . x10 x9 x8
byte 2:
bit 7 6 5 4 3 2 1 0
x7 x6 x5 x4 x4 x2 x1 x0
x15..x0 = absolute x value (horizontal)
x10..x0 = absolute x value (horizontal)
byte 3:
@ -350,14 +350,14 @@ byte 3:
byte 4:
bit 7 6 5 4 3 2 1 0
y15 y14 y13 y12 y11 y10 y8 y8
. . . . . . y9 y8
byte 5:
bit 7 6 5 4 3 2 1 0
y7 y6 y5 y4 y3 y2 y1 y0
y15..y0 = absolute y value (vertical)
y9..y0 = absolute y value (vertical)
4.2.2 Two finger touch

23
Documentation/input/multi-touch-protocol.txt
View file

@ -68,6 +68,22 @@ like:
SYN_MT_REPORT
SYN_REPORT
Here is the sequence after lifting one of the fingers:
ABS_MT_POSITION_X
ABS_MT_POSITION_Y
SYN_MT_REPORT
SYN_REPORT
And here is the sequence after lifting the remaining finger:
SYN_MT_REPORT
SYN_REPORT
If the driver reports one of BTN_TOUCH or ABS_PRESSURE in addition to the
ABS_MT events, the last SYN_MT_REPORT event may be omitted. Otherwise, the
last SYN_REPORT will be dropped by the input core, resulting in no
zero-finger event reaching userland.
Event Semantics
---------------
@ -217,11 +233,6 @@ where examples can be found.
difference between the contact position and the approaching tool position
could be used to derive tilt.
[2] The list can of course be extended.
[3] The multi-touch X driver is currently in the prototyping stage. At the
time of writing (April 2009), the MT protocol is not yet merged, and the
prototype implements finger matching, basic mouse support and two-finger
scrolling. The project aims at improving the quality of current multi-touch
functionality available in the Synaptics X driver, and in addition
implement more advanced gestures.
[3] Multitouch X driver project: http://bitmath.org/code/multitouch/.
[4] See the section on event computation.
[5] See the section on finger tracking.

7
Documentation/kernel-parameters.txt
View file

@ -320,11 +320,6 @@ and is between 256 and 4096 characters. It is defined in the file
amd_iommu= [HW,X86-84]
Pass parameters to the AMD IOMMU driver in the system.
Possible values are:
isolate - enable device isolation (each device, as far
as possible, will get its own protection
domain) [default]
share - put every device behind one IOMMU into the
same protection domain
fullflush - enable flushing of IO/TLB entries when
they are unmapped. Otherwise they are
flushed before they will be reused, which
@ -1199,7 +1194,7 @@ and is between 256 and 4096 characters. It is defined in the file
libata.force= [LIBATA] Force configurations. The format is comma
separated list of "[ID:]VAL" where ID is
PORT[:DEVICE]. PORT and DEVICE are decimal numbers
PORT[.DEVICE]. PORT and DEVICE are decimal numbers
matching port, link or device. Basically, it matches
the ATA ID string printed on console by libata. If
the whole ID part is omitted, the last PORT and DEVICE

76
Documentation/networking/timestamping.txt
View file

@ -41,11 +41,12 @@ SOF_TIMESTAMPING_SOFTWARE: return system time stamp generated in
SOF_TIMESTAMPING_TX/RX determine how time stamps are generated.
SOF_TIMESTAMPING_RAW/SYS determine how they are reported in the
following control message:
struct scm_timestamping {
struct timespec systime;
struct timespec hwtimetrans;
struct timespec hwtimeraw;
};
struct scm_timestamping {
struct timespec systime;
struct timespec hwtimetrans;
struct timespec hwtimeraw;
};
recvmsg() can be used to get this control message for regular incoming
packets. For send time stamps the outgoing packet is looped back to
@ -87,12 +88,13 @@ by the network device and will be empty without that support.
SIOCSHWTSTAMP:
Hardware time stamping must also be initialized for each device driver
that is expected to do hardware time stamping. The parameter is:
that is expected to do hardware time stamping. The parameter is defined in
/include/linux/net_tstamp.h as:
struct hwtstamp_config {
int flags; /* no flags defined right now, must be zero */
int tx_type; /* HWTSTAMP_TX_* */
int rx_filter; /* HWTSTAMP_FILTER_* */
int flags; /* no flags defined right now, must be zero */
int tx_type; /* HWTSTAMP_TX_* */
int rx_filter; /* HWTSTAMP_FILTER_* */
};
Desired behavior is passed into the kernel and to a specific device by
@ -139,42 +141,56 @@ enum {
/* time stamp any incoming packet */
HWTSTAMP_FILTER_ALL,
/* return value: time stamp all packets requested plus some others */
HWTSTAMP_FILTER_SOME,
/* return value: time stamp all packets requested plus some others */
HWTSTAMP_FILTER_SOME,
/* PTP v1, UDP, any kind of event packet */
HWTSTAMP_FILTER_PTP_V1_L4_EVENT,
...
/* for the complete list of values, please check
* the include file /include/linux/net_tstamp.h
*/
};
DEVICE IMPLEMENTATION
A driver which supports hardware time stamping must support the
SIOCSHWTSTAMP ioctl. Time stamps for received packets must be stored
in the skb with skb_hwtstamp_set().
SIOCSHWTSTAMP ioctl and update the supplied struct hwtstamp_config with
the actual values as described in the section on SIOCSHWTSTAMP.
Time stamps for received packets must be stored in the skb. To get a pointer
to the shared time stamp structure of the skb call skb_hwtstamps(). Then
set the time stamps in the structure:
struct skb_shared_hwtstamps {
/* hardware time stamp transformed into duration
* since arbitrary point in time
*/
ktime_t hwtstamp;
ktime_t syststamp; /* hwtstamp transformed to system time base */
};
Time stamps for outgoing packets are to be generated as follows:
- In hard_start_xmit(), check if skb_hwtstamp_check_tx_hardware()
returns non-zero. If yes, then the driver is expected
to do hardware time stamping.
- In hard_start_xmit(), check if skb_tx(skb)->hardware is set no-zero.
If yes, then the driver is expected to do hardware time stamping.
- If this is possible for the skb and requested, then declare
that the driver is doing the time stamping by calling
skb_hwtstamp_tx_in_progress(). A driver not supporting
hardware time stamping doesn't do that. A driver must never
touch sk_buff::tstamp! It is used to store how time stamping
for an outgoing packets is to be done.
that the driver is doing the time stamping by setting the field
skb_tx(skb)->in_progress non-zero. You might want to keep a pointer
to the associated skb for the next step and not free the skb. A driver
not supporting hardware time stamping doesn't do that. A driver must
never touch sk_buff::tstamp! It is used to store software generated
time stamps by the network subsystem.
- As soon as the driver has sent the packet and/or obtained a
hardware time stamp for it, it passes the time stamp back by
calling skb_hwtstamp_tx() with the original skb, the raw
hardware time stamp and a handle to the device (necessary
to convert the hardware time stamp to system time). If obtaining
the hardware time stamp somehow fails, then the driver should
not fall back to software time stamping. The rationale is that
this would occur at a later time in the processing pipeline
than other software time stamping and therefore could lead
to unexpected deltas between time stamps.
- If the driver did not call skb_hwtstamp_tx_in_progress(), then
hardware time stamp. skb_hwtstamp_tx() clones the original skb and
adds the timestamps, therefore the original skb has to be freed now.
If obtaining the hardware time stamp somehow fails, then the driver
should not fall back to software time stamping. The rationale is that
this would occur at a later time in the processing pipeline than other
software time stamping and therefore could lead to unexpected deltas
between time stamps.
- If the driver did not call set skb_tx(skb)->in_progress, then
dev_hard_start_xmit() checks whether software time stamping
is wanted as fallback and potentially generates the time stamp.

16
Documentation/sound/alsa/HD-Audio.txt
View file

@ -119,10 +119,18 @@ the codec slots 0 and 1 no matter what the hardware reports.
Interrupt Handling
~~~~~~~~~~~~~~~~~~
In rare but some cases, the interrupt isn't properly handled as
default. You would notice this by the DMA transfer error reported by
ALSA PCM core, for example. Using MSI might help in such a case.
Pass `enable_msi=1` option for enabling MSI.
HD-audio driver uses MSI as default (if available) since 2.6.33
kernel as MSI works better on some machines, and in general, it's
better for performance. However, Nvidia controllers showed bad
regressions with MSI (especially in a combination with AMD chipset),
thus we disabled MSI for them.
There seem also still other devices that don't work with MSI. If you
see a regression wrt the sound quality (stuttering, etc) or a lock-up
in the recent kernel, try to pass `enable_msi=0` option to disable
MSI. If it works, you can add the known bad device to the blacklist
defined in hda_intel.c. In such a case, please report and give the
patch back to the upstream developer.
HD-AUDIO CODEC

2
Documentation/spi/spidev_test.c
View file

@ -58,7 +58,7 @@ static void transfer(int fd)
};
ret = ioctl(fd, SPI_IOC_MESSAGE(1), &tr);
if (ret == 1)
if (ret < 1)
pabort("can't send spi message");
for (ret = 0; ret < ARRAY_SIZE(tx); ret++) {

9
Documentation/stable_kernel_rules.txt
View file

@ -18,16 +18,15 @@ Rules on what kind of patches are accepted, and which ones are not, into the
- It cannot contain any "trivial" fixes in it (spelling changes,
whitespace cleanups, etc).
- It must follow the Documentation/SubmittingPatches rules.
- It or an equivalent fix must already exist in Linus' tree. Quote the
respective commit ID in Linus' tree in your patch submission to -stable.
- It or an equivalent fix must already exist in Linus' tree (upstream).
Procedure for submitting patches to the -stable tree:
- Send the patch, after verifying that it follows the above rules, to
stable@kernel.org.
- To have the patch automatically included in the stable tree, add the
the tag
stable@kernel.org. You must note the upstream commit ID in the changelog
of your submission.
- To have the patch automatically included in the stable tree, add the tag
Cc: stable@kernel.org
in the sign-off area. Once the patch is merged it will be applied to
the stable tree without anything else needing to be done by the author

40
MAINTAINERS
View file

@ -485,8 +485,8 @@ S: Maintained
F: drivers/input/mouse/bcm5974.c
APPLE SMC DRIVER
M: Nicolas Boichat <nicolas@boichat.ch>
L: mactel-linux-devel@lists.sourceforge.net
M: Henrik Rydberg <rydberg@euromail.se>
L: lm-sensors@lm-sensors.org
S: Maintained
F: drivers/hwmon/applesmc.c
@ -971,6 +971,16 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
W: http://www.mcuos.com
S: Maintained
ARM/U300 MACHINE SUPPORT
M: Linus Walleij <linus.walleij@stericsson.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Supported
F: arch/arm/mach-u300/
F: drivers/i2c/busses/i2c-stu300.c
F: drivers/rtc/rtc-coh901331.c
F: drivers/watchdog/coh901327_wdt.c
F: drivers/dma/coh901318*
ARM/U8500 ARM ARCHITECTURE
M: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@ -1950,7 +1960,7 @@ F: lib/kobj*
DRM DRIVERS
M: David Airlie <airlied@linux.ie>
L: dri-devel@lists.sourceforge.net
L: dri-devel@lists.freedesktop.org
T: git git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6.git
S: Maintained
F: drivers/gpu/drm/
@ -2474,12 +2484,6 @@ L: linuxppc-dev@ozlabs.org
S: Odd Fixes
F: drivers/char/hvc_*
VIRTIO CONSOLE DRIVER
M: Amit Shah <amit.shah@redhat.com>
L: virtualization@lists.linux-foundation.org
S: Maintained
F: drivers/char/virtio_console.c
iSCSI BOOT FIRMWARE TABLE (iBFT) DRIVER
M: Peter Jones <pjones@redhat.com>
M: Konrad Rzeszutek Wilk <konrad@kernel.org>
@ -4478,17 +4482,17 @@ S: Maintained
F: drivers/ata/sata_promise.*
PS3 NETWORK SUPPORT
M: Geoff Levand <geoffrey.levand@am.sony.com>
M: Geoff Levand <geoff@infradead.org>
L: netdev@vger.kernel.org
L: cbe-oss-dev@ozlabs.org
S: Supported
S: Maintained
F: drivers/net/ps3_gelic_net.*
PS3 PLATFORM SUPPORT
M: Geoff Levand <geoffrey.levand@am.sony.com>
M: Geoff Levand <geoff@infradead.org>
L: linuxppc-dev@ozlabs.org
L: cbe-oss-dev@ozlabs.org
S: Supported
S: Maintained
F: arch/powerpc/boot/ps3*
F: arch/powerpc/include/asm/lv1call.h
F: arch/powerpc/include/asm/ps3*.h
@ -4787,12 +4791,11 @@ F: drivers/s390/crypto/
S390 ZFCP DRIVER
M: Christof Schmitt <christof.schmitt@de.ibm.com>
M: Martin Peschke <mp3@de.ibm.com>
M: Swen Schillig <swen@vnet.ibm.com>
M: linux390@de.ibm.com
L: linux-s390@vger.kernel.org
W: http://www.ibm.com/developerworks/linux/linux390/
S: Supported
F: Documentation/s390/zfcpdump.txt
F: drivers/s390/scsi/zfcp_*
S390 IUCV NETWORK LAYER
@ -5971,6 +5974,13 @@ S: Maintained
F: Documentation/filesystems/vfat.txt
F: fs/fat/
VIRTIO CONSOLE DRIVER
M: Amit Shah <amit.shah@redhat.com>
L: virtualization@lists.linux-foundation.org
S: Maintained
F: drivers/char/virtio_console.c
F: include/linux/virtio_console.h
VIRTIO HOST (VHOST)
M: "Michael S. Tsirkin" <mst@redhat.com>
L: kvm@vger.kernel.org

4
Makefile
View file

@ -1,8 +1,8 @@
VERSION = 2
PATCHLEVEL = 6
SUBLEVEL = 34
EXTRAVERSION = -rc3
NAME = Man-Eating Seals of Antiquity
EXTRAVERSION = -rc6
NAME = Sheep on Meth
# *DOCUMENTATION*
# To see a list of typical targets execute "make help"

1
arch/arm/Kconfig
View file

@ -253,6 +253,7 @@ config ARCH_REALVIEW
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
select ARCH_WANT_OPTIONAL_GPIOLIB
select GPIO_PL061 if GPIOLIB
help
This enables support for ARM Ltd RealView boards.

2
arch/arm/boot/compressed/head.S
View file

@ -172,7 +172,7 @@ not_angel:
adr r0, LC0
ARM( ldmia r0, {r1, r2, r3, r4, r5, r6, r11, ip, sp})
THUMB( ldmia r0, {r1, r2, r3, r4, r5, r6, r11, ip} )
THUMB( ldr sp, [r0, #28] )
THUMB( ldr sp, [r0, #32] )
subs r0, r0, r1 @ calculate the delta offset
@ if delta is zero, we are

126
arch/arm/configs/bcmring_defconfig
View file

@ -1,13 +1,13 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.31-rc3
# Fri Jul 17 12:07:28 2009
# Linux kernel version: 2.6.34-rc2
# Mon Mar 29 12:01:41 2010
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_GENERIC_TIME=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_MMU=y
CONFIG_HAVE_PROC_CPU=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
@ -18,6 +18,7 @@ CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_VECTORS_BASE=0xffff0000
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
@ -32,6 +33,12 @@ CONFIG_LOCK_KERNEL=y
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_LOCALVERSION=""
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_LZO=y
CONFIG_KERNEL_GZIP=y
# CONFIG_KERNEL_BZIP2 is not set
# CONFIG_KERNEL_LZMA is not set
# CONFIG_KERNEL_LZO is not set
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
@ -43,21 +50,22 @@ CONFIG_SYSVIPC_SYSCTL=y
#
# RCU Subsystem
#
CONFIG_CLASSIC_RCU=y
# CONFIG_TREE_RCU is not set
# CONFIG_PREEMPT_RCU is not set
CONFIG_TREE_RCU=y
# CONFIG_TREE_PREEMPT_RCU is not set
# CONFIG_TINY_RCU is not set
# CONFIG_RCU_TRACE is not set
CONFIG_RCU_FANOUT=32
# CONFIG_RCU_FANOUT_EXACT is not set
# CONFIG_TREE_RCU_TRACE is not set
# CONFIG_PREEMPT_RCU_TRACE is not set
# CONFIG_IKCONFIG is not set
CONFIG_LOG_BUF_SHIFT=17
# CONFIG_GROUP_SCHED is not set
# CONFIG_CGROUPS is not set
# CONFIG_SYSFS_DEPRECATED_V2 is not set
# CONFIG_RELAY is not set
# CONFIG_NAMESPACES is not set
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y
CONFIG_EMBEDDED=y
CONFIG_UID16=y
CONFIG_SYSCTL_SYSCALL=y
@ -75,19 +83,21 @@ CONFIG_FUTEX=y
# CONFIG_EVENTFD is not set
CONFIG_SHMEM=y
# CONFIG_AIO is not set
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_PERF_USE_VMALLOC=y
#
# Performance Counters
# Kernel Performance Events And Counters
#
CONFIG_PERF_EVENTS=y
CONFIG_PERF_COUNTERS=y
# CONFIG_VM_EVENT_COUNTERS is not set
# CONFIG_SLUB_DEBUG is not set
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_COMPAT_BRK is not set
# CONFIG_SLAB is not set
CONFIG_SLUB=y
# CONFIG_SLOB is not set
# CONFIG_PROFILING is not set
# CONFIG_MARKERS is not set
CONFIG_HAVE_OPROFILE=y
# CONFIG_KPROBES is not set
CONFIG_HAVE_KPROBES=y
@ -115,24 +125,53 @@ CONFIG_LBDAF=y
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
# CONFIG_IOSCHED_AS is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
# CONFIG_DEFAULT_AS is not set
# CONFIG_DEFAULT_DEADLINE is not set
# CONFIG_DEFAULT_CFQ is not set
CONFIG_DEFAULT_NOOP=y
CONFIG_DEFAULT_IOSCHED="noop"
# CONFIG_INLINE_SPIN_TRYLOCK is not set
# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
# CONFIG_INLINE_SPIN_LOCK is not set
# CONFIG_INLINE_SPIN_LOCK_BH is not set
# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
# CONFIG_INLINE_SPIN_UNLOCK is not set
# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
# CONFIG_INLINE_SPIN_UNLOCK_IRQ is not set
# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
# CONFIG_INLINE_READ_TRYLOCK is not set
# CONFIG_INLINE_READ_LOCK is not set
# CONFIG_INLINE_READ_LOCK_BH is not set
# CONFIG_INLINE_READ_LOCK_IRQ is not set
# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
# CONFIG_INLINE_READ_UNLOCK is not set
# CONFIG_INLINE_READ_UNLOCK_BH is not set
# CONFIG_INLINE_READ_UNLOCK_IRQ is not set
# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
# CONFIG_INLINE_WRITE_TRYLOCK is not set
# CONFIG_INLINE_WRITE_LOCK is not set
# CONFIG_INLINE_WRITE_LOCK_BH is not set
# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
# CONFIG_INLINE_WRITE_UNLOCK is not set
# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
# CONFIG_INLINE_WRITE_UNLOCK_IRQ is not set
# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
# CONFIG_MUTEX_SPIN_ON_OWNER is not set
# CONFIG_FREEZER is not set
#
# System Type
#
CONFIG_MMU=y
# CONFIG_ARCH_AAEC2000 is not set
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_REALVIEW is not set
# CONFIG_ARCH_VERSATILE is not set
# CONFIG_ARCH_AT91 is not set
CONFIG_ARCH_BCMRING=y
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_GEMINI is not set
# CONFIG_ARCH_EBSA110 is not set
@ -149,6 +188,7 @@ CONFIG_DEFAULT_IOSCHED="noop"
# CONFIG_ARCH_IXP2000 is not set
# CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_L7200 is not set
# CONFIG_ARCH_DOVE is not set
# CONFIG_ARCH_KIRKWOOD is not set
# CONFIG_ARCH_LOKI is not set
# CONFIG_ARCH_MV78XX0 is not set
@ -157,19 +197,26 @@ CONFIG_DEFAULT_IOSCHED="noop"
# CONFIG_ARCH_KS8695 is not set
# CONFIG_ARCH_NS9XXX is not set
# CONFIG_ARCH_W90X900 is not set
# CONFIG_ARCH_NUC93X is not set
# CONFIG_ARCH_PNX4008 is not set
# CONFIG_ARCH_PXA is not set
# CONFIG_ARCH_MSM is not set
# CONFIG_ARCH_SHMOBILE is not set
# CONFIG_ARCH_RPC is not set
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_S3C2410 is not set
# CONFIG_ARCH_S3C64XX is not set
# CONFIG_ARCH_S5P6440 is not set
# CONFIG_ARCH_S5P6442 is not set
# CONFIG_ARCH_S5PC1XX is not set
# CONFIG_ARCH_S5PV210 is not set
# CONFIG_ARCH_SHARK is not set
# CONFIG_ARCH_LH7A40X is not set
# CONFIG_ARCH_U300 is not set
# CONFIG_ARCH_U8500 is not set
# CONFIG_ARCH_NOMADIK is not set
# CONFIG_ARCH_DAVINCI is not set
# CONFIG_ARCH_OMAP is not set
CONFIG_ARCH_BCMRING=y
# CONFIG_ARCH_FPGA11107 is not set
CONFIG_ARCH_BCM11107=y
@ -185,7 +232,7 @@ CONFIG_CPU_V6=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_32v6=y
CONFIG_CPU_ABRT_EV6=y
CONFIG_CPU_PABRT_NOIFAR=y
CONFIG_CPU_PABRT_V6=y
CONFIG_CPU_CACHE_V6=y
CONFIG_CPU_CACHE_VIPT=y
CONFIG_CPU_COPY_V6=y
@ -201,6 +248,8 @@ CONFIG_ARM_THUMB=y
# CONFIG_CPU_ICACHE_DISABLE is not set
# CONFIG_CPU_DCACHE_DISABLE is not set
# CONFIG_CPU_BPREDICT_DISABLE is not set
CONFIG_ARM_L1_CACHE_SHIFT=5
CONFIG_CPU_HAS_PMU=y
# CONFIG_ARM_ERRATA_411920 is not set
CONFIG_COMMON_CLKDEV=y
@ -222,6 +271,8 @@ CONFIG_VMSPLIT_3G=y
# CONFIG_VMSPLIT_2G is not set
# CONFIG_VMSPLIT_1G is not set
CONFIG_PAGE_OFFSET=0xC0000000
# CONFIG_PREEMPT_NONE is not set
# CONFIG_PREEMPT_VOLUNTARY is not set
CONFIG_PREEMPT=y
CONFIG_HZ=100
CONFIG_AEABI=y
@ -229,6 +280,7 @@ CONFIG_AEABI=y
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
# CONFIG_HIGHMEM is not set
CONFIG_HW_PERF_EVENTS=y
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
# CONFIG_DISCONTIGMEM_MANUAL is not set
@ -240,8 +292,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_PHYS_ADDR_T_64BIT is not set
CONFIG_ZONE_DMA_FLAG=0
CONFIG_VIRT_TO_BUS=y
CONFIG_HAVE_MLOCK=y
CONFIG_HAVE_MLOCKED_PAGE_BIT=y
# CONFIG_KSM is not set
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
CONFIG_ALIGNMENT_TRAP=y
CONFIG_UACCESS_WITH_MEMCPY=y
@ -335,9 +386,9 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_CONNECTOR is not set
CONFIG_MTD=y
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_TESTS is not set
CONFIG_MTD_CONCAT=y
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_TESTS is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MTD_AFS_PARTS is not set
@ -433,6 +484,10 @@ CONFIG_MTD_NAND_BCM_UMI_HWCS=y
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_COW_COMMON is not set
# CONFIG_BLK_DEV_LOOP is not set
#
# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
#
# CONFIG_BLK_DEV_NBD is not set
# CONFIG_BLK_DEV_RAM is not set
# CONFIG_CDROM_PKTCDVD is not set
@ -444,6 +499,7 @@ CONFIG_HAVE_IDE=y
#
# SCSI device support
#
CONFIG_SCSI_MOD=y
# CONFIG_RAID_ATTRS is not set
# CONFIG_SCSI is not set
# CONFIG_SCSI_DMA is not set
@ -452,6 +508,7 @@ CONFIG_HAVE_IDE=y
# CONFIG_MD is not set
# CONFIG_NETDEVICES is not set
# CONFIG_ISDN is not set
# CONFIG_PHONE is not set
#
# Input device support
@ -459,6 +516,7 @@ CONFIG_HAVE_IDE=y
CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set
# CONFIG_INPUT_POLLDEV is not set
# CONFIG_INPUT_SPARSEKMAP is not set
#
# Userland interfaces
@ -508,6 +566,7 @@ CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_TIMBERDALE is not set
CONFIG_UNIX98_PTYS=y
# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
CONFIG_LEGACY_PTYS=y
@ -519,13 +578,17 @@ CONFIG_LEGACY_PTY_COUNT=64
# CONFIG_TCG_TPM is not set
# CONFIG_I2C is not set
# CONFIG_SPI is not set
#
# PPS support
#
# CONFIG_PPS is not set
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
# CONFIG_GPIOLIB is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
# CONFIG_THERMAL_HWMON is not set
# CONFIG_WATCHDOG is not set
CONFIG_SSB_POSSIBLE=y
@ -541,6 +604,7 @@ CONFIG_SSB_POSSIBLE=y
# CONFIG_MFD_SM501 is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_REGULATOR is not set
# CONFIG_MEDIA_SUPPORT is not set
#
@ -566,14 +630,17 @@ CONFIG_DUMMY_CONSOLE=y
# CONFIG_USB_SUPPORT is not set
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
# CONFIG_ACCESSIBILITY is not set
# CONFIG_NEW_LEDS is not set
# CONFIG_ACCESSIBILITY is not set
CONFIG_RTC_LIB=y
# CONFIG_RTC_CLASS is not set
# CONFIG_DMADEVICES is not set
# CONFIG_AUXDISPLAY is not set
# CONFIG_REGULATOR is not set
# CONFIG_UIO is not set
#
# TI VLYNQ
#
# CONFIG_STAGING is not set
#
@ -589,9 +656,12 @@ CONFIG_FS_POSIX_ACL=y
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_BTRFS_FS is not set
# CONFIG_NILFS2_FS is not set
# CONFIG_FILE_LOCKING is not set
# CONFIG_FSNOTIFY is not set
# CONFIG_DNOTIFY is not set
# CONFIG_INOTIFY is not set
# CONFIG_INOTIFY_USER is not set
# CONFIG_QUOTA is not set
# CONFIG_AUTOFS_FS is not set
# CONFIG_AUTOFS4_FS is not set
@ -647,6 +717,7 @@ CONFIG_JFFS2_ZLIB=y
# CONFIG_JFFS2_LZO is not set
CONFIG_JFFS2_RTIME=y
# CONFIG_JFFS2_RUBIN is not set
# CONFIG_LOGFS is not set
# CONFIG_CRAMFS is not set
# CONFIG_SQUASHFS is not set
# CONFIG_VXFS_FS is not set
@ -657,7 +728,6 @@ CONFIG_JFFS2_RTIME=y
# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
# CONFIG_NILFS2_FS is not set
# CONFIG_NETWORK_FILESYSTEMS is not set
#
@ -675,11 +745,12 @@ CONFIG_MSDOS_PARTITION=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_FRAME_WARN=1024
CONFIG_MAGIC_SYSRQ=y
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
CONFIG_HEADERS_CHECK=y
# CONFIG_DEBUG_KERNEL is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_MEMORY_INIT is not set
CONFIG_FRAME_POINTER=y
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
@ -693,6 +764,7 @@ CONFIG_TRACING_SUPPORT=y
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_ARM_UNWIND is not set
# CONFIG_DEBUG_USER is not set
# CONFIG_OC_ETM is not set
#
# Security options
@ -700,7 +772,11 @@ CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KEYS is not set
# CONFIG_SECURITY is not set
# CONFIG_SECURITYFS is not set
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
# CONFIG_DEFAULT_SECURITY_SELINUX is not set
# CONFIG_DEFAULT_SECURITY_SMACK is not set
# CONFIG_DEFAULT_SECURITY_TOMOYO is not set
CONFIG_DEFAULT_SECURITY_DAC=y
CONFIG_DEFAULT_SECURITY=""
# CONFIG_CRYPTO is not set
# CONFIG_BINARY_PRINTF is not set

1
arch/arm/configs/n8x0_defconfig
View file

@ -1058,7 +1058,6 @@ CONFIG_JFFS2_CMODE_PRIORITY=y
# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
# CONFIG_NILFS2_FS is not set
CONFIG_NETWORK_FILESYSTEMS=y
# CONFIG_NFS_FS is not set
# CONFIG_NFSD is not set

2
arch/arm/configs/omap_zoom2_defconfig
View file

@ -661,7 +661,7 @@ CONFIG_DEVKMEM=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=32
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
CONFIG_SERIAL_8250_RUNTIME_UARTS=1
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_MANY_PORTS=y
CONFIG_SERIAL_8250_SHARE_IRQ=y

2
arch/arm/configs/omap_zoom3_defconfig
View file

@ -680,7 +680,7 @@ CONFIG_DEVKMEM=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=32
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
CONFIG_SERIAL_8250_RUNTIME_UARTS=1
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_MANY_PORTS=y
CONFIG_SERIAL_8250_SHARE_IRQ=y

3
arch/arm/configs/rx51_defconfig
View file

@ -59,8 +59,6 @@ CONFIG_FAIR_GROUP_SCHED=y
CONFIG_USER_SCHED=y
# CONFIG_CGROUP_SCHED is not set
# CONFIG_CGROUPS is not set
CONFIG_SYSFS_DEPRECATED=y
CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_RELAY is not set
# CONFIG_NAMESPACES is not set
CONFIG_BLK_DEV_INITRD=y
@ -480,7 +478,6 @@ CONFIG_BT_HIDP=m
# CONFIG_BT_HCIBFUSB is not set
# CONFIG_BT_HCIVHCI is not set
# CONFIG_AF_RXRPC is not set
# CONFIG_PHONET is not set
CONFIG_WIRELESS=y
CONFIG_CFG80211=y
# CONFIG_CFG80211_REG_DEBUG is not set

12
arch/arm/include/asm/assembler.h
View file

@ -149,10 +149,10 @@
#define USER(x...) \
9999: x; \
.section __ex_table,"a"; \
.pushsection __ex_table,"a"; \
.align 3; \
.long 9999b,9001f; \
.previous
.popsection
/*
* SMP data memory barrier
@ -193,10 +193,10 @@
.error "Unsupported inc macro argument"
.endif
.section __ex_table,"a"
.pushsection __ex_table,"a"
.align 3
.long 9999b, \abort
.previous
.popsection
.endm
.macro usracc, instr, reg, ptr, inc, cond, rept, abort
@ -234,10 +234,10 @@
.error "Unsupported inc macro argument"
.endif
.section __ex_table,"a"
.pushsection __ex_table,"a"
.align 3
.long 9999b, \abort
.previous
.popsection
.endr
.endm

16
arch/arm/include/asm/futex.h
View file

@ -21,14 +21,14 @@
"2: strt %0, [%2]\n" \
" mov %0, #0\n" \
"3:\n" \
" .section __ex_table,\"a\"\n" \
" .pushsection __ex_table,\"a\"\n" \
" .align 3\n" \
" .long 1b, 4f, 2b, 4f\n" \
" .previous\n" \
" .section .fixup,\"ax\"\n" \
" .popsection\n" \
" .pushsection .fixup,\"ax\"\n" \
"4: mov %0, %4\n" \
" b 3b\n" \
" .previous" \
" .popsection" \
: "=&r" (ret), "=&r" (oldval) \
: "r" (uaddr), "r" (oparg), "Ir" (-EFAULT) \
: "cc", "memory")
@ -102,14 +102,14 @@ futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
" it eq @ explicit IT needed for the 2b label\n"
"2: streqt %2, [%3]\n"
"3:\n"
" .section __ex_table,\"a\"\n"
" .pushsection __ex_table,\"a\"\n"
" .align 3\n"
" .long 1b, 4f, 2b, 4f\n"
" .previous\n"
" .section .fixup,\"ax\"\n"
" .popsection\n"
" .pushsection .fixup,\"ax\"\n"
"4: mov %0, %4\n"
" b 3b\n"
" .previous"
" .popsection"
: "=&r" (val)
: "r" (oldval), "r" (newval), "r" (uaddr), "Ir" (-EFAULT)
: "cc", "memory");

15
arch/arm/include/asm/highmem.h
View file

@ -11,7 +11,11 @@
#define kmap_prot PAGE_KERNEL
#define flush_cache_kmaps() flush_cache_all()
#define flush_cache_kmaps() \
do { \
if (cache_is_vivt()) \
flush_cache_all(); \
} while (0)
extern pte_t *pkmap_page_table;
@ -21,11 +25,20 @@ extern void *kmap_high(struct page *page);
extern void *kmap_high_get(struct page *page);
extern void kunmap_high(struct page *page);
extern void *kmap_high_l1_vipt(struct page *page, pte_t *saved_pte);
extern void kunmap_high_l1_vipt(struct page *page, pte_t saved_pte);
/*
* The following functions are already defined by <linux/highmem.h>
* when CONFIG_HIGHMEM is not set.
*/
#ifdef CONFIG_HIGHMEM
extern void *kmap(struct page *page);
extern void kunmap(struct page *page);
extern void *kmap_atomic(struct page *page, enum km_type type);
extern void kunmap_atomic(void *kvaddr, enum km_type type);
extern void *kmap_atomic_pfn(unsigned long pfn, enum km_type type);
extern struct page *kmap_atomic_to_page(const void *ptr);
#endif
#endif

1
arch/arm/include/asm/kmap_types.h
View file

@ -18,6 +18,7 @@ enum km_type {
KM_IRQ1,
KM_SOFTIRQ0,
KM_SOFTIRQ1,
KM_L1_CACHE,
KM_L2_CACHE,
KM_TYPE_NR
};

40
arch/arm/include/asm/uaccess.h
View file

@ -229,16 +229,16 @@ do { \
__asm__ __volatile__( \
"1: ldrbt %1,[%2]\n" \
"2:\n" \
" .section .fixup,\"ax\"\n" \
" .pushsection .fixup,\"ax\"\n" \
" .align 2\n" \
"3: mov %0, %3\n" \
" mov %1, #0\n" \
" b 2b\n" \
" .previous\n" \
" .section __ex_table,\"a\"\n" \
" .popsection\n" \
" .pushsection __ex_table,\"a\"\n" \
" .align 3\n" \
" .long 1b, 3b\n" \
" .previous" \
" .popsection" \
: "+r" (err), "=&r" (x) \
: "r" (addr), "i" (-EFAULT) \
: "cc")
@ -265,16 +265,16 @@ do { \
__asm__ __volatile__( \
"1: ldrt %1,[%2]\n" \
"2:\n" \
" .section .fixup,\"ax\"\n" \
" .pushsection .fixup,\"ax\"\n" \
" .align 2\n" \
"3: mov %0, %3\n" \
" mov %1, #0\n" \
" b 2b\n" \
" .previous\n" \
" .section __ex_table,\"a\"\n" \
" .popsection\n" \
" .pushsection __ex_table,\"a\"\n" \
" .align 3\n" \
" .long 1b, 3b\n" \
" .previous" \
" .popsection" \
: "+r" (err), "=&r" (x) \
: "r" (addr), "i" (-EFAULT) \
: "cc")
@ -310,15 +310,15 @@ do { \
__asm__ __volatile__( \
"1: strbt %1,[%2]\n" \
"2:\n" \
" .section .fixup,\"ax\"\n" \
" .pushsection .fixup,\"ax\"\n" \
" .align 2\n" \
"3: mov %0, %3\n" \
" b 2b\n" \
" .previous\n" \
" .section __ex_table,\"a\"\n" \
" .popsection\n" \
" .pushsection __ex_table,\"a\"\n" \
" .align 3\n" \
" .long 1b, 3b\n" \
" .previous" \
" .popsection" \
: "+r" (err) \
: "r" (x), "r" (__pu_addr), "i" (-EFAULT) \
: "cc")
@ -343,15 +343,15 @@ do { \
__asm__ __volatile__( \
"1: strt %1,[%2]\n" \
"2:\n" \
" .section .fixup,\"ax\"\n" \
" .pushsection .fixup,\"ax\"\n" \
" .align 2\n" \
"3: mov %0, %3\n" \
" b 2b\n" \
" .previous\n" \
" .section __ex_table,\"a\"\n" \
" .popsection\n" \
" .pushsection __ex_table,\"a\"\n" \
" .align 3\n" \
" .long 1b, 3b\n" \
" .previous" \
" .popsection" \
: "+r" (err) \
: "r" (x), "r" (__pu_addr), "i" (-EFAULT) \
: "cc")
@ -371,16 +371,16 @@ do { \
THUMB( "1: strt " __reg_oper1 ", [%1]\n" ) \
THUMB( "2: strt " __reg_oper0 ", [%1, #4]\n" ) \
"3:\n" \
" .section .fixup,\"ax\"\n" \
" .pushsection .fixup,\"ax\"\n" \
" .align 2\n" \
"4: mov %0, %3\n" \
" b 3b\n" \
" .previous\n" \
" .section __ex_table,\"a\"\n" \
" .popsection\n" \
" .pushsection __ex_table,\"a\"\n" \
" .align 3\n" \
" .long 1b, 4b\n" \
" .long 2b, 4b\n" \
" .previous" \
" .popsection" \
: "+r" (err), "+r" (__pu_addr) \
: "r" (x), "i" (-EFAULT) \
: "cc")

23
arch/arm/include/asm/ucontext.h
View file

@ -59,23 +59,22 @@ struct iwmmxt_sigframe {
#endif /* CONFIG_IWMMXT */
#ifdef CONFIG_VFP
#if __LINUX_ARM_ARCH__ < 6
/* For ARM pre-v6, we use fstmiax and fldmiax. This adds one extra
* word after the registers, and a word of padding at the end for
* alignment. */
#define VFP_MAGIC 0x56465001
#define VFP_STORAGE_SIZE 152
#else
#define VFP_MAGIC 0x56465002
#define VFP_STORAGE_SIZE 144
#endif
struct vfp_sigframe
{
unsigned long magic;
unsigned long size;
union vfp_state storage;
};
struct user_vfp ufp;
struct user_vfp_exc ufp_exc;
} __attribute__((__aligned__(8)));
/*
* 8 byte for magic and size, 264 byte for ufp, 12 bytes for ufp_exc,
* 4 bytes padding.
*/
#define VFP_STORAGE_SIZE sizeof(struct vfp_sigframe)
#endif /* CONFIG_VFP */
/*
@ -91,7 +90,7 @@ struct aux_sigframe {
#ifdef CONFIG_IWMMXT
struct iwmmxt_sigframe iwmmxt;
#endif
#if 0 && defined CONFIG_VFP /* Not yet saved. */
#ifdef CONFIG_VFP
struct vfp_sigframe vfp;
#endif
/* Something that isn't a valid magic number for any coprocessor. */

12
arch/arm/include/asm/user.h
View file

@ -83,11 +83,21 @@ struct user{
/*
* User specific VFP registers. If only VFPv2 is present, registers 16 to 31
* are ignored by the ptrace system call.
* are ignored by the ptrace system call and the signal handler.
*/
struct user_vfp {
unsigned long long fpregs[32];
unsigned long fpscr;
};
/*
* VFP exception registers exposed to user space during signal delivery.
* Fields not relavant to the current VFP architecture are ignored.
*/
struct user_vfp_exc {
unsigned long fpexc;
unsigned long fpinst;
unsigned long fpinst2;
};
#endif /* _ARM_USER_H */

10
arch/arm/kernel/entry-armv.S
View file

@ -523,16 +523,16 @@ ENDPROC(__und_usr)
/*
* The out of line fixup for the ldrt above.
*/
.section .fixup, "ax"
.pushsection .fixup, "ax"
4: mov pc, r9
.previous
.section __ex_table,"a"
.popsection
.pushsection __ex_table,"a"
.long 1b, 4b
#if __LINUX_ARM_ARCH__ >= 7
.long 2b, 4b
.long 3b, 4b
#endif
.previous
.popsection
/*
* Check whether the instruction is a co-processor instruction.
@ -679,7 +679,7 @@ do_fpe:
.data
ENTRY(fp_enter)
.word no_fp
.previous
.text
ENTRY(no_fp)
mov pc, lr

8
arch/arm/kernel/ftrace.c
View file

@ -62,15 +62,15 @@ int ftrace_modify_code(unsigned long pc, unsigned char *old_code,
" movne %0, #2 \n"
"3:\n"
".section .fixup, \"ax\"\n"
".pushsection .fixup, \"ax\"\n"
"4: mov %0, #1 \n"
" b 3b \n"
".previous\n"
".popsection\n"
".section __ex_table, \"a\"\n"
".pushsection __ex_table, \"a\"\n"
" .long 1b, 4b \n"
" .long 2b, 4b \n"
".previous\n"
".popsection\n"
: "=r"(err), "=r"(replaced)
: "r"(pc), "r"(new), "r"(old), "0"(err), "1"(replaced)

8
arch/arm/kernel/process.c
View file

@ -355,7 +355,7 @@ EXPORT_SYMBOL(dump_fpu);
* the thread function, and r3 points to the exit function.
*/
extern void kernel_thread_helper(void);
asm( ".section .text\n"
asm( ".pushsection .text\n"
" .align\n"
" .type kernel_thread_helper, #function\n"
"kernel_thread_helper:\n"
@ -363,11 +363,11 @@ asm( ".section .text\n"
" mov lr, r3\n"
" mov pc, r2\n"
" .size kernel_thread_helper, . - kernel_thread_helper\n"
" .previous");
" .popsection");
#ifdef CONFIG_ARM_UNWIND
extern void kernel_thread_exit(long code);
asm( ".section .text\n"
asm( ".pushsection .text\n"
" .align\n"
" .type kernel_thread_exit, #function\n"
"kernel_thread_exit:\n"
@ -377,7 +377,7 @@ asm( ".section .text\n"
" nop\n"
" .fnend\n"
" .size kernel_thread_exit, . - kernel_thread_exit\n"
" .previous");
" .popsection");
#else
#define kernel_thread_exit do_exit
#endif

93
arch/arm/kernel/signal.c
View file

@ -18,6 +18,7 @@
#include <asm/cacheflush.h>
#include <asm/ucontext.h>
#include <asm/unistd.h>
#include <asm/vfp.h>
#include "ptrace.h"
#include "signal.h"
@ -175,6 +176,90 @@ static int restore_iwmmxt_context(struct iwmmxt_sigframe *frame)
#endif
#ifdef CONFIG_VFP
static int preserve_vfp_context(struct vfp_sigframe __user *frame)
{
struct thread_info *thread = current_thread_info();
struct vfp_hard_struct *h = &thread->vfpstate.hard;
const unsigned long magic = VFP_MAGIC;
const unsigned long size = VFP_STORAGE_SIZE;
int err = 0;
vfp_sync_hwstate(thread);
__put_user_error(magic, &frame->magic, err);
__put_user_error(size, &frame->size, err);
/*
* Copy the floating point registers. There can be unused
* registers see asm/hwcap.h for details.
*/
err |= __copy_to_user(&frame->ufp.fpregs, &h->fpregs,
sizeof(h->fpregs));
/*
* Copy the status and control register.
*/
__put_user_error(h->fpscr, &frame->ufp.fpscr, err);
/*
* Copy the exception registers.
*/
__put_user_error(h->fpexc, &frame->ufp_exc.fpexc, err);
__put_user_error(h->fpinst, &frame->ufp_exc.fpinst, err);
__put_user_error(h->fpinst2, &frame->ufp_exc.fpinst2, err);
return err ? -EFAULT : 0;
}
static int restore_vfp_context(struct vfp_sigframe __user *frame)
{
struct thread_info *thread = current_thread_info();
struct vfp_hard_struct *h = &thread->vfpstate.hard;
unsigned long magic;
unsigned long size;
unsigned long fpexc;
int err = 0;
__get_user_error(magic, &frame->magic, err);
__get_user_error(size, &frame->size, err);
if (err)
return -EFAULT;
if (magic != VFP_MAGIC || size != VFP_STORAGE_SIZE)
return -EINVAL;
/*
* Copy the floating point registers. There can be unused
* registers see asm/hwcap.h for details.
*/
err |= __copy_from_user(&h->fpregs, &frame->ufp.fpregs,
sizeof(h->fpregs));
/*
* Copy the status and control register.
*/
__get_user_error(h->fpscr, &frame->ufp.fpscr, err);
/*
* Sanitise and restore the exception registers.
*/
__get_user_error(fpexc, &frame->ufp_exc.fpexc, err);
/* Ensure the VFP is enabled. */
fpexc |= FPEXC_EN;
/* Ensure FPINST2 is invalid and the exception flag is cleared. */
fpexc &= ~(FPEXC_EX | FPEXC_FP2V);
h->fpexc = fpexc;
__get_user_error(h->fpinst, &frame->ufp_exc.fpinst, err);
__get_user_error(h->fpinst2, &frame->ufp_exc.fpinst2, err);
if (!err)
vfp_flush_hwstate(thread);
return err ? -EFAULT : 0;
}
#endif
/*
* Do a signal return; undo the signal stack. These are aligned to 64-bit.
*/
@ -233,8 +318,8 @@ static int restore_sigframe(struct pt_regs *regs, struct sigframe __user *sf)
err |= restore_iwmmxt_context(&aux->iwmmxt);
#endif
#ifdef CONFIG_VFP
// if (err == 0)
// err |= vfp_restore_state(&sf->aux.vfp);
if (err == 0)
err |= restore_vfp_context(&aux->vfp);
#endif
return err;
@ -348,8 +433,8 @@ setup_sigframe(struct sigframe __user *sf, struct pt_regs *regs, sigset_t *set)
err |= preserve_iwmmxt_context(&aux->iwmmxt);
#endif
#ifdef CONFIG_VFP
// if (err == 0)
// err |= vfp_save_state(&sf->aux.vfp);
if (err == 0)
err |= preserve_vfp_context(&aux->vfp);
#endif
__put_user_error(0, &aux->end_magic, err);

4
arch/arm/lib/backtrace.S
View file

@ -110,13 +110,13 @@ no_frame: ldmfd sp!, {r4 - r8, pc}
ENDPROC(__backtrace)
ENDPROC(c_backtrace)
.section __ex_table,"a"
.pushsection __ex_table,"a"
.align 3
.long 1001b, 1006b
.long 1002b, 1006b
.long 1003b, 1006b
.long 1004b, 1006b
.previous
.popsection
#define instr r4
#define reg r5

4
arch/arm/lib/clear_user.S
View file

@ -46,8 +46,8 @@ USER( strnebt r2, [r0])
ldmfd sp!, {r1, pc}
ENDPROC(__clear_user)
.section .fixup,"ax"
.pushsection .fixup,"ax"
.align 0
9001: ldmfd sp!, {r0, pc}
.previous
.popsection

4
arch/arm/lib/copy_from_user.S
View file

@ -90,7 +90,7 @@ ENTRY(__copy_from_user)
ENDPROC(__copy_from_user)
.section .fixup,"ax"
.pushsection .fixup,"ax"
.align 0
copy_abort_preamble
ldmfd sp!, {r1, r2}
@ -100,5 +100,5 @@ ENDPROC(__copy_from_user)
bl __memzero
ldr r0, [sp], #4
copy_abort_end
.previous
.popsection

4
arch/arm/lib/copy_to_user.S
View file

@ -94,12 +94,12 @@ WEAK(__copy_to_user)
ENDPROC(__copy_to_user)
.section .fixup,"ax"
.pushsection .fixup,"ax"
.align 0
copy_abort_preamble
ldmfd sp!, {r1, r2, r3}
sub r0, r0, r1
rsb r0, r0, r2
copy_abort_end
.previous
.popsection

4
arch/arm/lib/csumpartialcopyuser.S
View file

@ -68,7 +68,7 @@
* so properly, we would have to add in whatever registers were loaded before
* the fault, which, with the current asm above is not predictable.
*/
.section .fixup,"ax"
.pushsection .fixup,"ax"
.align 4
9001: mov r4, #-EFAULT
ldr r5, [fp, #4] @ *err_ptr
@ -80,4 +80,4 @@
strneb r0, [r1], #1
bne 9002b
load_regs
.previous
.popsection

4
arch/arm/lib/getuser.S
View file

@ -64,9 +64,9 @@ __get_user_bad:
mov pc, lr
ENDPROC(__get_user_bad)
.section __ex_table, "a"
.pushsection __ex_table, "a"
.long 1b, __get_user_bad
.long 2b, __get_user_bad
.long 3b, __get_user_bad
.long 4b, __get_user_bad
.previous
.popsection

4
arch/arm/lib/putuser.S
View file

@ -81,11 +81,11 @@ __put_user_bad:
mov pc, lr
ENDPROC(__put_user_bad)
.section __ex_table, "a"
.pushsection __ex_table, "a"
.long 1b, __put_user_bad
.long 2b, __put_user_bad
.long 3b, __put_user_bad
.long 4b, __put_user_bad
.long 5b, __put_user_bad
.long 6b, __put_user_bad
.previous
.popsection

4
arch/arm/lib/strncpy_from_user.S
View file

@ -33,11 +33,11 @@ ENTRY(__strncpy_from_user)
mov pc, lr
ENDPROC(__strncpy_from_user)
.section .fixup,"ax"
.pushsection .fixup,"ax"
.align 0
9001: mov r3, #0
strb r3, [r0, #0] @ null terminate
mov r0, #-EFAULT
mov pc, lr
.previous
.popsection

4
arch/arm/lib/strnlen_user.S
View file

@ -33,8 +33,8 @@ ENTRY(__strnlen_user)
mov pc, lr
ENDPROC(__strnlen_user)
.section .fixup,"ax"
.pushsection .fixup,"ax"
.align 0
9001: mov r0, #0
mov pc, lr
.previous
.popsection

8
arch/arm/lib/uaccess.S
View file

@ -279,10 +279,10 @@ USER( strgtbt r3, [r0], #1) @ May fault
b .Lc2u_finished
ENDPROC(__copy_to_user)
.section .fixup,"ax"
.pushsection .fixup,"ax"
.align 0
9001: ldmfd sp!, {r0, r4 - r7, pc}
.previous
.popsection
/* Prototype: unsigned long __copy_from_user(void *to,const void *from,unsigned long n);
* Purpose : copy a block from user memory to kernel memory
@ -545,7 +545,7 @@ USER( ldrgtbt r3, [r1], #1) @ May fault
b .Lcfu_finished
ENDPROC(__copy_from_user)
.section .fixup,"ax"
.pushsection .fixup,"ax"
.align 0
/*
* We took an exception. r0 contains a pointer to
@ -559,5 +559,5 @@ ENDPROC(__copy_from_user)
blne __memzero
mov r0, r4
ldmfd sp!, {r4 - r7, pc}
.previous
.popsection

4
arch/arm/mach-at91/Makefile
View file

@ -16,8 +16,8 @@ obj-$(CONFIG_ARCH_AT91SAM9261) += at91sam9261.o at91sam926x_time.o at91sam9261_d
obj-$(CONFIG_ARCH_AT91SAM9G10) += at91sam9261.o at91sam926x_time.o at91sam9261_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91SAM9263) += at91sam9263.o at91sam926x_time.o at91sam9263_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91SAM9RL) += at91sam9rl.o at91sam926x_time.o at91sam9rl_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91SAM9G20) += at91sam9260.o at91sam926x_time.o at91sam9260_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91SAM9G45) += at91sam9g45.o at91sam926x_time.o at91sam9g45_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91CAP9) += at91cap9.o at91sam926x_time.o at91cap9_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT572D940HF) += at572d940hf.o at91sam926x_time.o at572d940hf_devices.o sam9_smc.o
obj-$(CONFIG_ARCH_AT91X40) += at91x40.o at91x40_time.o

16
arch/arm/mach-at91/pm_slowclock.S
View file

@ -175,8 +175,6 @@ ENTRY(at91_slow_clock)
orr r3, r3, #(1 << 29) /* bit 29 always set */
str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
wait_pllalock
/* Save PLLB setting and disable it */
ldr r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
str r3, .saved_pllbr
@ -184,8 +182,6 @@ ENTRY(at91_slow_clock)
mov r3, #AT91_PMC_PLLCOUNT
str r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
wait_pllblock
/* Turn off the main oscillator */
ldr r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
bic r3, r3, #AT91_PMC_MOSCEN
@ -205,13 +201,25 @@ ENTRY(at91_slow_clock)
ldr r3, .saved_pllbr
str r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
tst r3, #(AT91_PMC_MUL & 0xff0000)
bne 1f
tst r3, #(AT91_PMC_MUL & ~0xff0000)
beq 2f
1:
wait_pllblock
2:
/* Restore PLLA setting */
ldr r3, .saved_pllar
str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
tst r3, #(AT91_PMC_MUL & 0xff0000)
bne 3f
tst r3, #(AT91_PMC_MUL & ~0xff0000)
beq 4f
3:
wait_pllalock
4:
#ifdef SLOWDOWN_MASTER_CLOCK
/*

13
arch/arm/mach-bcmring/dma.c
View file

@ -2221,11 +2221,15 @@ EXPORT_SYMBOL(dma_map_create_descriptor_ring);
int dma_unmap(DMA_MemMap_t *memMap, /* Stores state information about the map */
int dirtied /* non-zero if any of the pages were modified */
) {
int rc = 0;
int regionIdx;
int segmentIdx;
DMA_Region_t *region;
DMA_Segment_t *segment;
down(&memMap->lock);
for (regionIdx = 0; regionIdx < memMap->numRegionsUsed; regionIdx++) {
region = &memMap->region[regionIdx];
@ -2239,7 +2243,8 @@ int dma_unmap(DMA_MemMap_t *memMap, /* Stores state information about the map */
printk(KERN_ERR
"%s: vmalloc'd pages are not yet supported\n",
__func__);
return -EINVAL;
rc = -EINVAL;
goto out;
}
case DMA_MEM_TYPE_KMALLOC:
@ -2276,7 +2281,8 @@ int dma_unmap(DMA_MemMap_t *memMap, /* Stores state information about the map */
printk(KERN_ERR
"%s: Unsupported memory type: %d\n",
__func__, region->memType);
return -EINVAL;
rc = -EINVAL;
goto out;
}
}
@ -2314,9 +2320,10 @@ int dma_unmap(DMA_MemMap_t *memMap, /* Stores state information about the map */
memMap->numRegionsUsed = 0;
memMap->inUse = 0;
out:
up(&memMap->lock);
return 0;
return rc;
}
EXPORT_SYMBOL(dma_unmap);

1
arch/arm/mach-davinci/dm365.c
View file

@ -758,7 +758,6 @@ static u8 dm365_default_priorities[DAVINCI_N_AINTC_IRQ] = {
[IRQ_MMCINT] = 7,
[IRQ_DM365_MMCINT1] = 7,
[IRQ_DM365_PWMINT3] = 7,
[IRQ_DDRINT] = 4,
[IRQ_AEMIFINT] = 2,
[IRQ_DM365_SDIOINT1] = 2,
[IRQ_TINT0_TINT12] = 7,

3
arch/arm/mach-davinci/dma.c
View file

@ -1267,7 +1267,8 @@ int edma_start(unsigned channel)
/* EDMA channel with event association */
pr_debug("EDMA: ER%d %08x\n", j,
edma_shadow0_read_array(ctlr, SH_ER, j));
/* Clear any pending error */
/* Clear any pending event or error */
edma_write_array(ctlr, EDMA_ECR, j, mask);
edma_write_array(ctlr, EDMA_EMCR, j, mask);
/* Clear any SER */
edma_shadow0_write_array(ctlr, SH_SECR, j, mask);

8
arch/arm/mach-davinci/include/mach/da8xx.h
View file

@ -3,7 +3,7 @@
*
* Author: Mark A. Greer <mgreer@mvista.com>
*
* 2007, 2009 (c) MontaVista Software, Inc. This file is licensed under
* 2007, 2009-2010 (c) MontaVista Software, Inc. This file is licensed under
* the terms of the GNU General Public License version 2. This program
* is licensed "as is" without any warranty of any kind, whether express
* or implied.
@ -13,7 +13,9 @@
#include <video/da8xx-fb.h>
#include <linux/platform_device.h>
#include <linux/davinci_emac.h>
#include <mach/serial.h>
#include <mach/edma.h>
#include <mach/i2c.h>
@ -144,6 +146,10 @@ extern const short da850_mmcsd0_pins[];
extern const short da850_nand_pins[];
extern const short da850_nor_pins[];
#ifdef CONFIG_DAVINCI_MUX
int da8xx_pinmux_setup(const short pins[]);
#else
static inline int da8xx_pinmux_setup(const short pins[]) { return 0; }
#endif
#endif /* __ASM_ARCH_DAVINCI_DA8XX_H */

6
arch/arm/mach-davinci/time.c
View file

@ -253,8 +253,6 @@ static void __init timer_init(void)
irq = USING_COMPARE(t) ? dtip[i].cmp_irq : irq;
setup_irq(irq, &t->irqaction);
}
timer32_config(&timers[i]);
}
}
@ -331,6 +329,7 @@ static void __init davinci_timer_init(void)
unsigned int clocksource_id;
static char err[] __initdata = KERN_ERR
"%s: can't register clocksource!\n";
int i;
clockevent_id = soc_info->timer_info->clockevent_id;
clocksource_id = soc_info->timer_info->clocksource_id;
@ -389,6 +388,9 @@ static void __init davinci_timer_init(void)
clockevent_davinci.cpumask = cpumask_of(0);
clockevents_register_device(&clockevent_davinci);
for (i=0; i< ARRAY_SIZE(timers); i++)
timer32_config(&timers[i]);
}
struct sys_timer davinci_timer = {

6
arch/arm/mach-ep93xx/gpio.c
View file

@ -25,7 +25,7 @@
#include <mach/hardware.h>
/*************************************************************************
* GPIO handling for EP93xx
* Interrupt handling for EP93xx on-chip GPIOs
*************************************************************************/
static unsigned char gpio_int_unmasked[3];
static unsigned char gpio_int_enabled[3];
@ -40,7 +40,7 @@ static const u8 eoi_register_offset[3] = { 0x98, 0xb4, 0x54 };
static const u8 int_en_register_offset[3] = { 0x9c, 0xb8, 0x58 };
static const u8 int_debounce_register_offset[3] = { 0xa8, 0xc4, 0x64 };
void ep93xx_gpio_update_int_params(unsigned port)
static void ep93xx_gpio_update_int_params(unsigned port)
{
BUG_ON(port > 2);
@ -56,7 +56,7 @@ void ep93xx_gpio_update_int_params(unsigned port)
EP93XX_GPIO_REG(int_en_register_offset[port]));
}
void ep93xx_gpio_int_mask(unsigned line)
static inline void ep93xx_gpio_int_mask(unsigned line)
{
gpio_int_unmasked[line >> 3] &= ~(1 << (line & 7));
}

10
arch/arm/mach-mx3/Kconfig
View file

@ -62,6 +62,15 @@ config MACH_MX31_3DS
Include support for MX31PDK (3DS) platform. This includes specific
configurations for the board and its peripherals.
config MACH_MX31_3DS_MXC_NAND_USE_BBT
bool "Make the MXC NAND driver use the in flash Bad Block Table"
depends on MACH_MX31_3DS
depends on MTD_NAND_MXC
help
Enable this if you want that the MXC NAND driver uses the in flash
Bad Block Table to know what blocks are bad instead of scanning the
entire flash looking for bad block markers.
config MACH_MX31MOBOARD
bool "Support mx31moboard platforms (EPFL Mobots group)"
select ARCH_MX31
@ -95,6 +104,7 @@ config MACH_PCM043
config MACH_ARMADILLO5X0
bool "Support Atmark Armadillo-500 Development Base Board"
select ARCH_MX31
select MXC_ULPI if USB_ULPI
help
Include support for Atmark Armadillo-500 platform. This includes
specific configurations for the board and its peripherals.

5
arch/arm/mach-mx3/clock-imx31.c
View file

@ -468,6 +468,7 @@ static struct clk ahb_clk = {
}
DEFINE_CLOCK(perclk_clk, 0, NULL, 0, NULL, NULL, &ipg_clk);
DEFINE_CLOCK(ckil_clk, 0, NULL, 0, clk_ckil_get_rate, NULL, NULL);
DEFINE_CLOCK(sdhc1_clk, 0, MXC_CCM_CGR0, 0, NULL, NULL, &perclk_clk);
DEFINE_CLOCK(sdhc2_clk, 1, MXC_CCM_CGR0, 2, NULL, NULL, &perclk_clk);
@ -490,7 +491,7 @@ DEFINE_CLOCK(mpeg4_clk, 0, MXC_CCM_CGR1, 0, NULL, NULL, &ahb_clk);
DEFINE_CLOCK(mstick1_clk, 0, MXC_CCM_CGR1, 2, mstick1_get_rate, NULL, &usb_pll_clk);
DEFINE_CLOCK(mstick2_clk, 1, MXC_CCM_CGR1, 4, mstick2_get_rate, NULL, &usb_pll_clk);
DEFINE_CLOCK1(csi_clk, 0, MXC_CCM_CGR1, 6, csi, NULL, &serial_pll_clk);
DEFINE_CLOCK(rtc_clk, 0, MXC_CCM_CGR1, 8, NULL, NULL, &ipg_clk);
DEFINE_CLOCK(rtc_clk, 0, MXC_CCM_CGR1, 8, NULL, NULL, &ckil_clk);
DEFINE_CLOCK(wdog_clk, 0, MXC_CCM_CGR1, 10, NULL, NULL, &ipg_clk);
DEFINE_CLOCK(pwm_clk, 0, MXC_CCM_CGR1, 12, NULL, NULL, &perclk_clk);
DEFINE_CLOCK(usb_clk2, 0, MXC_CCM_CGR1, 18, usb_get_rate, NULL, &ahb_clk);
@ -514,7 +515,6 @@ DEFINE_CLOCK(usb_clk1, 0, NULL, 0, usb_get_rate, NULL, &usb_pll_clk)
DEFINE_CLOCK(nfc_clk, 0, NULL, 0, nfc_get_rate, NULL, &ahb_clk);
DEFINE_CLOCK(scc_clk, 0, NULL, 0, NULL, NULL, &ipg_clk);
DEFINE_CLOCK(ipg_clk, 0, NULL, 0, ipg_get_rate, NULL, &ahb_clk);
DEFINE_CLOCK(ckil_clk, 0, NULL, 0, clk_ckil_get_rate, NULL, NULL);
#define _REGISTER_CLOCK(d, n, c) \
{ \
@ -572,7 +572,6 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK(NULL, "iim", iim_clk)
_REGISTER_CLOCK(NULL, "mpeg4", mpeg4_clk)
_REGISTER_CLOCK(NULL, "mbx", mbx_clk)
_REGISTER_CLOCK("mxc_rtc", NULL, ckil_clk)
};
int __init mx31_clocks_init(unsigned long fref)

19
arch/arm/mach-mx3/devices.c
View file

@ -575,11 +575,26 @@ struct platform_device imx_ssi_device1 = {
.resource = imx_ssi_resources1,
};
static int mx3_devices_init(void)
static struct resource imx_wdt_resources[] = {
{
.flags = IORESOURCE_MEM,
},
};
struct platform_device imx_wdt_device0 = {
.name = "imx-wdt",
.id = 0,
.num_resources = ARRAY_SIZE(imx_wdt_resources),
.resource = imx_wdt_resources,
};
static int __init mx3_devices_init(void)
{
if (cpu_is_mx31()) {
mxc_nand_resources[0].start = MX31_NFC_BASE_ADDR;
mxc_nand_resources[0].end = MX31_NFC_BASE_ADDR + 0xfff;
imx_wdt_resources[0].start = MX31_WDOG_BASE_ADDR;
imx_wdt_resources[0].end = MX31_WDOG_BASE_ADDR + 0x3fff;
mxc_register_device(&mxc_rnga_device, NULL);
}
if (cpu_is_mx35()) {
@ -597,6 +612,8 @@ static int mx3_devices_init(void)
imx_ssi_resources0[1].end = MX35_INT_SSI1;
imx_ssi_resources1[1].start = MX35_INT_SSI2;
imx_ssi_resources1[1].end = MX35_INT_SSI2;
imx_wdt_resources[0].start = MX35_WDOG_BASE_ADDR;
imx_wdt_resources[0].end = MX35_WDOG_BASE_ADDR + 0x3fff;
}
return 0;

3
arch/arm/mach-mx3/devices.h
View file

@ -25,4 +25,5 @@ extern struct platform_device mxc_spi_device1;
extern struct platform_device mxc_spi_device2;
extern struct platform_device imx_ssi_device0;
extern struct platform_device imx_ssi_device1;
extern struct platform_device imx_ssi_device1;
extern struct platform_device imx_wdt_device0;

166
arch/arm/mach-mx3/mach-armadillo5x0.c
View file

@ -36,6 +36,9 @@
#include <linux/input.h>
#include <linux/gpio_keys.h>
#include <linux/i2c.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include <linux/delay.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
@ -52,6 +55,8 @@
#include <mach/ipu.h>
#include <mach/mx3fb.h>
#include <mach/mxc_nand.h>
#include <mach/mxc_ehci.h>
#include <mach/ulpi.h>
#include "devices.h"
#include "crm_regs.h"
@ -103,8 +108,158 @@ static int armadillo5x0_pins[] = {
/* I2C2 */
MX31_PIN_CSPI2_MOSI__SCL,
MX31_PIN_CSPI2_MISO__SDA,
/* OTG */
MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
MX31_PIN_USBOTG_CLK__USBOTG_CLK,
MX31_PIN_USBOTG_DIR__USBOTG_DIR,
MX31_PIN_USBOTG_NXT__USBOTG_NXT,
MX31_PIN_USBOTG_STP__USBOTG_STP,
/* USB host 2 */
IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_STXD3, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_SRXD3, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_SCK3, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_SFS3, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_STXD6, IOMUX_CONFIG_FUNC),
IOMUX_MODE(MX31_PIN_SRXD6, IOMUX_CONFIG_FUNC),
};
/* USB */
#if defined(CONFIG_USB_ULPI)
#define OTG_RESET IOMUX_TO_GPIO(MX31_PIN_STXD4)
#define USBH2_RESET IOMUX_TO_GPIO(MX31_PIN_SCK6)
#define USBH2_CS IOMUX_TO_GPIO(MX31_PIN_GPIO1_3)
#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
static int usbotg_init(struct platform_device *pdev)
{
int err;
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
/* Chip already enabled by hardware */
/* OTG phy reset*/
err = gpio_request(OTG_RESET, "USB-OTG-RESET");
if (err) {
pr_err("Failed to request the usb otg reset gpio\n");
return err;
}
err = gpio_direction_output(OTG_RESET, 1/*HIGH*/);
if (err) {
pr_err("Failed to reset the usb otg phy\n");
goto otg_free_reset;
}
gpio_set_value(OTG_RESET, 0/*LOW*/);
mdelay(5);
gpio_set_value(OTG_RESET, 1/*HIGH*/);
return 0;
otg_free_reset:
gpio_free(OTG_RESET);
return err;
}
static int usbh2_init(struct platform_device *pdev)
{
int err;
mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
mxc_iomux_set_gpr(MUX_PGP_UH2, true);
/* Enable the chip */
err = gpio_request(USBH2_CS, "USB-H2-CS");
if (err) {
pr_err("Failed to request the usb host 2 CS gpio\n");
return err;
}
err = gpio_direction_output(USBH2_CS, 0/*Enabled*/);
if (err) {
pr_err("Failed to drive the usb host 2 CS gpio\n");
goto h2_free_cs;
}
/* H2 phy reset*/
err = gpio_request(USBH2_RESET, "USB-H2-RESET");
if (err) {
pr_err("Failed to request the usb host 2 reset gpio\n");
goto h2_free_cs;
}
err = gpio_direction_output(USBH2_RESET, 1/*HIGH*/);
if (err) {
pr_err("Failed to reset the usb host 2 phy\n");
goto h2_free_reset;
}
gpio_set_value(USBH2_RESET, 0/*LOW*/);
mdelay(5);
gpio_set_value(USBH2_RESET, 1/*HIGH*/);
return 0;
h2_free_reset:
gpio_free(USBH2_RESET);
h2_free_cs:
gpio_free(USBH2_CS);
return err;
}
static struct mxc_usbh_platform_data usbotg_pdata = {
.init = usbotg_init,
.portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
.flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI,
};
static struct mxc_usbh_platform_data usbh2_pdata = {
.init = usbh2_init,
.portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
.flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_DIFF_UNI,
};
#endif /* CONFIG_USB_ULPI */
/* RTC over I2C*/
#define ARMADILLO5X0_RTC_GPIO IOMUX_TO_GPIO(MX31_PIN_SRXD4)
@ -393,6 +548,17 @@ static void __init armadillo5x0_init(void)
if (armadillo5x0_i2c_rtc.irq == 0)
pr_warning("armadillo5x0_init: failed to get RTC IRQ\n");
i2c_register_board_info(1, &armadillo5x0_i2c_rtc, 1);
/* USB */
#if defined(CONFIG_USB_ULPI)
usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
mxc_register_device(&mxc_otg_host, &usbotg_pdata);
mxc_register_device(&mxc_usbh2, &usbh2_pdata);
#endif
}
static void __init armadillo5x0_timer_init(void)

116
arch/arm/mach-mx3/mach-mx31_3ds.c
View file

@ -23,6 +23,9 @@
#include <linux/gpio.h>
#include <linux/smsc911x.h>
#include <linux/platform_device.h>
#include <linux/mfd/mc13783.h>
#include <linux/spi/spi.h>
#include <linux/regulator/machine.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
@ -31,26 +34,96 @@
#include <asm/memory.h>
#include <asm/mach/map.h>
#include <mach/common.h>
#include <mach/board-mx31pdk.h>
#include <mach/board-mx31_3ds.h>
#include <mach/imx-uart.h>
#include <mach/iomux-mx3.h>
#include <mach/mxc_nand.h>
#include <mach/spi.h>
#include "devices.h"
/*!
* @file mx31pdk.c
* @file mx31_3ds.c
*
* @brief This file contains the board-specific initialization routines.
*
* @ingroup System
*/
static int mx31pdk_pins[] = {
static int mx31_3ds_pins[] = {
/* UART1 */
MX31_PIN_CTS1__CTS1,
MX31_PIN_RTS1__RTS1,
MX31_PIN_TXD1__TXD1,
MX31_PIN_RXD1__RXD1,
IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
/* SPI 1 */
MX31_PIN_CSPI2_SCLK__SCLK,
MX31_PIN_CSPI2_MOSI__MOSI,
MX31_PIN_CSPI2_MISO__MISO,
MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
MX31_PIN_CSPI2_SS0__SS0,
MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */
/* MC13783 IRQ */
IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO),
};
/* Regulators */
static struct regulator_init_data pwgtx_init = {
.constraints = {
.boot_on = 1,
.always_on = 1,
},
};
static struct mc13783_regulator_init_data mx31_3ds_regulators[] = {
{
.id = MC13783_REGU_PWGT1SPI, /* Power Gate for ARM core. */
.init_data = &pwgtx_init,
}, {
.id = MC13783_REGU_PWGT2SPI, /* Power Gate for L2 Cache. */
.init_data = &pwgtx_init,
},
};
/* MC13783 */
static struct mc13783_platform_data mc13783_pdata __initdata = {
.regulators = mx31_3ds_regulators,
.num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
.flags = MC13783_USE_REGULATOR,
};
/* SPI */
static int spi1_internal_chipselect[] = {
MXC_SPI_CS(0),
MXC_SPI_CS(2),
};
static struct spi_imx_master spi1_pdata = {
.chipselect = spi1_internal_chipselect,
.num_chipselect = ARRAY_SIZE(spi1_internal_chipselect),
};
static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
{
.modalias = "mc13783",
.max_speed_hz = 1000000,
.bus_num = 1,
.chip_select = 1, /* SS2 */
.platform_data = &mc13783_pdata,
.irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
.mode = SPI_CS_HIGH,
},
};
/*
* NAND Flash
*/
static struct mxc_nand_platform_data imx31_3ds_nand_flash_pdata = {
.width = 1,
.hw_ecc = 1,
#ifdef MACH_MX31_3DS_MXC_NAND_USE_BBT
.flash_bbt = 1,
#endif
};
static struct imxuart_platform_data uart_pdata = {
@ -95,7 +168,7 @@ static struct platform_device smsc911x_device = {
* LEDs, switches, interrupts for Ethernet.
*/
static void mx31pdk_expio_irq_handler(uint32_t irq, struct irq_desc *desc)
static void mx31_3ds_expio_irq_handler(uint32_t irq, struct irq_desc *desc)
{
uint32_t imr_val;
uint32_t int_valid;
@ -163,7 +236,7 @@ static struct irq_chip expio_irq_chip = {
.unmask = expio_unmask_irq,
};
static int __init mx31pdk_init_expio(void)
static int __init mx31_3ds_init_expio(void)
{
int i;
int ret;
@ -176,7 +249,7 @@ static int __init mx31pdk_init_expio(void)
return -ENODEV;
}
pr_info("i.MX31PDK Debug board detected, rev = 0x%04X\n",
pr_info("i.MX31 3DS Debug board detected, rev = 0x%04X\n",
__raw_readw(CPLD_CODE_VER_REG));
/*
@ -201,7 +274,7 @@ static int __init mx31pdk_init_expio(void)
set_irq_flags(i, IRQF_VALID);
}
set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_LOW);
set_irq_chained_handler(EXPIO_PARENT_INT, mx31pdk_expio_irq_handler);
set_irq_chained_handler(EXPIO_PARENT_INT, mx31_3ds_expio_irq_handler);
return 0;
}
@ -209,7 +282,7 @@ static int __init mx31pdk_init_expio(void)
/*
* This structure defines the MX31 memory map.
*/
static struct map_desc mx31pdk_io_desc[] __initdata = {
static struct map_desc mx31_3ds_io_desc[] __initdata = {
{
.virtual = MX31_CS5_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(MX31_CS5_BASE_ADDR),
@ -221,10 +294,10 @@ static struct map_desc mx31pdk_io_desc[] __initdata = {
/*
* Set up static virtual mappings.
*/
static void __init mx31pdk_map_io(void)
static void __init mx31_3ds_map_io(void)
{
mx31_map_io();
iotable_init(mx31pdk_io_desc, ARRAY_SIZE(mx31pdk_io_desc));
iotable_init(mx31_3ds_io_desc, ARRAY_SIZE(mx31_3ds_io_desc));
}
/*!
@ -232,35 +305,40 @@ static void __init mx31pdk_map_io(void)
*/
static void __init mxc_board_init(void)
{
mxc_iomux_setup_multiple_pins(mx31pdk_pins, ARRAY_SIZE(mx31pdk_pins),
"mx31pdk");
mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins),
"mx31_3ds");
mxc_register_device(&mxc_uart_device0, &uart_pdata);
mxc_register_device(&mxc_nand_device, &imx31_3ds_nand_flash_pdata);
if (!mx31pdk_init_expio())
mxc_register_device(&mxc_spi_device1, &spi1_pdata);
spi_register_board_info(mx31_3ds_spi_devs,
ARRAY_SIZE(mx31_3ds_spi_devs));
if (!mx31_3ds_init_expio())
platform_device_register(&smsc911x_device);
}
static void __init mx31pdk_timer_init(void)
static void __init mx31_3ds_timer_init(void)
{
mx31_clocks_init(26000000);
}
static struct sys_timer mx31pdk_timer = {
.init = mx31pdk_timer_init,
static struct sys_timer mx31_3ds_timer = {
.init = mx31_3ds_timer_init,
};
/*
* The following uses standard kernel macros defined in arch.h in order to
* initialize __mach_desc_MX31PDK data structure.
* initialize __mach_desc_MX31_3DS data structure.
*/
MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
/* Maintainer: Freescale Semiconductor, Inc. */
.phys_io = MX31_AIPS1_BASE_ADDR,
.io_pg_offst = (MX31_AIPS1_BASE_ADDR_VIRT >> 18) & 0xfffc,
.boot_params = MX3x_PHYS_OFFSET + 0x100,
.map_io = mx31pdk_map_io,
.map_io = mx31_3ds_map_io,
.init_irq = mx31_init_irq,
.init_machine = mxc_board_init,
.timer = &mx31pdk_timer,
.timer = &mx31_3ds_timer,
MACHINE_END

1
arch/arm/mach-mx3/mach-pcm037.c
View file

@ -35,7 +35,6 @@
#include <linux/can/platform/sja1000.h>
#include <linux/usb/otg.h>
#include <linux/usb/ulpi.h>
#include <linux/fsl_devices.h>
#include <linux/gfp.h>
#include <media/soc_camera.h>

2
arch/arm/mach-mx3/mx31lite-db.c
View file

@ -28,7 +28,6 @@
#include <linux/types.h>
#include <linux/init.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/leds.h>
#include <linux/platform_device.h>
@ -206,5 +205,6 @@ void __init mx31lite_db_init(void)
mxc_register_device(&mxcsdhc_device0, &mmc_pdata);
mxc_register_device(&mxc_spi_device0, &spi0_pdata);
platform_device_register(&litekit_led_device);
mxc_register_device(&imx_wdt_device0, NULL);
}

2
arch/arm/mach-mx5/clock-mx51.c
View file

@ -757,7 +757,7 @@ DEFINE_CLOCK(uart3_ipg_clk, 2, MXC_CCM_CCGR1, MXC_CCM_CCGRx_CG7_OFFSET,
/* GPT */
DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG9_OFFSET,
NULL, NULL, &ipg_perclk, NULL);
NULL, NULL, &ipg_clk, NULL);
DEFINE_CLOCK(gpt_ipg_clk, 0, MXC_CCM_CCGR2, MXC_CCM_CCGRx_CG10_OFFSET,
NULL, NULL, &ipg_clk, NULL);

53
arch/arm/mach-mx5/cpu.c
View file

@ -14,9 +14,62 @@
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <mach/hardware.h>
#include <asm/io.h>
static int cpu_silicon_rev = -1;
#define SI_REV 0x48
static void query_silicon_parameter(void)
{
void __iomem *rom = ioremap(MX51_IROM_BASE_ADDR, MX51_IROM_SIZE);
u32 rev;
if (!rom) {
cpu_silicon_rev = -EINVAL;
return;
}
rev = readl(rom + SI_REV);
switch (rev) {
case 0x1:
cpu_silicon_rev = MX51_CHIP_REV_1_0;
break;
case 0x2:
cpu_silicon_rev = MX51_CHIP_REV_1_1;
break;
case 0x10:
cpu_silicon_rev = MX51_CHIP_REV_2_0;
break;
case 0x20:
cpu_silicon_rev = MX51_CHIP_REV_3_0;
break;
default:
cpu_silicon_rev = 0;
}
iounmap(rom);
}
/*
* Returns:
* the silicon revision of the cpu
* -EINVAL - not a mx51
*/
int mx51_revision(void)
{
if (!cpu_is_mx51())
return -EINVAL;
if (cpu_silicon_rev == -1)
query_silicon_parameter();
return cpu_silicon_rev;
}
EXPORT_SYMBOL(mx51_revision);
static int __init post_cpu_init(void)
{
unsigned int reg;

32
arch/arm/mach-mx5/mm.c
View file

@ -34,11 +34,6 @@ static struct map_desc mxc_io_desc[] __initdata = {
.pfn = __phys_to_pfn(MX51_DEBUG_BASE_ADDR),
.length = MX51_DEBUG_SIZE,
.type = MT_DEVICE
}, {
.virtual = MX51_TZIC_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(MX51_TZIC_BASE_ADDR),
.length = MX51_TZIC_SIZE,
.type = MT_DEVICE
}, {
.virtual = MX51_AIPS1_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(MX51_AIPS1_BASE_ADDR),
@ -54,11 +49,6 @@ static struct map_desc mxc_io_desc[] __initdata = {
.pfn = __phys_to_pfn(MX51_AIPS2_BASE_ADDR),
.length = MX51_AIPS2_SIZE,
.type = MT_DEVICE
}, {
.virtual = MX51_NFC_AXI_BASE_ADDR_VIRT,
.pfn = __phys_to_pfn(MX51_NFC_AXI_BASE_ADDR),
.length = MX51_NFC_AXI_SIZE,
.type = MT_DEVICE
},
};
@ -69,14 +59,6 @@ static struct map_desc mxc_io_desc[] __initdata = {
*/
void __init mx51_map_io(void)
{
u32 tzic_addr;
if (mx51_revision() < MX51_CHIP_REV_2_0)
tzic_addr = 0x8FFFC000;
else
tzic_addr = 0xE0003000;
mxc_io_desc[2].pfn = __phys_to_pfn(tzic_addr);
mxc_set_cpu_type(MXC_CPU_MX51);
mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR));
mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG_BASE_ADDR));
@ -85,5 +67,17 @@ void __init mx51_map_io(void)
void __init mx51_init_irq(void)
{
tzic_init_irq(MX51_IO_ADDRESS(MX51_TZIC_BASE_ADDR));
unsigned long tzic_addr;
void __iomem *tzic_virt;
if (mx51_revision() < MX51_CHIP_REV_2_0)
tzic_addr = MX51_TZIC_BASE_ADDR_TO1;
else
tzic_addr = MX51_TZIC_BASE_ADDR;
tzic_virt = ioremap(tzic_addr, SZ_16K);
if (!tzic_virt)
panic("unable to map TZIC interrupt controller\n");
tzic_init_irq(tzic_virt);
}

15
arch/arm/mach-omap1/timer32k.c
View file

@ -68,12 +68,6 @@ struct sys_timer omap_timer;
* ---------------------------------------------------------------------------
*/
#if defined(CONFIG_ARCH_OMAP16XX)
#define TIMER_32K_SYNCHRONIZED 0xfffbc410
#else
#error OMAP 32KHz timer does not currently work on 15XX!
#endif
/* 16xx specific defines */
#define OMAP1_32K_TIMER_BASE 0xfffb9000
#define OMAP1_32K_TIMER_CR 0x08
@ -150,15 +144,6 @@ static struct clock_event_device clockevent_32k_timer = {
.set_mode = omap_32k_timer_set_mode,
};
/*
* The 32KHz synchronized timer is an additional timer on 16xx.
* It is always running.
*/
static inline unsigned long omap_32k_sync_timer_read(void)
{
return omap_readl(TIMER_32K_SYNCHRONIZED);
}
static irqreturn_t omap_32k_timer_interrupt(int irq, void *dev_id)
{
struct clock_event_device *evt = &clockevent_32k_timer;

6
arch/arm/mach-omap2/Kconfig
View file

@ -59,8 +59,10 @@ config MACH_OMAP3_BEAGLE
select OMAP_PACKAGE_CBB
config MACH_DEVKIT8000
bool "DEVKIT8000 board"
depends on ARCH_OMAP3
bool "DEVKIT8000 board"
depends on ARCH_OMAP3
select OMAP_PACKAGE_CUS
select OMAP_MUX
config MACH_OMAP_LDP
bool "OMAP3 LDP board"

1
arch/arm/mach-omap2/board-3630sdp.c
View file

@ -96,6 +96,7 @@ static struct omap_board_mux board_mux[] __initdata = {
static void __init omap_sdp_init(void)
{
omap3_mux_init(board_mux, OMAP_PACKAGE_CBP);
omap_serial_init();
zoom_peripherals_init();
board_smc91x_init();
enable_board_wakeup_source();

4
arch/arm/mach-omap2/board-am3517evm.c
View file

@ -294,9 +294,9 @@ static struct omap_board_mux board_mux[] __initdata = {
static void __init am3517_evm_init(void)
{
am3517_evm_i2c_init();
omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
am3517_evm_i2c_init();
platform_add_devices(am3517_evm_devices,
ARRAY_SIZE(am3517_evm_devices));

39
arch/arm/mach-omap2/board-devkit8000.c
View file

@ -50,7 +50,6 @@
#include <linux/input/matrix_keypad.h>
#include <linux/spi/spi.h>
#include <linux/spi/ads7846.h>
#include <linux/usb/otg.h>
#include <linux/dm9000.h>
#include <linux/interrupt.h>
@ -269,20 +268,6 @@ static int devkit8000_twl_gpio_setup(struct device *dev,
devkit8000_vmmc1_supply.dev = mmc[0].dev;
devkit8000_vsim_supply.dev = mmc[0].dev;
/* REVISIT: need ehci-omap hooks for external VBUS
* power switch and overcurrent detect
*/
gpio_request(gpio + 1, "EHCI_nOC");
gpio_direction_input(gpio + 1);
/* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, active low) */
gpio_request(gpio + TWL4030_GPIO_MAX, "nEN_USB_PWR");
gpio_direction_output(gpio + TWL4030_GPIO_MAX, 1);
/* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
return 0;
}
@ -303,7 +288,7 @@ static struct regulator_consumer_supply devkit8000_vpll2_supplies[] = {
.dev = &devkit8000_lcd_device.dev,
},
{
.supply = "vdss_dsi",
.supply = "vdds_dsi",
.dev = &devkit8000_dss_device.dev,
}
};
@ -639,17 +624,21 @@ static struct omap_musb_board_data musb_board_data = {
static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
.port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
.port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
.port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN,
.port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
.phy_reset = true,
.reset_gpio_port[0] = -EINVAL,
.reset_gpio_port[1] = 147,
.reset_gpio_port[1] = -EINVAL,
.reset_gpio_port[2] = -EINVAL
};
static void __init devkit8000_init(void)
{
omap_serial_init();
omap_dm9000_init();
devkit8000_i2c_init();
platform_add_devices(devkit8000_devices,
ARRAY_SIZE(devkit8000_devices));
@ -659,25 +648,15 @@ static void __init devkit8000_init(void)
spi_register_board_info(devkit8000_spi_board_info,
ARRAY_SIZE(devkit8000_spi_board_info));
omap_serial_init();
omap_dm9000_init();
devkit8000_ads7846_init();
omap_mux_init_gpio(170, OMAP_PIN_INPUT);
gpio_request(170, "DVI_nPD");
/* REVISIT leave DVI powered down until it's needed ... */
gpio_direction_output(170, true);
usb_musb_init(&musb_board_data);
usb_ehci_init(&ehci_pdata);
devkit8000_flash_init();
/* Ensure SDRC pins are mux'd for self-refresh */
omap_mux_init_signal("sdr_cke0", OMAP_PIN_OUTPUT);
omap_mux_init_signal("sdr_cke1", OMAP_PIN_OUTPUT);
omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
}
static void __init devkit8000_map_io(void)

8
arch/arm/mach-omap2/board-igep0020.c
View file

@ -458,13 +458,13 @@ static struct omap_musb_board_data musb_board_data = {
};
static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
.port_mode[0] = EHCI_HCD_OMAP_MODE_UNKNOWN,
.port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
.port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
.port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN,
.port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
.phy_reset = true,
.reset_gpio_port[0] = -EINVAL,
.reset_gpio_port[1] = IGEP2_GPIO_USBH_NRESET,
.reset_gpio_port[0] = IGEP2_GPIO_USBH_NRESET,
.reset_gpio_port[1] = -EINVAL,
.reset_gpio_port[2] = -EINVAL,
};

18
arch/arm/mach-omap2/board-n8x0.c
View file

@ -216,7 +216,7 @@ static void __init n8x0_onenand_init(void) {}
*/
#define N8X0_SLOT_SWITCH_GPIO 96
#define N810_EMMC_VSD_GPIO 23
#define NN810_EMMC_VIO_GPIO 9
#define N810_EMMC_VIO_GPIO 9
static int n8x0_mmc_switch_slot(struct device *dev, int slot)
{
@ -304,10 +304,10 @@ static void n810_set_power_emmc(struct device *dev,
if (power_on) {
gpio_set_value(N810_EMMC_VSD_GPIO, 1);
msleep(1);
gpio_set_value(NN810_EMMC_VIO_GPIO, 1);
gpio_set_value(N810_EMMC_VIO_GPIO, 1);
msleep(1);
} else {
gpio_set_value(NN810_EMMC_VIO_GPIO, 0);
gpio_set_value(N810_EMMC_VIO_GPIO, 0);
msleep(50);
gpio_set_value(N810_EMMC_VSD_GPIO, 0);
msleep(50);
@ -468,7 +468,7 @@ static void n8x0_mmc_cleanup(struct device *dev)
if (machine_is_nokia_n810()) {
gpio_free(N810_EMMC_VSD_GPIO);
gpio_free(NN810_EMMC_VIO_GPIO);
gpio_free(N810_EMMC_VIO_GPIO);
}
}
@ -529,7 +529,7 @@ void __init n8x0_mmc_init(void)
err = gpio_request(N8X0_SLOT_SWITCH_GPIO, "MMC slot switch");
if (err)
return err;
return;
gpio_direction_output(N8X0_SLOT_SWITCH_GPIO, 0);
@ -537,17 +537,17 @@ void __init n8x0_mmc_init(void)
err = gpio_request(N810_EMMC_VSD_GPIO, "MMC slot 2 Vddf");
if (err) {
gpio_free(N8X0_SLOT_SWITCH_GPIO);
return err;
return;
}
gpio_direction_output(N810_EMMC_VSD_GPIO, 0);
err = gpio_request(NN810_EMMC_VIO_GPIO, "MMC slot 2 Vdd");
err = gpio_request(N810_EMMC_VIO_GPIO, "MMC slot 2 Vdd");
if (err) {
gpio_free(N8X0_SLOT_SWITCH_GPIO);
gpio_free(N810_EMMC_VSD_GPIO);
return err;
return;
}
gpio_direction_output(NN810_EMMC_VIO_GPIO, 0);
gpio_direction_output(N810_EMMC_VIO_GPIO, 0);
}
mmc_data[0] = &mmc1_data;

8
arch/arm/mach-omap2/board-sdp-flash.c
View file

@ -253,20 +253,20 @@ void __init sdp_flash_init(struct flash_partitions sdp_partition_info[])
}
if (norcs > GPMC_CS_NUM)
printk(KERN_INFO "OneNAND: Unable to find configuration "
" in GPMC\n ");
printk(KERN_INFO "NOR: Unable to find configuration "
"in GPMC\n");
else
board_nor_init(sdp_partition_info[0], norcs);
if (onenandcs > GPMC_CS_NUM)
printk(KERN_INFO "OneNAND: Unable to find configuration "
" in GPMC\n ");
"in GPMC\n");
else
board_onenand_init(sdp_partition_info[1], onenandcs);
if (nandcs > GPMC_CS_NUM)
printk(KERN_INFO "NAND: Unable to find configuration "
" in GPMC\n ");
"in GPMC\n");
else
board_nand_init(sdp_partition_info[2], nandcs);
}

2
arch/arm/mach-omap2/board-zoom-debugboard.c
View file

@ -96,7 +96,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
static struct platform_device zoom_debugboard_serial_device = {
.name = "serial8250",
.id = 3,
.id = PLAT8250_DEV_PLATFORM,
.dev = {
.platform_data = serial_platform_data,
},

1
arch/arm/mach-omap2/board-zoom-peripherals.c
View file

@ -280,7 +280,6 @@ static void enable_board_wakeup_source(void)
void __init zoom_peripherals_init(void)
{
omap_i2c_init();
omap_serial_init();
usb_musb_init(&musb_board_data);
enable_board_wakeup_source();
}

2
arch/arm/mach-omap2/clock3xxx_data.c
View file

@ -895,7 +895,7 @@ static struct clk dpll4_m4x2_ck = {
.ops = &clkops_omap2_dflt_wait,
.parent = &dpll4_m4_ck,
.enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
.enable_bit = OMAP3430_PWRDN_CAM_SHIFT,
.enable_bit = OMAP3430_PWRDN_DSS1_SHIFT,
.flags = INVERT_ENABLE,
.clkdm_name = "dpll4_clkdm",
.recalc = &omap3_clkoutx2_recalc,

8
arch/arm/mach-omap2/clock44xx_data.c
View file

@ -2671,10 +2671,10 @@ static struct omap_clk omap44xx_clks[] = {
CLK("omap-mcbsp.2", "ick", &dummy_ck, CK_443X),
CLK("omap-mcbsp.3", "ick", &dummy_ck, CK_443X),
CLK("omap-mcbsp.4", "ick", &dummy_ck, CK_443X),
CLK("omap-mcspi.1", "ick", &dummy_ck, CK_443X),
CLK("omap-mcspi.2", "ick", &dummy_ck, CK_443X),
CLK("omap-mcspi.3", "ick", &dummy_ck, CK_443X),
CLK("omap-mcspi.4", "ick", &dummy_ck, CK_443X),
CLK("omap2_mcspi.1", "ick", &dummy_ck, CK_443X),
CLK("omap2_mcspi.2", "ick", &dummy_ck, CK_443X),
CLK("omap2_mcspi.3", "ick", &dummy_ck, CK_443X),
CLK("omap2_mcspi.4", "ick", &dummy_ck, CK_443X),
CLK(NULL, "uart1_ick", &dummy_ck, CK_443X),
CLK(NULL, "uart2_ick", &dummy_ck, CK_443X),
CLK(NULL, "uart3_ick", &dummy_ck, CK_443X),

6
arch/arm/mach-omap2/clockdomain.c
View file

@ -240,7 +240,7 @@ static void _omap2_clkdm_set_hwsup(struct clockdomain *clkdm, int enable)
bits = OMAP24XX_CLKSTCTRL_ENABLE_AUTO;
else
bits = OMAP24XX_CLKSTCTRL_DISABLE_AUTO;
} else if (cpu_is_omap34xx() | cpu_is_omap44xx()) {
} else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
if (enable)
bits = OMAP34XX_CLKSTCTRL_ENABLE_AUTO;
else
@ -812,7 +812,7 @@ int omap2_clkdm_sleep(struct clockdomain *clkdm)
cm_set_mod_reg_bits(OMAP24XX_FORCESTATE,
clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL);
} else if (cpu_is_omap34xx() | cpu_is_omap44xx()) {
} else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_SLEEP <<
__ffs(clkdm->clktrctrl_mask));
@ -856,7 +856,7 @@ int omap2_clkdm_wakeup(struct clockdomain *clkdm)
cm_clear_mod_reg_bits(OMAP24XX_FORCESTATE,
clkdm->pwrdm.ptr->prcm_offs, OMAP2_PM_PWSTCTRL);
} else if (cpu_is_omap34xx() | cpu_is_omap44xx()) {
} else if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
u32 bits = (OMAP34XX_CLKSTCTRL_FORCE_WAKEUP <<
__ffs(clkdm->clktrctrl_mask));

2
arch/arm/mach-omap2/devices.c
View file

@ -726,7 +726,7 @@ void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
if (!cpu_is_omap44xx())
return;
base = OMAP4_MMC5_BASE + OMAP4_MMC_REG_OFFSET;
irq = OMAP44XX_IRQ_MMC4;
irq = OMAP44XX_IRQ_MMC5;
break;
default:
continue;

3
arch/arm/mach-omap2/gpmc-nand.c
View file

@ -39,6 +39,9 @@ static int omap2_nand_gpmc_retime(void)
struct gpmc_timings t;
int err;
if (!gpmc_nand_data->gpmc_t)
return 0;
memset(&t, 0, sizeof(t));
t.sync_clk = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->sync_clk);
t.cs_on = gpmc_round_ns_to_ticks(gpmc_nand_data->gpmc_t->cs_on);

2
arch/arm/mach-omap2/include/mach/entry-macro.S
View file

@ -52,7 +52,7 @@ omap_irq_base: .word 0
mrc p15, 0, \tmp, c0, c0, 0 @ get processor revision
and \tmp, \tmp, #0x000f0000 @ only check architecture
cmp \tmp, #0x00060000 @ is v6?
cmp \tmp, #0x00070000 @ is v6?
beq 2400f @ found v6 so it's omap24xx
mrc p15, 0, \tmp, c0, c0, 0 @ get processor revision
and \tmp, \tmp, #0x000000f0 @ check cortex 8 or 9

6
arch/arm/mach-omap2/omap-headsmp.S
View file

@ -33,7 +33,7 @@
ENTRY(omap_secondary_startup)
hold: ldr r12,=0x103
dsb
smc @ read from AuxCoreBoot0
smc #0 @ read from AuxCoreBoot0
mov r0, r0, lsr #9
mrc p15, 0, r4, c0, c0, 5
and r4, r4, #0x0f
@ -52,7 +52,7 @@ ENTRY(omap_modify_auxcoreboot0)
stmfd sp!, {r1-r12, lr}
ldr r12, =0x104
dsb
smc
smc #0
ldmfd sp!, {r1-r12, pc}
END(omap_modify_auxcoreboot0)
@ -60,6 +60,6 @@ ENTRY(omap_auxcoreboot_addr)
stmfd sp!, {r2-r12, lr}
ldr r12, =0x105
dsb
smc
smc #0
ldmfd sp!, {r2-r12, pc}
END(omap_auxcoreboot_addr)

2
arch/arm/mach-omap2/omap44xx-smc.S
View file

@ -27,6 +27,6 @@ ENTRY(omap_smc1)
mov r12, r0
mov r0, r1
dsb
smc
smc #0
ldmfd sp!, {r2-r12, pc}
END(omap_smc1)

3
arch/arm/mach-omap2/omap_hwmod.c
View file

@ -1511,6 +1511,9 @@ struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
c = oh->slaves[oh->_mpu_port_index]->_clk;
}
if (!c->clkdm)
return NULL;
return c->clkdm->pwrdm.ptr;
}

2
arch/arm/mach-omap2/powerdomain.c
View file

@ -222,7 +222,7 @@ void pwrdm_init(struct powerdomain **pwrdm_list)
{
struct powerdomain **p = NULL;
if (cpu_is_omap24xx() | cpu_is_omap34xx()) {
if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
pwrstctrl_reg_offs = OMAP2_PM_PWSTCTRL;
pwrstst_reg_offs = OMAP2_PM_PWSTST;
} else if (cpu_is_omap44xx()) {

4
arch/arm/mach-omap2/prcm.c
View file

@ -123,7 +123,7 @@ struct omap3_prcm_regs prcm_context;
u32 omap_prcm_get_reset_sources(void)
{
/* XXX This presumably needs modification for 34XX */
if (cpu_is_omap24xx() | cpu_is_omap34xx())
if (cpu_is_omap24xx() || cpu_is_omap34xx())
return prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTST) & 0x7f;
if (cpu_is_omap44xx())
return prm_read_mod_reg(WKUP_MOD, OMAP4_RM_RSTST) & 0x7f;
@ -157,7 +157,7 @@ void omap_prcm_arch_reset(char mode, const char *cmd)
else
WARN_ON(1);
if (cpu_is_omap24xx() | cpu_is_omap34xx())
if (cpu_is_omap24xx() || cpu_is_omap34xx())
prm_set_mod_reg_bits(OMAP_RST_DPLL3, prcm_offs,
OMAP2_RM_RSTCTRL);
if (cpu_is_omap44xx())

35
arch/arm/mach-omap2/serial.c
View file

@ -115,7 +115,6 @@ static struct plat_serial8250_port serial_platform_data2[] = {
}
};
#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
static struct plat_serial8250_port serial_platform_data3[] = {
{
.irq = 70,
@ -128,23 +127,12 @@ static struct plat_serial8250_port serial_platform_data3[] = {
}
};
static inline void omap2_set_globals_uart4(struct omap_globals *omap2_globals)
{
serial_platform_data3[0].mapbase = omap2_globals->uart4_phys;
}
#else
static inline void omap2_set_globals_uart4(struct omap_globals *omap2_globals)
{
}
#endif
void __init omap2_set_globals_uart(struct omap_globals *omap2_globals)
{
serial_platform_data0[0].mapbase = omap2_globals->uart1_phys;
serial_platform_data1[0].mapbase = omap2_globals->uart2_phys;
serial_platform_data2[0].mapbase = omap2_globals->uart3_phys;
if (cpu_is_omap3630() || cpu_is_omap44xx())
omap2_set_globals_uart4(omap2_globals);
serial_platform_data3[0].mapbase = omap2_globals->uart4_phys;
}
static inline unsigned int __serial_read_reg(struct uart_port *up,
@ -550,7 +538,7 @@ static ssize_t sleep_timeout_store(struct device *dev,
unsigned int value;
if (sscanf(buf, "%u", &value) != 1) {
printk(KERN_ERR "sleep_timeout_store: Invalid value\n");
dev_err(dev, "sleep_timeout_store: Invalid value\n");
return -EINVAL;
}
@ -664,27 +652,33 @@ void __init omap_serial_early_init(void)
struct device *dev = &pdev->dev;
struct plat_serial8250_port *p = dev->platform_data;
/* Don't map zero-based physical address */
if (p->mapbase == 0) {
dev_warn(dev, "no physical address for uart#%d,"
" so skipping early_init...\n", i);
continue;
}
/*
* Module 4KB + L4 interconnect 4KB
* Static mapping, never released
*/
p->membase = ioremap(p->mapbase, SZ_8K);
if (!p->membase) {
printk(KERN_ERR "ioremap failed for uart%i\n", i + 1);
dev_err(dev, "ioremap failed for uart%i\n", i + 1);
continue;
}
sprintf(name, "uart%d_ick", i + 1);
uart->ick = clk_get(NULL, name);
if (IS_ERR(uart->ick)) {
printk(KERN_ERR "Could not get uart%d_ick\n", i + 1);
dev_err(dev, "Could not get uart%d_ick\n", i + 1);
uart->ick = NULL;
}
sprintf(name, "uart%d_fck", i+1);
uart->fck = clk_get(NULL, name);
if (IS_ERR(uart->fck)) {
printk(KERN_ERR "Could not get uart%d_fck\n", i + 1);
dev_err(dev, "Could not get uart%d_fck\n", i + 1);
uart->fck = NULL;
}
@ -727,6 +721,13 @@ void __init omap_serial_init_port(int port)
pdev = &uart->pdev;
dev = &pdev->dev;
/* Don't proceed if there's no clocks available */
if (unlikely(!uart->ick || !uart->fck)) {
WARN(1, "%s: can't init uart%d, no clocks available\n",
kobject_name(&dev->kobj), port);
return;
}
omap_uart_enable_clocks(uart);
omap_uart_reset(uart);

2
arch/arm/mach-realview/core.c
View file

@ -254,7 +254,7 @@ static unsigned int realview_mmc_status(struct device *dev)
else
mask = 2;
return readl(REALVIEW_SYSMCI) & mask;
return !(readl(REALVIEW_SYSMCI) & mask);
}
struct mmci_platform_data realview_mmc0_plat_data = {

24
arch/arm/mm/alignment.c
View file

@ -166,15 +166,15 @@ union offset_union {
THUMB( "1: "ins" %1, [%2]\n" ) \
THUMB( " add %2, %2, #1\n" ) \
"2:\n" \
" .section .fixup,\"ax\"\n" \
" .pushsection .fixup,\"ax\"\n" \
" .align 2\n" \
"3: mov %0, #1\n" \
" b 2b\n" \
" .previous\n" \
" .section __ex_table,\"a\"\n" \
" .popsection\n" \
" .pushsection __ex_table,\"a\"\n" \
" .align 3\n" \
" .long 1b, 3b\n" \
" .previous\n" \
" .popsection\n" \
: "=r" (err), "=&r" (val), "=r" (addr) \
: "0" (err), "2" (addr))
@ -226,16 +226,16 @@ union offset_union {
" mov %1, %1, "NEXT_BYTE"\n" \
"2: "ins" %1, [%2]\n" \
"3:\n" \
" .section .fixup,\"ax\"\n" \
" .pushsection .fixup,\"ax\"\n" \
" .align 2\n" \
"4: mov %0, #1\n" \
" b 3b\n" \
" .previous\n" \
" .section __ex_table,\"a\"\n" \
" .popsection\n" \
" .pushsection __ex_table,\"a\"\n" \
" .align 3\n" \
" .long 1b, 4b\n" \
" .long 2b, 4b\n" \
" .previous\n" \
" .popsection\n" \
: "=r" (err), "=&r" (v), "=&r" (a) \
: "0" (err), "1" (v), "2" (a)); \
if (err) \
@ -266,18 +266,18 @@ union offset_union {
" mov %1, %1, "NEXT_BYTE"\n" \
"4: "ins" %1, [%2]\n" \
"5:\n" \
" .section .fixup,\"ax\"\n" \
" .pushsection .fixup,\"ax\"\n" \
" .align 2\n" \
"6: mov %0, #1\n" \
" b 5b\n" \
" .previous\n" \
" .section __ex_table,\"a\"\n" \
" .popsection\n" \
" .pushsection __ex_table,\"a\"\n" \
" .align 3\n" \
" .long 1b, 6b\n" \
" .long 2b, 6b\n" \
" .long 3b, 6b\n" \
" .long 4b, 6b\n" \
" .previous\n" \
" .popsection\n" \
: "=r" (err), "=&r" (v), "=&r" (a) \
: "0" (err), "1" (v), "2" (a)); \
if (err) \

9
arch/arm/mm/copypage-v6.c
View file

@ -41,14 +41,7 @@ static void v6_copy_user_highpage_nonaliasing(struct page *to,
kfrom = kmap_atomic(from, KM_USER0);
kto = kmap_atomic(to, KM_USER1);
copy_page(kto, kfrom);
#ifdef CONFIG_HIGHMEM
/*
* kmap_atomic() doesn't set the page virtual address, and
* kunmap_atomic() takes care of cache flushing already.
*/
if (page_address(to) != NULL)
#endif
__cpuc_flush_dcache_area(kto, PAGE_SIZE);
__cpuc_flush_dcache_area(kto, PAGE_SIZE);
kunmap_atomic(kto, KM_USER1);
kunmap_atomic(kfrom, KM_USER0);
}

5
arch/arm/mm/dma-mapping.c
View file

@ -464,6 +464,11 @@ static void dma_cache_maint_page(struct page *page, unsigned long offset,
vaddr += offset;
op(vaddr, len, dir);
kunmap_high(page);
} else if (cache_is_vipt()) {
pte_t saved_pte;
vaddr = kmap_high_l1_vipt(page, &saved_pte);
op(vaddr + offset, len, dir);
kunmap_high_l1_vipt(page, saved_pte);
}
} else {
vaddr = page_address(page) + offset;

25
arch/arm/mm/flush.c
View file

@ -13,6 +13,7 @@
#include <asm/cacheflush.h>
#include <asm/cachetype.h>
#include <asm/highmem.h>
#include <asm/smp_plat.h>
#include <asm/system.h>
#include <asm/tlbflush.h>
@ -152,21 +153,25 @@ void copy_to_user_page(struct vm_area_struct *vma, struct page *page,
void __flush_dcache_page(struct address_space *mapping, struct page *page)
{
void *addr = page_address(page);
/*
* Writeback any data associated with the kernel mapping of this
* page. This ensures that data in the physical page is mutually
* coherent with the kernels mapping.
*/
#ifdef CONFIG_HIGHMEM
/*
* kmap_atomic() doesn't set the page virtual address, and
* kunmap_atomic() takes care of cache flushing already.
*/
if (addr)
#endif
__cpuc_flush_dcache_area(addr, PAGE_SIZE);
if (!PageHighMem(page)) {
__cpuc_flush_dcache_area(page_address(page), PAGE_SIZE);
} else {
void *addr = kmap_high_get(page);
if (addr) {
__cpuc_flush_dcache_area(addr, PAGE_SIZE);
kunmap_high(page);
} else if (cache_is_vipt()) {
pte_t saved_pte;
addr = kmap_high_l1_vipt(page, &saved_pte);
__cpuc_flush_dcache_area(addr, PAGE_SIZE);
kunmap_high_l1_vipt(page, saved_pte);
}
}
/*
* If this is a page cache page, and we have an aliasing VIPT cache,

87
arch/arm/mm/highmem.c
View file

@ -79,7 +79,8 @@ void kunmap_atomic(void *kvaddr, enum km_type type)
unsigned int idx = type + KM_TYPE_NR * smp_processor_id();
if (kvaddr >= (void *)FIXADDR_START) {
__cpuc_flush_dcache_area((void *)vaddr, PAGE_SIZE);
if (cache_is_vivt())
__cpuc_flush_dcache_area((void *)vaddr, PAGE_SIZE);
#ifdef CONFIG_DEBUG_HIGHMEM
BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx));
set_pte_ext(TOP_PTE(vaddr), __pte(0), 0);
@ -124,3 +125,87 @@ struct page *kmap_atomic_to_page(const void *ptr)
pte = TOP_PTE(vaddr);
return pte_page(*pte);
}
#ifdef CONFIG_CPU_CACHE_VIPT
#include <linux/percpu.h>
/*
* The VIVT cache of a highmem page is always flushed before the page
* is unmapped. Hence unmapped highmem pages need no cache maintenance
* in that case.
*
* However unmapped pages may still be cached with a VIPT cache, and
* it is not possible to perform cache maintenance on them using physical
* addresses unfortunately. So we have no choice but to set up a temporary
* virtual mapping for that purpose.
*
* Yet this VIPT cache maintenance may be triggered from DMA support
* functions which are possibly called from interrupt context. As we don't
* want to keep interrupt disabled all the time when such maintenance is
* taking place, we therefore allow for some reentrancy by preserving and
* restoring the previous fixmap entry before the interrupted context is
* resumed. If the reentrancy depth is 0 then there is no need to restore
* the previous fixmap, and leaving the current one in place allow it to
* be reused the next time without a TLB flush (common with DMA).
*/
static DEFINE_PER_CPU(int, kmap_high_l1_vipt_depth);
void *kmap_high_l1_vipt(struct page *page, pte_t *saved_pte)
{
unsigned int idx, cpu = smp_processor_id();
int *depth = &per_cpu(kmap_high_l1_vipt_depth, cpu);
unsigned long vaddr, flags;
pte_t pte, *ptep;
idx = KM_L1_CACHE + KM_TYPE_NR * cpu;
vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
ptep = TOP_PTE(vaddr);
pte = mk_pte(page, kmap_prot);
if (!in_interrupt())
preempt_disable();
raw_local_irq_save(flags);
(*depth)++;
if (pte_val(*ptep) == pte_val(pte)) {
*saved_pte = pte;
} else {
*saved_pte = *ptep;
set_pte_ext(ptep, pte, 0);
local_flush_tlb_kernel_page(vaddr);
}
raw_local_irq_restore(flags);
return (void *)vaddr;
}
void kunmap_high_l1_vipt(struct page *page, pte_t saved_pte)
{
unsigned int idx, cpu = smp_processor_id();
int *depth = &per_cpu(kmap_high_l1_vipt_depth, cpu);
unsigned long vaddr, flags;
pte_t pte, *ptep;
idx = KM_L1_CACHE + KM_TYPE_NR * cpu;
vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
ptep = TOP_PTE(vaddr);
pte = mk_pte(page, kmap_prot);
BUG_ON(pte_val(*ptep) != pte_val(pte));
BUG_ON(*depth <= 0);
raw_local_irq_save(flags);
(*depth)--;
if (*depth != 0 && pte_val(pte) != pte_val(saved_pte)) {
set_pte_ext(ptep, saved_pte, 0);
local_flush_tlb_kernel_page(vaddr);
}
raw_local_irq_restore(flags);
if (!in_interrupt())
preempt_enable();
}
#endif /* CONFIG_CPU_CACHE_VIPT */

14
arch/arm/mm/mmu.c
View file

@ -420,6 +420,10 @@ static void __init build_mem_type_table(void)
user_pgprot |= L_PTE_SHARED;
kern_pgprot |= L_PTE_SHARED;
vecs_pgprot |= L_PTE_SHARED;
mem_types[MT_DEVICE_WC].prot_sect |= PMD_SECT_S;
mem_types[MT_DEVICE_WC].prot_pte |= L_PTE_SHARED;
mem_types[MT_DEVICE_CACHED].prot_sect |= PMD_SECT_S;
mem_types[MT_DEVICE_CACHED].prot_pte |= L_PTE_SHARED;
mem_types[MT_MEMORY].prot_sect |= PMD_SECT_S;
mem_types[MT_MEMORY_NONCACHED].prot_sect |= PMD_SECT_S;
#endif
@ -1050,10 +1054,12 @@ void setup_mm_for_reboot(char mode)
pgd_t *pgd;
int i;
if (current->mm && current->mm->pgd)
pgd = current->mm->pgd;
else
pgd = init_mm.pgd;
/*
* We need to access to user-mode page tables here. For kernel threads
* we don't have any user-mode mappings so we use the context that we
* "borrowed".
*/
pgd = current->active_mm->pgd;
base_pmdval = PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | PMD_TYPE_SECT;
if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale())

2
arch/arm/mm/proc-sa1100.S
View file

@ -45,7 +45,7 @@ ENTRY(cpu_sa1100_proc_init)
mcr p15, 0, r0, c9, c0, 5 @ Allow read-buffer operations from userland
mov pc, lr
.previous
.section .text
/*
* cpu_sa1100_proc_fin()

8
arch/arm/nwfpe/entry.S
View file

@ -111,12 +111,12 @@ next:
@ to fault. Emit the appropriate exception gunk to fix things up.
@ ??? For some reason, faults can happen at .Lx2 even with a
@ plain LDR instruction. Weird, but it seems harmless.
.section .fixup,"ax"
.pushsection .fixup,"ax"
.align 2
.Lfix: mov pc, r9 @ let the user eat segfaults
.previous
.popsection
.section __ex_table,"a"
.pushsection __ex_table,"a"
.align 3
.long .Lx1, .Lfix
.previous
.popsection

6
arch/arm/plat-mxc/include/mach/board-mx31pdk.h → arch/arm/plat-mxc/include/mach/board-mx31_3ds.h
View file

@ -8,8 +8,8 @@
* published by the Free Software Foundation.
*/
#ifndef __ASM_ARCH_MXC_BOARD_MX31PDK_H__
#define __ASM_ARCH_MXC_BOARD_MX31PDK_H__
#ifndef __ASM_ARCH_MXC_BOARD_MX31_3DS_H__
#define __ASM_ARCH_MXC_BOARD_MX31_3DS_H__
/* Definitions for components on the Debug board */
@ -56,4 +56,4 @@
#define MXC_MAX_EXP_IO_LINES 16
#endif /* __ASM_ARCH_MXC_BOARD_MX31PDK_H__ */
#endif /* __ASM_ARCH_MXC_BOARD_MX31_3DS_H__ */

33
arch/arm/plat-mxc/include/mach/mx51.h
View file

@ -14,7 +14,7 @@
* FB100000 70000000 1M SPBA 0
* FB000000 73F00000 1M AIPS 1
* FB200000 83F00000 1M AIPS 2
* FA100000 8FFFC000 16K TZIC (interrupt controller)
* 8FFFC000 16K TZIC (interrupt controller)
* 90000000 256M CSD0 SDRAM/DDR
* A0000000 256M CSD1 SDRAM/DDR
* B0000000 128M CS0 Flash
@ -23,10 +23,16 @@
* C8000000 64M CS3 Flash
* CC000000 32M CS4 SRAM
* CE000000 32M CS5 SRAM
* F9000000 CFFF0000 64K NFC (NAND Flash AXI)
* CFFF0000 64K NFC (NAND Flash AXI)
*
*/
/*
* IROM
*/
#define MX51_IROM_BASE_ADDR 0x0
#define MX51_IROM_SIZE SZ_64K
/*
* IRAM
*/
@ -40,7 +46,6 @@
* NFC
*/
#define MX51_NFC_AXI_BASE_ADDR 0xCFFF0000 /* NAND flash AXI */
#define MX51_NFC_AXI_BASE_ADDR_VIRT 0xF9000000
#define MX51_NFC_AXI_SIZE SZ_64K
/*
@ -49,9 +54,8 @@
#define MX51_GPU_BASE_ADDR 0x20000000
#define MX51_GPU2D_BASE_ADDR 0xD0000000
#define MX51_TZIC_BASE_ADDR 0x8FFFC000
#define MX51_TZIC_BASE_ADDR_VIRT 0xFA100000
#define MX51_TZIC_SIZE SZ_16K
#define MX51_TZIC_BASE_ADDR_TO1 0x8FFFC000
#define MX51_TZIC_BASE_ADDR 0xE0000000
#define MX51_DEBUG_BASE_ADDR 0x60000000
#define MX51_DEBUG_BASE_ADDR_VIRT 0xFA200000
@ -232,12 +236,10 @@
#define MX51_IO_ADDRESS(x) \
(void __iomem *) \
(MX51_IS_MODULE(x, IRAM) ? MX51_IRAM_IO_ADDRESS(x) : \
MX51_IS_MODULE(x, TZIC) ? MX51_TZIC_IO_ADDRESS(x) : \
MX51_IS_MODULE(x, DEBUG) ? MX51_DEBUG_IO_ADDRESS(x) : \
MX51_IS_MODULE(x, SPBA0) ? MX51_SPBA0_IO_ADDRESS(x) : \
MX51_IS_MODULE(x, AIPS1) ? MX51_AIPS1_IO_ADDRESS(x) : \
MX51_IS_MODULE(x, AIPS2) ? MX51_AIPS2_IO_ADDRESS(x) : \
MX51_IS_MODULE(x, NFC_AXI) ? MX51_NFC_AXI_IO_ADDRESS(x) : \
MX51_IS_MODULE(x, AIPS2) ? MX51_AIPS2_IO_ADDRESS(x) : \
0xDEADBEEF)
/*
@ -246,9 +248,6 @@
#define MX51_IRAM_IO_ADDRESS(x) \
(((x) - MX51_IRAM_BASE_ADDR) + MX51_IRAM_BASE_ADDR_VIRT)
#define MX51_TZIC_IO_ADDRESS(x) \
(((x) - MX51_TZIC_BASE_ADDR) + MX51_TZIC_BASE_ADDR_VIRT)
#define MX51_DEBUG_IO_ADDRESS(x) \
(((x) - MX51_DEBUG_BASE_ADDR) + MX51_DEBUG_BASE_ADDR_VIRT)
@ -261,9 +260,6 @@
#define MX51_AIPS2_IO_ADDRESS(x) \
(((x) - MX51_AIPS2_BASE_ADDR) + MX51_AIPS2_BASE_ADDR_VIRT)
#define MX51_NFC_AXI_IO_ADDRESS(x) \
(((x) - MX51_NFC_AXI_BASE_ADDR) + MX51_NFC_AXI_BASE_ADDR_VIRT)
#define MX51_IS_MEM_DEVICE_NONSHARED(x) 0
/*
@ -443,12 +439,7 @@
#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS)
extern unsigned int system_rev;
static inline unsigned int mx51_revision(void)
{
return system_rev;
}
extern int mx51_revision(void);
#endif
#endif /* __ASM_ARCH_MXC_MX51_H__ */

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