Merge "clk: qcom: gcc-scuba: Update sdcc1_apps_clk_src frequency table"

This commit is contained in:
qctecmdr 2020-04-20 12:40:04 -07:00 committed by Gerrit - the friendly Code Review server
commit 28cfaa7d7c
2 changed files with 4 additions and 3 deletions

View file

@ -1488,7 +1488,7 @@ static const struct freq_tbl ftbl_gcc_sdcc1_apps_clk_src[] = {
F(50000000, P_GPLL0_OUT_AUX2, 6, 0, 0),
F(100000000, P_GPLL0_OUT_AUX2, 3, 0, 0),
F(192000000, P_GPLL6_OUT_MAIN, 2, 0, 0),
F(200000000, P_GPLL0_OUT_EARLY, 3, 0, 0),
F(384000000, P_GPLL6_OUT_MAIN, 1, 0, 0),
{ }
};
@ -1508,7 +1508,7 @@ static struct clk_rcg2 gcc_sdcc1_apps_clk_src = {
.num_rate_max = VDD_NUM,
.rate_max = (unsigned long[VDD_NUM]) {
[VDD_LOWER] = 100000000,
[VDD_LOW_L1] = 200000000},
[VDD_LOW_L1] = 384000000},
},
};
@ -2423,7 +2423,7 @@ static struct clk_branch gcc_gpu_iref_clk = {
static struct clk_branch gcc_gpu_memnoc_gfx_clk = {
.halt_reg = 0x3600c,
.halt_check = BRANCH_HALT,
.halt_check = BRANCH_VOTED,
.hwcg_reg = 0x3600c,
.hwcg_bit = 1,
.clkr = {

View file

@ -184,6 +184,7 @@ static struct clk_branch gpu_cc_ahb_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "gpu_cc_ahb_clk",
.flags = CLK_IS_CRITICAL,
.ops = &clk_branch2_ops,
},
},