iommu/amd: Set exclusion range correctly
[ Upstream commit 3c677d206210f53a4be972211066c0f1cd47fe12 ]
The exlcusion range limit register needs to contain the
base-address of the last page that is part of the range, as
bits 0-11 of this register are treated as 0xfff by the
hardware for comparisons.
So correctly set the exclusion range in the hardware to the
last page which is _in_ the range.
Fixes: b2026aa2dc
('x86, AMD IOMMU: add functions for programming IOMMU MMIO space')
Signed-off-by: Joerg Roedel <jroedel@suse.de>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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1 changed files with 1 additions and 1 deletions
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@ -356,7 +356,7 @@ static void iommu_write_l2(struct amd_iommu *iommu, u8 address, u32 val)
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static void iommu_set_exclusion_range(struct amd_iommu *iommu)
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{
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u64 start = iommu->exclusion_start & PAGE_MASK;
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u64 limit = (start + iommu->exclusion_length) & PAGE_MASK;
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u64 limit = (start + iommu->exclusion_length - 1) & PAGE_MASK;
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u64 entry;
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if (!iommu->exclusion_start)
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