ath9k_hw: Assign default xlna config for AR9485
For AR9485 boards with XLNA, the default gpio config is not set correctly, fix this. Cc: stable@vger.kernel.org Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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2 changed files with 8 additions and 2 deletions
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@ -3563,14 +3563,18 @@ static void ar9003_hw_ant_ctrl_apply(struct ath_hw *ah, bool is2ghz)
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{
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{
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struct ath9k_hw_capabilities *pCap = &ah->caps;
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struct ath9k_hw_capabilities *pCap = &ah->caps;
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int chain;
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int chain;
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u32 regval;
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u32 regval, value;
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static const u32 switch_chain_reg[AR9300_MAX_CHAINS] = {
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static const u32 switch_chain_reg[AR9300_MAX_CHAINS] = {
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AR_PHY_SWITCH_CHAIN_0,
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AR_PHY_SWITCH_CHAIN_0,
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AR_PHY_SWITCH_CHAIN_1,
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AR_PHY_SWITCH_CHAIN_1,
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AR_PHY_SWITCH_CHAIN_2,
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AR_PHY_SWITCH_CHAIN_2,
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};
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};
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u32 value = ar9003_hw_ant_ctrl_common_get(ah, is2ghz);
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if (AR_SREV_9485(ah) && (ar9003_hw_get_rx_gain_idx(ah) == 0))
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ath9k_hw_cfg_output(ah, AR9300_EXT_LNA_CTL_GPIO_AR9485,
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AR_GPIO_OUTPUT_MUX_AS_PCIE_ATTENTION_LED);
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value = ar9003_hw_ant_ctrl_common_get(ah, is2ghz);
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if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
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if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
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REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM,
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REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM,
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@ -351,6 +351,8 @@
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#define AR_PHY_CCA_NOM_VAL_9330_2GHZ -118
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#define AR_PHY_CCA_NOM_VAL_9330_2GHZ -118
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#define AR9300_EXT_LNA_CTL_GPIO_AR9485 9
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/*
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/*
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* AGC Field Definitions
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* AGC Field Definitions
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*/
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*/
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