Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/linville/wireless-next-2.6 into for-davem

This commit is contained in:
John W. Linville 2010-11-24 16:49:20 -05:00
commit 51cce8a590
170 changed files with 12138 additions and 2038 deletions

View file

@ -54,7 +54,7 @@ int ar9170_write_mem(struct ar9170 *ar, const __le32 *data, size_t len)
int ar9170_write_reg(struct ar9170 *ar, const u32 reg, const u32 val) int ar9170_write_reg(struct ar9170 *ar, const u32 reg, const u32 val)
{ {
__le32 buf[2] = { const __le32 buf[2] = {
cpu_to_le32(reg), cpu_to_le32(reg),
cpu_to_le32(val), cpu_to_le32(val),
}; };

View file

@ -104,6 +104,11 @@ enum ath_cipher {
ATH_CIPHER_MIC = 127 ATH_CIPHER_MIC = 127
}; };
enum ath_drv_info {
AR7010_DEVICE = BIT(0),
AR9287_DEVICE = BIT(1),
};
/** /**
* struct ath_ops - Register read/write operations * struct ath_ops - Register read/write operations
* *
@ -147,6 +152,7 @@ struct ath_common {
u8 rx_chainmask; u8 rx_chainmask;
u32 rx_bufsize; u32 rx_bufsize;
u32 driver_info;
u32 keymax; u32 keymax;
DECLARE_BITMAP(keymap, ATH_KEYMAX); DECLARE_BITMAP(keymap, ATH_KEYMAX);

View file

@ -4,6 +4,7 @@ config ATH5K
select MAC80211_LEDS select MAC80211_LEDS
select LEDS_CLASS select LEDS_CLASS
select NEW_LEDS select NEW_LEDS
select AVERAGE
---help--- ---help---
This module adds support for wireless adapters based on This module adds support for wireless adapters based on
Atheros 5xxx chipset. Atheros 5xxx chipset.

View file

@ -63,15 +63,15 @@ ath5k_ani_set_noise_immunity_level(struct ath5k_hw *ah, int level)
* so i stick with the HAL version for now... * so i stick with the HAL version for now...
*/ */
#if 0 #if 0
const s8 hi[] = { -18, -18, -16, -14, -12 }; static const s8 hi[] = { -18, -18, -16, -14, -12 };
const s8 lo[] = { -52, -56, -60, -64, -70 }; static const s8 lo[] = { -52, -56, -60, -64, -70 };
const s8 sz[] = { -34, -41, -48, -55, -62 }; static const s8 sz[] = { -34, -41, -48, -55, -62 };
const s8 fr[] = { -70, -72, -75, -78, -80 }; static const s8 fr[] = { -70, -72, -75, -78, -80 };
#else #else
const s8 sz[] = { -55, -62 }; static const s8 sz[] = { -55, -62 };
const s8 lo[] = { -64, -70 }; static const s8 lo[] = { -64, -70 };
const s8 hi[] = { -14, -12 }; static const s8 hi[] = { -14, -12 };
const s8 fr[] = { -78, -80 }; static const s8 fr[] = { -78, -80 };
#endif #endif
if (level < 0 || level >= ARRAY_SIZE(sz)) { if (level < 0 || level >= ARRAY_SIZE(sz)) {
ATH5K_ERR(ah->ah_sc, "noise immuniy level %d out of range", ATH5K_ERR(ah->ah_sc, "noise immuniy level %d out of range",
@ -102,7 +102,7 @@ ath5k_ani_set_noise_immunity_level(struct ath5k_hw *ah, int level)
void void
ath5k_ani_set_spur_immunity_level(struct ath5k_hw *ah, int level) ath5k_ani_set_spur_immunity_level(struct ath5k_hw *ah, int level)
{ {
const int val[] = { 2, 4, 6, 8, 10, 12, 14, 16 }; static const int val[] = { 2, 4, 6, 8, 10, 12, 14, 16 };
if (level < 0 || level >= ARRAY_SIZE(val) || if (level < 0 || level >= ARRAY_SIZE(val) ||
level > ah->ah_sc->ani_state.max_spur_level) { level > ah->ah_sc->ani_state.max_spur_level) {
@ -127,7 +127,7 @@ ath5k_ani_set_spur_immunity_level(struct ath5k_hw *ah, int level)
void void
ath5k_ani_set_firstep_level(struct ath5k_hw *ah, int level) ath5k_ani_set_firstep_level(struct ath5k_hw *ah, int level)
{ {
const int val[] = { 0, 4, 8 }; static const int val[] = { 0, 4, 8 };
if (level < 0 || level >= ARRAY_SIZE(val)) { if (level < 0 || level >= ARRAY_SIZE(val)) {
ATH5K_ERR(ah->ah_sc, "firstep level %d out of range", level); ATH5K_ERR(ah->ah_sc, "firstep level %d out of range", level);
@ -151,12 +151,12 @@ ath5k_ani_set_firstep_level(struct ath5k_hw *ah, int level)
void void
ath5k_ani_set_ofdm_weak_signal_detection(struct ath5k_hw *ah, bool on) ath5k_ani_set_ofdm_weak_signal_detection(struct ath5k_hw *ah, bool on)
{ {
const int m1l[] = { 127, 50 }; static const int m1l[] = { 127, 50 };
const int m2l[] = { 127, 40 }; static const int m2l[] = { 127, 40 };
const int m1[] = { 127, 0x4d }; static const int m1[] = { 127, 0x4d };
const int m2[] = { 127, 0x40 }; static const int m2[] = { 127, 0x40 };
const int m2cnt[] = { 31, 16 }; static const int m2cnt[] = { 31, 16 };
const int m2lcnt[] = { 63, 48 }; static const int m2lcnt[] = { 63, 48 };
AR5K_REG_WRITE_BITS(ah, AR5K_PHY_WEAK_OFDM_LOW_THR, AR5K_REG_WRITE_BITS(ah, AR5K_PHY_WEAK_OFDM_LOW_THR,
AR5K_PHY_WEAK_OFDM_LOW_THR_M1, m1l[on]); AR5K_PHY_WEAK_OFDM_LOW_THR_M1, m1l[on]);
@ -192,7 +192,7 @@ ath5k_ani_set_ofdm_weak_signal_detection(struct ath5k_hw *ah, bool on)
void void
ath5k_ani_set_cck_weak_signal_detection(struct ath5k_hw *ah, bool on) ath5k_ani_set_cck_weak_signal_detection(struct ath5k_hw *ah, bool on)
{ {
const int val[] = { 8, 6 }; static const int val[] = { 8, 6 };
AR5K_REG_WRITE_BITS(ah, AR5K_PHY_CCK_CROSSCORR, AR5K_REG_WRITE_BITS(ah, AR5K_PHY_CCK_CROSSCORR,
AR5K_PHY_CCK_CROSSCORR_WEAK_SIG_THR, val[on]); AR5K_PHY_CCK_CROSSCORR_WEAK_SIG_THR, val[on]);
ah->ah_sc->ani_state.cck_weak_sig = on; ah->ah_sc->ani_state.cck_weak_sig = on;
@ -216,7 +216,7 @@ static void
ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as, ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
bool ofdm_trigger) bool ofdm_trigger)
{ {
int rssi = ah->ah_beacon_rssi_avg.avg; int rssi = ewma_read(&ah->ah_beacon_rssi_avg);
ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "raise immunity (%s)", ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "raise immunity (%s)",
ofdm_trigger ? "ODFM" : "CCK"); ofdm_trigger ? "ODFM" : "CCK");
@ -301,7 +301,7 @@ ath5k_ani_raise_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as,
static void static void
ath5k_ani_lower_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as) ath5k_ani_lower_immunity(struct ath5k_hw *ah, struct ath5k_ani_state *as)
{ {
int rssi = ah->ah_beacon_rssi_avg.avg; int rssi = ewma_read(&ah->ah_beacon_rssi_avg);
ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "lower immunity"); ATH5K_DBG_UNLIMIT(ah->ah_sc, ATH5K_DEBUG_ANI, "lower immunity");

View file

@ -25,6 +25,7 @@
#include <linux/io.h> #include <linux/io.h>
#include <linux/types.h> #include <linux/types.h>
#include <linux/average.h>
#include <net/mac80211.h> #include <net/mac80211.h>
/* RX/TX descriptor hw structs /* RX/TX descriptor hw structs
@ -1102,7 +1103,7 @@ struct ath5k_hw {
struct ath5k_nfcal_hist ah_nfcal_hist; struct ath5k_nfcal_hist ah_nfcal_hist;
/* average beacon RSSI in our BSS (used by ANI) */ /* average beacon RSSI in our BSS (used by ANI) */
struct ath5k_avg_val ah_beacon_rssi_avg; struct ewma ah_beacon_rssi_avg;
/* noise floor from last periodic calibration */ /* noise floor from last periodic calibration */
s32 ah_noise_floor; s32 ah_noise_floor;
@ -1315,27 +1316,4 @@ static inline u32 ath5k_hw_bitswap(u32 val, unsigned int bits)
return retval; return retval;
} }
#define AVG_SAMPLES 8
#define AVG_FACTOR 1000
/**
* ath5k_moving_average - Exponentially weighted moving average
* @avg: average structure
* @val: current value
*
* This implementation make use of a struct ath5k_avg_val to prevent rounding
* errors.
*/
static inline struct ath5k_avg_val
ath5k_moving_average(const struct ath5k_avg_val avg, const int val)
{
struct ath5k_avg_val new;
new.avg_weight = avg.avg_weight ?
(((avg.avg_weight * ((AVG_SAMPLES) - 1)) +
(val * (AVG_FACTOR))) / (AVG_SAMPLES)) :
(val * (AVG_FACTOR));
new.avg = new.avg_weight / (AVG_FACTOR);
return new;
}
#endif #endif

View file

@ -549,7 +549,7 @@ static void ath_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
/* Calculate combined mode - when APs are active, operate in AP mode. /* Calculate combined mode - when APs are active, operate in AP mode.
* Otherwise use the mode of the new interface. This can currently * Otherwise use the mode of the new interface. This can currently
* only deal with combinations of APs and STAs. Only one ad-hoc * only deal with combinations of APs and STAs. Only one ad-hoc
* interfaces is allowed above. * interfaces is allowed.
*/ */
if (avf->opmode == NL80211_IFTYPE_AP) if (avf->opmode == NL80211_IFTYPE_AP)
iter_data->opmode = NL80211_IFTYPE_AP; iter_data->opmode = NL80211_IFTYPE_AP;
@ -558,14 +558,6 @@ static void ath_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
iter_data->opmode = avf->opmode; iter_data->opmode = avf->opmode;
} }
static void ath_do_set_opmode(struct ath5k_softc *sc)
{
struct ath5k_hw *ah = sc->ah;
ath5k_hw_set_opmode(ah, sc->opmode);
ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "mode setup opmode %d (%s)\n",
sc->opmode, ath_opmode_to_string(sc->opmode));
}
static void ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc, static void ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc,
struct ieee80211_vif *vif) struct ieee80211_vif *vif)
{ {
@ -595,7 +587,9 @@ static void ath5k_update_bssid_mask_and_opmode(struct ath5k_softc *sc,
/* Nothing active, default to station mode */ /* Nothing active, default to station mode */
sc->opmode = NL80211_IFTYPE_STATION; sc->opmode = NL80211_IFTYPE_STATION;
ath_do_set_opmode(sc); ath5k_hw_set_opmode(sc->ah, sc->opmode);
ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "mode setup opmode %d (%s)\n",
sc->opmode, ath_opmode_to_string(sc->opmode));
if (iter_data.need_set_hw_addr && iter_data.found_active) if (iter_data.need_set_hw_addr && iter_data.found_active)
ath5k_hw_set_lladdr(sc->ah, iter_data.active_mac); ath5k_hw_set_lladdr(sc->ah, iter_data.active_mac);
@ -1307,8 +1301,7 @@ ath5k_update_beacon_rssi(struct ath5k_softc *sc, struct sk_buff *skb, int rssi)
memcmp(mgmt->bssid, common->curbssid, ETH_ALEN) != 0) memcmp(mgmt->bssid, common->curbssid, ETH_ALEN) != 0)
return; return;
ah->ah_beacon_rssi_avg = ath5k_moving_average(ah->ah_beacon_rssi_avg, ewma_add(&ah->ah_beacon_rssi_avg, rssi);
rssi);
/* in IBSS mode we should keep RSSI statistics per neighbour */ /* in IBSS mode we should keep RSSI statistics per neighbour */
/* le16_to_cpu(mgmt->u.beacon.capab_info) & WLAN_CAPABILITY_IBSS */ /* le16_to_cpu(mgmt->u.beacon.capab_info) & WLAN_CAPABILITY_IBSS */
@ -2562,6 +2555,7 @@ ath5k_reset(struct ath5k_softc *sc, struct ieee80211_channel *chan)
ah->ah_cal_next_full = jiffies; ah->ah_cal_next_full = jiffies;
ah->ah_cal_next_ani = jiffies; ah->ah_cal_next_ani = jiffies;
ah->ah_cal_next_nf = jiffies; ah->ah_cal_next_nf = jiffies;
ewma_init(&ah->ah_beacon_rssi_avg, 1000, 8);
/* /*
* Change channels and update the h/w rate map if we're switching; * Change channels and update the h/w rate map if we're switching;
@ -3413,6 +3407,36 @@ static int ath5k_conf_tx(struct ieee80211_hw *hw, u16 queue,
return ret; return ret;
} }
static int ath5k_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
{
struct ath5k_softc *sc = hw->priv;
if (tx_ant == 1 && rx_ant == 1)
ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_FIXED_A);
else if (tx_ant == 2 && rx_ant == 2)
ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_FIXED_B);
else if ((tx_ant & 3) == 3 && (rx_ant & 3) == 3)
ath5k_hw_set_antenna_mode(sc->ah, AR5K_ANTMODE_DEFAULT);
else
return -EINVAL;
return 0;
}
static int ath5k_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant)
{
struct ath5k_softc *sc = hw->priv;
switch (sc->ah->ah_ant_mode) {
case AR5K_ANTMODE_FIXED_A:
*tx_ant = 1; *rx_ant = 1; break;
case AR5K_ANTMODE_FIXED_B:
*tx_ant = 2; *rx_ant = 2; break;
case AR5K_ANTMODE_DEFAULT:
*tx_ant = 3; *rx_ant = 3; break;
}
return 0;
}
static const struct ieee80211_ops ath5k_hw_ops = { static const struct ieee80211_ops ath5k_hw_ops = {
.tx = ath5k_tx, .tx = ath5k_tx,
.start = ath5k_start, .start = ath5k_start,
@ -3433,6 +3457,8 @@ static const struct ieee80211_ops ath5k_hw_ops = {
.sw_scan_start = ath5k_sw_scan_start, .sw_scan_start = ath5k_sw_scan_start,
.sw_scan_complete = ath5k_sw_scan_complete, .sw_scan_complete = ath5k_sw_scan_complete,
.set_coverage_class = ath5k_set_coverage_class, .set_coverage_class = ath5k_set_coverage_class,
.set_antenna = ath5k_set_antenna,
.get_antenna = ath5k_get_antenna,
}; };
/********************\ /********************\

View file

@ -719,7 +719,7 @@ static ssize_t read_file_ani(struct file *file, char __user *user_buf,
st->mib_intr); st->mib_intr);
len += snprintf(buf+len, sizeof(buf)-len, len += snprintf(buf+len, sizeof(buf)-len,
"beacon RSSI average:\t%d\n", "beacon RSSI average:\t%d\n",
sc->ah->ah_beacon_rssi_avg.avg); (int)ewma_read(&sc->ah->ah_beacon_rssi_avg));
#define CC_PRINT(_struct, _field) \ #define CC_PRINT(_struct, _field) \
_struct._field, \ _struct._field, \

View file

@ -834,10 +834,10 @@ void ath9k_hw_ani_setup(struct ath_hw *ah)
{ {
int i; int i;
const int totalSizeDesired[] = { -55, -55, -55, -55, -62 }; static const int totalSizeDesired[] = { -55, -55, -55, -55, -62 };
const int coarseHigh[] = { -14, -14, -14, -14, -12 }; static const int coarseHigh[] = { -14, -14, -14, -14, -12 };
const int coarseLow[] = { -64, -64, -64, -64, -70 }; static const int coarseLow[] = { -64, -64, -64, -64, -70 };
const int firpwr[] = { -78, -78, -78, -78, -80 }; static const int firpwr[] = { -78, -78, -78, -78, -80 };
for (i = 0; i < 5; i++) { for (i = 0; i < 5; i++) {
ah->totalSizeDesired[i] = totalSizeDesired[i]; ah->totalSizeDesired[i] = totalSizeDesired[i];

View file

@ -244,13 +244,15 @@ static void ar5008_hw_spur_mitigate(struct ath_hw *ah,
int upper, lower, cur_vit_mask; int upper, lower, cur_vit_mask;
int tmp, new; int tmp, new;
int i; int i;
int pilot_mask_reg[4] = { AR_PHY_TIMING7, AR_PHY_TIMING8, static int pilot_mask_reg[4] = {
AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60 AR_PHY_TIMING7, AR_PHY_TIMING8,
AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60
}; };
int chan_mask_reg[4] = { AR_PHY_TIMING9, AR_PHY_TIMING10, static int chan_mask_reg[4] = {
AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60 AR_PHY_TIMING9, AR_PHY_TIMING10,
AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60
}; };
int inc[4] = { 0, 100, 0, 0 }; static int inc[4] = { 0, 100, 0, 0 };
int8_t mask_m[123]; int8_t mask_m[123];
int8_t mask_p[123]; int8_t mask_p[123];
@ -1084,12 +1086,12 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah,
break; break;
} }
case ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION:{ case ATH9K_ANI_OFDM_WEAK_SIGNAL_DETECTION:{
const int m1ThreshLow[] = { 127, 50 }; static const int m1ThreshLow[] = { 127, 50 };
const int m2ThreshLow[] = { 127, 40 }; static const int m2ThreshLow[] = { 127, 40 };
const int m1Thresh[] = { 127, 0x4d }; static const int m1Thresh[] = { 127, 0x4d };
const int m2Thresh[] = { 127, 0x40 }; static const int m2Thresh[] = { 127, 0x40 };
const int m2CountThr[] = { 31, 16 }; static const int m2CountThr[] = { 31, 16 };
const int m2CountThrLow[] = { 63, 48 }; static const int m2CountThrLow[] = { 63, 48 };
u32 on = param ? 1 : 0; u32 on = param ? 1 : 0;
REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW,
@ -1141,7 +1143,7 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah,
break; break;
} }
case ATH9K_ANI_CCK_WEAK_SIGNAL_THR:{ case ATH9K_ANI_CCK_WEAK_SIGNAL_THR:{
const int weakSigThrCck[] = { 8, 6 }; static const int weakSigThrCck[] = { 8, 6 };
u32 high = param ? 1 : 0; u32 high = param ? 1 : 0;
REG_RMW_FIELD(ah, AR_PHY_CCK_DETECT, REG_RMW_FIELD(ah, AR_PHY_CCK_DETECT,
@ -1157,7 +1159,7 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah,
break; break;
} }
case ATH9K_ANI_FIRSTEP_LEVEL:{ case ATH9K_ANI_FIRSTEP_LEVEL:{
const int firstep[] = { 0, 4, 8 }; static const int firstep[] = { 0, 4, 8 };
u32 level = param; u32 level = param;
if (level >= ARRAY_SIZE(firstep)) { if (level >= ARRAY_SIZE(firstep)) {
@ -1178,7 +1180,7 @@ static bool ar5008_hw_ani_control_old(struct ath_hw *ah,
break; break;
} }
case ATH9K_ANI_SPUR_IMMUNITY_LEVEL:{ case ATH9K_ANI_SPUR_IMMUNITY_LEVEL:{
const int cycpwrThr1[] = { 2, 4, 6, 8, 10, 12, 14, 16 }; static const int cycpwrThr1[] = { 2, 4, 6, 8, 10, 12, 14, 16 };
u32 level = param; u32 level = param;
if (level >= ARRAY_SIZE(cycpwrThr1)) { if (level >= ARRAY_SIZE(cycpwrThr1)) {
@ -1579,10 +1581,55 @@ static void ar5008_hw_set_nf_limits(struct ath_hw *ah)
ah->nf_5g.nominal = AR_PHY_CCA_NOM_VAL_5416_5GHZ; ah->nf_5g.nominal = AR_PHY_CCA_NOM_VAL_5416_5GHZ;
} }
static void ar5008_hw_set_radar_params(struct ath_hw *ah,
struct ath_hw_radar_conf *conf)
{
u32 radar_0 = 0, radar_1 = 0;
if (!conf) {
REG_CLR_BIT(ah, AR_PHY_RADAR_0, AR_PHY_RADAR_0_ENA);
return;
}
radar_0 |= AR_PHY_RADAR_0_ENA | AR_PHY_RADAR_0_FFT_ENA;
radar_0 |= SM(conf->fir_power, AR_PHY_RADAR_0_FIRPWR);
radar_0 |= SM(conf->radar_rssi, AR_PHY_RADAR_0_RRSSI);
radar_0 |= SM(conf->pulse_height, AR_PHY_RADAR_0_HEIGHT);
radar_0 |= SM(conf->pulse_rssi, AR_PHY_RADAR_0_PRSSI);
radar_0 |= SM(conf->pulse_inband, AR_PHY_RADAR_0_INBAND);
radar_1 |= AR_PHY_RADAR_1_MAX_RRSSI;
radar_1 |= AR_PHY_RADAR_1_BLOCK_CHECK;
radar_1 |= SM(conf->pulse_maxlen, AR_PHY_RADAR_1_MAXLEN);
radar_1 |= SM(conf->pulse_inband_step, AR_PHY_RADAR_1_RELSTEP_THRESH);
radar_1 |= SM(conf->radar_inband, AR_PHY_RADAR_1_RELPWR_THRESH);
REG_WRITE(ah, AR_PHY_RADAR_0, radar_0);
REG_WRITE(ah, AR_PHY_RADAR_1, radar_1);
if (conf->ext_channel)
REG_SET_BIT(ah, AR_PHY_RADAR_EXT, AR_PHY_RADAR_EXT_ENA);
else
REG_CLR_BIT(ah, AR_PHY_RADAR_EXT, AR_PHY_RADAR_EXT_ENA);
}
static void ar5008_hw_set_radar_conf(struct ath_hw *ah)
{
struct ath_hw_radar_conf *conf = &ah->radar_conf;
conf->fir_power = -33;
conf->radar_rssi = 20;
conf->pulse_height = 10;
conf->pulse_rssi = 24;
conf->pulse_inband = 15;
conf->pulse_maxlen = 255;
conf->pulse_inband_step = 12;
conf->radar_inband = 8;
}
void ar5008_hw_attach_phy_ops(struct ath_hw *ah) void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
{ {
struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
const u32 ar5416_cca_regs[6] = { static const u32 ar5416_cca_regs[6] = {
AR_PHY_CCA, AR_PHY_CCA,
AR_PHY_CH1_CCA, AR_PHY_CH1_CCA,
AR_PHY_CH2_CCA, AR_PHY_CH2_CCA,
@ -1609,6 +1656,7 @@ void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
priv_ops->restore_chainmask = ar5008_restore_chainmask; priv_ops->restore_chainmask = ar5008_restore_chainmask;
priv_ops->set_diversity = ar5008_set_diversity; priv_ops->set_diversity = ar5008_set_diversity;
priv_ops->do_getnf = ar5008_hw_do_getnf; priv_ops->do_getnf = ar5008_hw_do_getnf;
priv_ops->set_radar_params = ar5008_hw_set_radar_params;
if (modparam_force_new_ani) { if (modparam_force_new_ani) {
priv_ops->ani_control = ar5008_hw_ani_control_new; priv_ops->ani_control = ar5008_hw_ani_control_new;
@ -1624,5 +1672,6 @@ void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
priv_ops->compute_pll_control = ar5008_hw_compute_pll_control; priv_ops->compute_pll_control = ar5008_hw_compute_pll_control;
ar5008_hw_set_nf_limits(ah); ar5008_hw_set_nf_limits(ah);
ar5008_hw_set_radar_conf(ah);
memcpy(ah->nf_regs, ar5416_cca_regs, sizeof(ah->nf_regs)); memcpy(ah->nf_regs, ar5416_cca_regs, sizeof(ah->nf_regs));
} }

View file

@ -175,13 +175,15 @@ static void ar9002_hw_spur_mitigate(struct ath_hw *ah,
int upper, lower, cur_vit_mask; int upper, lower, cur_vit_mask;
int tmp, newVal; int tmp, newVal;
int i; int i;
int pilot_mask_reg[4] = { AR_PHY_TIMING7, AR_PHY_TIMING8, static const int pilot_mask_reg[4] = {
AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60 AR_PHY_TIMING7, AR_PHY_TIMING8,
AR_PHY_PILOT_MASK_01_30, AR_PHY_PILOT_MASK_31_60
}; };
int chan_mask_reg[4] = { AR_PHY_TIMING9, AR_PHY_TIMING10, static const int chan_mask_reg[4] = {
AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60 AR_PHY_TIMING9, AR_PHY_TIMING10,
AR_PHY_CHANNEL_MASK_01_30, AR_PHY_CHANNEL_MASK_31_60
}; };
int inc[4] = { 0, 100, 0, 0 }; static const int inc[4] = { 0, 100, 0, 0 };
struct chan_centers centers; struct chan_centers centers;
int8_t mask_m[123]; int8_t mask_m[123];

View file

@ -196,7 +196,7 @@ static void ar9003_hw_iqcalibrate(struct ath_hw *ah, u8 numChains)
u32 qCoffDenom, iCoffDenom; u32 qCoffDenom, iCoffDenom;
int32_t qCoff, iCoff; int32_t qCoff, iCoff;
int iqCorrNeg, i; int iqCorrNeg, i;
const u_int32_t offset_array[3] = { static const u_int32_t offset_array[3] = {
AR_PHY_RX_IQCAL_CORR_B0, AR_PHY_RX_IQCAL_CORR_B0,
AR_PHY_RX_IQCAL_CORR_B1, AR_PHY_RX_IQCAL_CORR_B1,
AR_PHY_RX_IQCAL_CORR_B2, AR_PHY_RX_IQCAL_CORR_B2,
@ -603,22 +603,22 @@ static bool ar9003_hw_calc_iq_corr(struct ath_hw *ah,
static void ar9003_hw_tx_iq_cal(struct ath_hw *ah) static void ar9003_hw_tx_iq_cal(struct ath_hw *ah)
{ {
struct ath_common *common = ath9k_hw_common(ah); struct ath_common *common = ath9k_hw_common(ah);
const u32 txiqcal_status[AR9300_MAX_CHAINS] = { static const u32 txiqcal_status[AR9300_MAX_CHAINS] = {
AR_PHY_TX_IQCAL_STATUS_B0, AR_PHY_TX_IQCAL_STATUS_B0,
AR_PHY_TX_IQCAL_STATUS_B1, AR_PHY_TX_IQCAL_STATUS_B1,
AR_PHY_TX_IQCAL_STATUS_B2, AR_PHY_TX_IQCAL_STATUS_B2,
}; };
const u32 tx_corr_coeff[AR9300_MAX_CHAINS] = { static const u32 tx_corr_coeff[AR9300_MAX_CHAINS] = {
AR_PHY_TX_IQCAL_CORR_COEFF_01_B0, AR_PHY_TX_IQCAL_CORR_COEFF_01_B0,
AR_PHY_TX_IQCAL_CORR_COEFF_01_B1, AR_PHY_TX_IQCAL_CORR_COEFF_01_B1,
AR_PHY_TX_IQCAL_CORR_COEFF_01_B2, AR_PHY_TX_IQCAL_CORR_COEFF_01_B2,
}; };
const u32 rx_corr[AR9300_MAX_CHAINS] = { static const u32 rx_corr[AR9300_MAX_CHAINS] = {
AR_PHY_RX_IQCAL_CORR_B0, AR_PHY_RX_IQCAL_CORR_B0,
AR_PHY_RX_IQCAL_CORR_B1, AR_PHY_RX_IQCAL_CORR_B1,
AR_PHY_RX_IQCAL_CORR_B2, AR_PHY_RX_IQCAL_CORR_B2,
}; };
const u_int32_t chan_info_tab[] = { static const u_int32_t chan_info_tab[] = {
AR_PHY_CHAN_INFO_TAB_0, AR_PHY_CHAN_INFO_TAB_0,
AR_PHY_CHAN_INFO_TAB_1, AR_PHY_CHAN_INFO_TAB_1,
AR_PHY_CHAN_INFO_TAB_2, AR_PHY_CHAN_INFO_TAB_2,
@ -718,12 +718,19 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah,
struct ath9k_channel *chan) struct ath9k_channel *chan)
{ {
struct ath_common *common = ath9k_hw_common(ah); struct ath_common *common = ath9k_hw_common(ah);
int val;
/* val = REG_READ(ah, AR_ENT_OTP);
* 0x7 = 0b111 , AR9003 needs to be configured for 3-chain mode before ath_print(common, ATH_DBG_CALIBRATE, "ath9k: AR_ENT_OTP 0x%x\n", val);
* running AGC/TxIQ cals
*/ if (val & AR_ENT_OTP_CHAIN2_DISABLE)
ar9003_hw_set_chain_masks(ah, 0x7, 0x7); ar9003_hw_set_chain_masks(ah, 0x3, 0x3);
else
/*
* 0x7 = 0b111 , AR9003 needs to be configured for 3-chain
* mode before running AGC/TxIQ cals
*/
ar9003_hw_set_chain_masks(ah, 0x7, 0x7);
/* Do Tx IQ Calibration */ /* Do Tx IQ Calibration */
ar9003_hw_tx_iq_cal(ah); ar9003_hw_tx_iq_cal(ah);

File diff suppressed because it is too large Load diff

View file

@ -79,6 +79,15 @@
#define FIXED_CCA_THRESHOLD 15 #define FIXED_CCA_THRESHOLD 15
#define AR9300_BASE_ADDR 0x3ff #define AR9300_BASE_ADDR 0x3ff
#define AR9300_BASE_ADDR_512 0x1ff
#define AR9300_OTP_BASE 0x14000
#define AR9300_OTP_STATUS 0x15f18
#define AR9300_OTP_STATUS_TYPE 0x7
#define AR9300_OTP_STATUS_VALID 0x4
#define AR9300_OTP_STATUS_ACCESS_BUSY 0x2
#define AR9300_OTP_STATUS_SM_BUSY 0x1
#define AR9300_OTP_READ_DATA 0x15f1c
enum targetPowerHTRates { enum targetPowerHTRates {
HT_TARGET_RATE_0_8_16, HT_TARGET_RATE_0_8_16,
@ -236,7 +245,7 @@ struct ar9300_modal_eep_header {
u8 thresh62; u8 thresh62;
__le32 papdRateMaskHt20; __le32 papdRateMaskHt20;
__le32 papdRateMaskHt40; __le32 papdRateMaskHt40;
u8 futureModal[24]; u8 futureModal[10];
} __packed; } __packed;
struct ar9300_cal_data_per_freq_op_loop { struct ar9300_cal_data_per_freq_op_loop {
@ -274,6 +283,20 @@ struct cal_ctl_data_5g {
struct cal_ctl_edge_pwr ctlEdges[AR9300_NUM_BAND_EDGES_5G]; struct cal_ctl_edge_pwr ctlEdges[AR9300_NUM_BAND_EDGES_5G];
} __packed; } __packed;
struct ar9300_BaseExtension_1 {
u8 ant_div_control;
u8 future[13];
} __packed;
struct ar9300_BaseExtension_2 {
int8_t tempSlopeLow;
int8_t tempSlopeHigh;
u8 xatten1DBLow[AR9300_MAX_CHAINS];
u8 xatten1MarginLow[AR9300_MAX_CHAINS];
u8 xatten1DBHigh[AR9300_MAX_CHAINS];
u8 xatten1MarginHigh[AR9300_MAX_CHAINS];
} __packed;
struct ar9300_eeprom { struct ar9300_eeprom {
u8 eepromVersion; u8 eepromVersion;
u8 templateVersion; u8 templateVersion;
@ -283,6 +306,7 @@ struct ar9300_eeprom {
struct ar9300_base_eep_hdr baseEepHeader; struct ar9300_base_eep_hdr baseEepHeader;
struct ar9300_modal_eep_header modalHeader2G; struct ar9300_modal_eep_header modalHeader2G;
struct ar9300_BaseExtension_1 base_ext1;
u8 calFreqPier2G[AR9300_NUM_2G_CAL_PIERS]; u8 calFreqPier2G[AR9300_NUM_2G_CAL_PIERS];
struct ar9300_cal_data_per_freq_op_loop struct ar9300_cal_data_per_freq_op_loop
calPierData2G[AR9300_MAX_CHAINS][AR9300_NUM_2G_CAL_PIERS]; calPierData2G[AR9300_MAX_CHAINS][AR9300_NUM_2G_CAL_PIERS];
@ -302,6 +326,7 @@ struct ar9300_eeprom {
u8 ctl_freqbin_2G[AR9300_NUM_CTLS_2G][AR9300_NUM_BAND_EDGES_2G]; u8 ctl_freqbin_2G[AR9300_NUM_CTLS_2G][AR9300_NUM_BAND_EDGES_2G];
struct cal_ctl_data_2g ctlPowerData_2G[AR9300_NUM_CTLS_2G]; struct cal_ctl_data_2g ctlPowerData_2G[AR9300_NUM_CTLS_2G];
struct ar9300_modal_eep_header modalHeader5G; struct ar9300_modal_eep_header modalHeader5G;
struct ar9300_BaseExtension_2 base_ext2;
u8 calFreqPier5G[AR9300_NUM_5G_CAL_PIERS]; u8 calFreqPier5G[AR9300_NUM_5G_CAL_PIERS];
struct ar9300_cal_data_per_freq_op_loop struct ar9300_cal_data_per_freq_op_loop
calPierData5G[AR9300_MAX_CHAINS][AR9300_NUM_5G_CAL_PIERS]; calPierData5G[AR9300_MAX_CHAINS][AR9300_NUM_5G_CAL_PIERS];

View file

@ -410,12 +410,36 @@ static void ar9003_hw_set11n_ratescenario(struct ath_hw *ah, void *ds,
static void ar9003_hw_set11n_aggr_first(struct ath_hw *ah, void *ds, static void ar9003_hw_set11n_aggr_first(struct ath_hw *ah, void *ds,
u32 aggrLen) u32 aggrLen)
{ {
#define FIRST_DESC_NDELIMS 60
struct ar9003_txc *ads = (struct ar9003_txc *) ds; struct ar9003_txc *ads = (struct ar9003_txc *) ds;
ads->ctl12 |= (AR_IsAggr | AR_MoreAggr); ads->ctl12 |= (AR_IsAggr | AR_MoreAggr);
ads->ctl17 &= ~AR_AggrLen; if (ah->ent_mode & AR_ENT_OTP_MPSD) {
ads->ctl17 |= SM(aggrLen, AR_AggrLen); u32 ctl17, ndelim;
/*
* Add delimiter when using RTS/CTS with aggregation
* and non enterprise AR9003 card
*/
ctl17 = ads->ctl17;
ndelim = MS(ctl17, AR_PadDelim);
if (ndelim < FIRST_DESC_NDELIMS) {
aggrLen += (FIRST_DESC_NDELIMS - ndelim) * 4;
ndelim = FIRST_DESC_NDELIMS;
}
ctl17 &= ~AR_AggrLen;
ctl17 |= SM(aggrLen, AR_AggrLen);
ctl17 &= ~AR_PadDelim;
ctl17 |= SM(ndelim, AR_PadDelim);
ads->ctl17 = ctl17;
} else {
ads->ctl17 &= ~AR_AggrLen;
ads->ctl17 |= SM(aggrLen, AR_AggrLen);
}
} }
static void ar9003_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds, static void ar9003_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds,

View file

@ -32,12 +32,12 @@ static void ar9003_paprd_setup_single_table(struct ath_hw *ah)
{ {
struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep; struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
struct ar9300_modal_eep_header *hdr; struct ar9300_modal_eep_header *hdr;
const u32 ctrl0[3] = { static const u32 ctrl0[3] = {
AR_PHY_PAPRD_CTRL0_B0, AR_PHY_PAPRD_CTRL0_B0,
AR_PHY_PAPRD_CTRL0_B1, AR_PHY_PAPRD_CTRL0_B1,
AR_PHY_PAPRD_CTRL0_B2 AR_PHY_PAPRD_CTRL0_B2
}; };
const u32 ctrl1[3] = { static const u32 ctrl1[3] = {
AR_PHY_PAPRD_CTRL1_B0, AR_PHY_PAPRD_CTRL1_B0,
AR_PHY_PAPRD_CTRL1_B1, AR_PHY_PAPRD_CTRL1_B1,
AR_PHY_PAPRD_CTRL1_B2 AR_PHY_PAPRD_CTRL1_B2

View file

@ -128,7 +128,7 @@ static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
static void ar9003_hw_spur_mitigate_mrc_cck(struct ath_hw *ah, static void ar9003_hw_spur_mitigate_mrc_cck(struct ath_hw *ah,
struct ath9k_channel *chan) struct ath9k_channel *chan)
{ {
u32 spur_freq[4] = { 2420, 2440, 2464, 2480 }; static const u32 spur_freq[4] = { 2420, 2440, 2464, 2480 };
int cur_bb_spur, negative = 0, cck_spur_freq; int cur_bb_spur, negative = 0, cck_spur_freq;
int i; int i;
@ -1113,10 +1113,55 @@ static void ar9003_hw_ani_cache_ini_regs(struct ath_hw *ah)
aniState->mrcCCKOff = !ATH9K_ANI_ENABLE_MRC_CCK; aniState->mrcCCKOff = !ATH9K_ANI_ENABLE_MRC_CCK;
} }
static void ar9003_hw_set_radar_params(struct ath_hw *ah,
struct ath_hw_radar_conf *conf)
{
u32 radar_0 = 0, radar_1 = 0;
if (!conf) {
REG_CLR_BIT(ah, AR_PHY_RADAR_0, AR_PHY_RADAR_0_ENA);
return;
}
radar_0 |= AR_PHY_RADAR_0_ENA | AR_PHY_RADAR_0_FFT_ENA;
radar_0 |= SM(conf->fir_power, AR_PHY_RADAR_0_FIRPWR);
radar_0 |= SM(conf->radar_rssi, AR_PHY_RADAR_0_RRSSI);
radar_0 |= SM(conf->pulse_height, AR_PHY_RADAR_0_HEIGHT);
radar_0 |= SM(conf->pulse_rssi, AR_PHY_RADAR_0_PRSSI);
radar_0 |= SM(conf->pulse_inband, AR_PHY_RADAR_0_INBAND);
radar_1 |= AR_PHY_RADAR_1_MAX_RRSSI;
radar_1 |= AR_PHY_RADAR_1_BLOCK_CHECK;
radar_1 |= SM(conf->pulse_maxlen, AR_PHY_RADAR_1_MAXLEN);
radar_1 |= SM(conf->pulse_inband_step, AR_PHY_RADAR_1_RELSTEP_THRESH);
radar_1 |= SM(conf->radar_inband, AR_PHY_RADAR_1_RELPWR_THRESH);
REG_WRITE(ah, AR_PHY_RADAR_0, radar_0);
REG_WRITE(ah, AR_PHY_RADAR_1, radar_1);
if (conf->ext_channel)
REG_SET_BIT(ah, AR_PHY_RADAR_EXT, AR_PHY_RADAR_EXT_ENA);
else
REG_CLR_BIT(ah, AR_PHY_RADAR_EXT, AR_PHY_RADAR_EXT_ENA);
}
static void ar9003_hw_set_radar_conf(struct ath_hw *ah)
{
struct ath_hw_radar_conf *conf = &ah->radar_conf;
conf->fir_power = -28;
conf->radar_rssi = 0;
conf->pulse_height = 10;
conf->pulse_rssi = 24;
conf->pulse_inband = 8;
conf->pulse_maxlen = 255;
conf->pulse_inband_step = 12;
conf->radar_inband = 8;
}
void ar9003_hw_attach_phy_ops(struct ath_hw *ah) void ar9003_hw_attach_phy_ops(struct ath_hw *ah)
{ {
struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
const u32 ar9300_cca_regs[6] = { static const u32 ar9300_cca_regs[6] = {
AR_PHY_CCA_0, AR_PHY_CCA_0,
AR_PHY_CCA_1, AR_PHY_CCA_1,
AR_PHY_CCA_2, AR_PHY_CCA_2,
@ -1141,8 +1186,10 @@ void ar9003_hw_attach_phy_ops(struct ath_hw *ah)
priv_ops->ani_control = ar9003_hw_ani_control; priv_ops->ani_control = ar9003_hw_ani_control;
priv_ops->do_getnf = ar9003_hw_do_getnf; priv_ops->do_getnf = ar9003_hw_do_getnf;
priv_ops->ani_cache_ini_regs = ar9003_hw_ani_cache_ini_regs; priv_ops->ani_cache_ini_regs = ar9003_hw_ani_cache_ini_regs;
priv_ops->set_radar_params = ar9003_hw_set_radar_params;
ar9003_hw_set_nf_limits(ah); ar9003_hw_set_nf_limits(ah);
ar9003_hw_set_radar_conf(ah);
memcpy(ah->nf_regs, ar9300_cca_regs, sizeof(ah->nf_regs)); memcpy(ah->nf_regs, ar9300_cca_regs, sizeof(ah->nf_regs));
} }

View file

@ -86,33 +86,19 @@ struct ath_config {
/** /**
* enum buffer_type - Buffer type flags * enum buffer_type - Buffer type flags
* *
* @BUF_HT: Send this buffer using HT capabilities
* @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX) * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
* @BUF_AGGR: Indicates whether the buffer can be aggregated * @BUF_AGGR: Indicates whether the buffer can be aggregated
* (used in aggregation scheduling) * (used in aggregation scheduling)
* @BUF_RETRY: Indicates whether the buffer is retried
* @BUF_XRETRY: To denote excessive retries of the buffer * @BUF_XRETRY: To denote excessive retries of the buffer
*/ */
enum buffer_type { enum buffer_type {
BUF_HT = BIT(1),
BUF_AMPDU = BIT(2), BUF_AMPDU = BIT(2),
BUF_AGGR = BIT(3), BUF_AGGR = BIT(3),
BUF_RETRY = BIT(4),
BUF_XRETRY = BIT(5), BUF_XRETRY = BIT(5),
}; };
#define bf_nframes bf_state.bfs_nframes
#define bf_al bf_state.bfs_al
#define bf_frmlen bf_state.bfs_frmlen
#define bf_retries bf_state.bfs_retries
#define bf_seqno bf_state.bfs_seqno
#define bf_tidno bf_state.bfs_tidno
#define bf_keyix bf_state.bfs_keyix
#define bf_keytype bf_state.bfs_keytype
#define bf_isht(bf) (bf->bf_state.bf_type & BUF_HT)
#define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU) #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
#define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR) #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
#define bf_isretried(bf) (bf->bf_state.bf_type & BUF_RETRY)
#define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY) #define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY)
#define ATH_TXSTATUS_RING_SIZE 64 #define ATH_TXSTATUS_RING_SIZE 64
@ -177,8 +163,8 @@ void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
/* returns delimiter padding required given the packet length */ /* returns delimiter padding required given the packet length */
#define ATH_AGGR_GET_NDELIM(_len) \ #define ATH_AGGR_GET_NDELIM(_len) \
(((((_len) + ATH_AGGR_DELIM_SZ) < ATH_AGGR_MINPLEN) ? \ (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \
(ATH_AGGR_MINPLEN - (_len) - ATH_AGGR_DELIM_SZ) : 0) >> 2) DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
#define BAW_WITHIN(_start, _bawsz, _seqno) \ #define BAW_WITHIN(_start, _bawsz, _seqno) \
((((_seqno) - (_start)) & 4095) < (_bawsz)) ((((_seqno) - (_start)) & 4095) < (_bawsz))
@ -217,18 +203,18 @@ struct ath_atx_ac {
struct list_head tid_q; struct list_head tid_q;
}; };
struct ath_frame_info {
int framelen;
u32 keyix;
enum ath9k_key_type keytype;
u8 retries;
u16 seqno;
};
struct ath_buf_state { struct ath_buf_state {
int bfs_nframes;
u16 bfs_al;
u16 bfs_frmlen;
int bfs_seqno;
int bfs_tidno;
int bfs_retries;
u8 bf_type; u8 bf_type;
u8 bfs_paprd; u8 bfs_paprd;
unsigned long bfs_paprd_timestamp; enum ath9k_internal_frame_type bfs_ftype;
u32 bfs_keyix;
enum ath9k_key_type bfs_keytype;
}; };
struct ath_buf { struct ath_buf {
@ -241,7 +227,6 @@ struct ath_buf {
dma_addr_t bf_daddr; /* physical addr of desc */ dma_addr_t bf_daddr; /* physical addr of desc */
dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */ dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */
bool bf_stale; bool bf_stale;
bool bf_tx_aborted;
u16 bf_flags; u16 bf_flags;
struct ath_buf_state bf_state; struct ath_buf_state bf_state;
struct ath_wiphy *aphy; struct ath_wiphy *aphy;
@ -278,6 +263,7 @@ struct ath_node {
struct ath_tx_control { struct ath_tx_control {
struct ath_txq *txq; struct ath_txq *txq;
struct ath_node *an;
int if_id; int if_id;
enum ath9k_internal_frame_type frame_type; enum ath9k_internal_frame_type frame_type;
u8 paprd; u8 paprd;
@ -338,7 +324,6 @@ int ath_tx_start(struct ieee80211_hw *hw, struct sk_buff *skb,
struct ath_tx_control *txctl); struct ath_tx_control *txctl);
void ath_tx_tasklet(struct ath_softc *sc); void ath_tx_tasklet(struct ath_softc *sc);
void ath_tx_edma_tasklet(struct ath_softc *sc); void ath_tx_edma_tasklet(struct ath_softc *sc);
void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb);
int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta, int ath_tx_aggr_start(struct ath_softc *sc, struct ieee80211_sta *sta,
u16 tid, u16 *ssn); u16 tid, u16 *ssn);
void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid); void ath_tx_aggr_stop(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid);
@ -603,6 +588,7 @@ struct ath_softc {
struct work_struct paprd_work; struct work_struct paprd_work;
struct work_struct hw_check_work; struct work_struct hw_check_work;
struct completion paprd_complete; struct completion paprd_complete;
bool paprd_pending;
u32 intrstatus; u32 intrstatus;
u32 sc_flags; /* SC_OP_* */ u32 sc_flags; /* SC_OP_* */
@ -712,7 +698,7 @@ void ath9k_ps_restore(struct ath_softc *sc);
void ath9k_set_bssid_mask(struct ieee80211_hw *hw, struct ieee80211_vif *vif); void ath9k_set_bssid_mask(struct ieee80211_hw *hw, struct ieee80211_vif *vif);
int ath9k_wiphy_add(struct ath_softc *sc); int ath9k_wiphy_add(struct ath_softc *sc);
int ath9k_wiphy_del(struct ath_wiphy *aphy); int ath9k_wiphy_del(struct ath_wiphy *aphy);
void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb); void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb, int ftype);
int ath9k_wiphy_pause(struct ath_wiphy *aphy); int ath9k_wiphy_pause(struct ath_wiphy *aphy);
int ath9k_wiphy_unpause(struct ath_wiphy *aphy); int ath9k_wiphy_unpause(struct ath_wiphy *aphy);
int ath9k_wiphy_select(struct ath_wiphy *aphy); int ath9k_wiphy_select(struct ath_wiphy *aphy);

View file

@ -109,6 +109,25 @@ static void ath_beacon_setup(struct ath_softc *sc, struct ath_vif *avp,
series, 4, 0); series, 4, 0);
} }
static void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb)
{
struct ath_wiphy *aphy = hw->priv;
struct ath_softc *sc = aphy->sc;
struct ath_common *common = ath9k_hw_common(sc->sc_ah);
struct ath_tx_control txctl;
memset(&txctl, 0, sizeof(struct ath_tx_control));
txctl.txq = sc->beacon.cabq;
ath_print(common, ATH_DBG_XMIT,
"transmitting CABQ packet, skb: %p\n", skb);
if (ath_tx_start(hw, skb, &txctl) != 0) {
ath_print(common, ATH_DBG_XMIT, "CABQ TX failed\n");
dev_kfree_skb_any(skb);
}
}
static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw, static struct ath_buf *ath_beacon_generate(struct ieee80211_hw *hw,
struct ieee80211_vif *vif) struct ieee80211_vif *vif)
{ {

View file

@ -534,7 +534,9 @@ static void ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah,
u16 twiceMinEdgePower; u16 twiceMinEdgePower;
u16 twiceMaxEdgePower = AR5416_MAX_RATE_POWER; u16 twiceMaxEdgePower = AR5416_MAX_RATE_POWER;
u16 scaledPower = 0, minCtlPower, maxRegAllowedPower; u16 scaledPower = 0, minCtlPower, maxRegAllowedPower;
u16 numCtlModes, *pCtlMode, ctlMode, freq; u16 numCtlModes;
const u16 *pCtlMode;
u16 ctlMode, freq;
struct chan_centers centers; struct chan_centers centers;
struct cal_ctl_data_4k *rep; struct cal_ctl_data_4k *rep;
struct ar5416_eeprom_4k *pEepData = &ah->eeprom.map4k; struct ar5416_eeprom_4k *pEepData = &ah->eeprom.map4k;
@ -550,10 +552,10 @@ static void ath9k_hw_set_4k_power_per_rate_table(struct ath_hw *ah,
struct cal_target_power_ht targetPowerHt20, targetPowerHt40 = { struct cal_target_power_ht targetPowerHt20, targetPowerHt40 = {
0, {0, 0, 0, 0} 0, {0, 0, 0, 0}
}; };
u16 ctlModesFor11g[] = static const u16 ctlModesFor11g[] = {
{ CTL_11B, CTL_11G, CTL_2GHT20, CTL_11B_EXT, CTL_11G_EXT, CTL_11B, CTL_11G, CTL_2GHT20,
CTL_2GHT40 CTL_11B_EXT, CTL_11G_EXT, CTL_2GHT40
}; };
ath9k_hw_get_channel_centers(ah, chan, &centers); ath9k_hw_get_channel_centers(ah, chan, &centers);

View file

@ -37,10 +37,10 @@ static bool ath9k_hw_ar9287_fill_eeprom(struct ath_hw *ah)
int addr, eep_start_loc; int addr, eep_start_loc;
eep_data = (u16 *)eep; eep_data = (u16 *)eep;
if (AR9287_HTC_DEVID(ah)) if (!common->driver_info)
eep_start_loc = AR9287_HTC_EEP_START_LOC;
else
eep_start_loc = AR9287_EEP_START_LOC; eep_start_loc = AR9287_EEP_START_LOC;
else
eep_start_loc = AR9287_HTC_EEP_START_LOC;
if (!ath9k_hw_use_flash(ah)) { if (!ath9k_hw_use_flash(ah)) {
ath_print(common, ATH_DBG_EEPROM, ath_print(common, ATH_DBG_EEPROM,
@ -626,13 +626,13 @@ static void ath9k_hw_set_ar9287_power_per_rate_table(struct ath_hw *ah,
struct cal_target_power_ht targetPowerHt20, struct cal_target_power_ht targetPowerHt20,
targetPowerHt40 = {0, {0, 0, 0, 0} }; targetPowerHt40 = {0, {0, 0, 0, 0} };
u16 scaledPower = 0, minCtlPower, maxRegAllowedPower; u16 scaledPower = 0, minCtlPower, maxRegAllowedPower;
u16 ctlModesFor11g[] = {CTL_11B, static const u16 ctlModesFor11g[] = {
CTL_11G, CTL_11B, CTL_11G, CTL_2GHT20,
CTL_2GHT20, CTL_11B_EXT, CTL_11G_EXT, CTL_2GHT40
CTL_11B_EXT, };
CTL_11G_EXT, u16 numCtlModes = 0;
CTL_2GHT40}; const u16 *pCtlMode = NULL;
u16 numCtlModes = 0, *pCtlMode = NULL, ctlMode, freq; u16 ctlMode, freq;
struct chan_centers centers; struct chan_centers centers;
int tx_chainmask; int tx_chainmask;
u16 twiceMinEdgePower; u16 twiceMinEdgePower;

View file

@ -1021,13 +1021,16 @@ static void ath9k_hw_set_def_power_per_rate_table(struct ath_hw *ah,
0, {0, 0, 0, 0} 0, {0, 0, 0, 0}
}; };
u16 scaledPower = 0, minCtlPower, maxRegAllowedPower; u16 scaledPower = 0, minCtlPower, maxRegAllowedPower;
u16 ctlModesFor11a[] = static const u16 ctlModesFor11a[] = {
{ CTL_11A, CTL_5GHT20, CTL_11A_EXT, CTL_5GHT40 }; CTL_11A, CTL_5GHT20, CTL_11A_EXT, CTL_5GHT40
u16 ctlModesFor11g[] = };
{ CTL_11B, CTL_11G, CTL_2GHT20, CTL_11B_EXT, CTL_11G_EXT, static const u16 ctlModesFor11g[] = {
CTL_2GHT40 CTL_11B, CTL_11G, CTL_2GHT20,
}; CTL_11B_EXT, CTL_11G_EXT, CTL_2GHT40
u16 numCtlModes, *pCtlMode, ctlMode, freq; };
u16 numCtlModes;
const u16 *pCtlMode;
u16 ctlMode, freq;
struct chan_centers centers; struct chan_centers centers;
int tx_chainmask; int tx_chainmask;
u16 twiceMinEdgePower; u16 twiceMinEdgePower;

View file

@ -28,10 +28,16 @@ MODULE_FIRMWARE(FIRMWARE_AR9271);
static struct usb_device_id ath9k_hif_usb_ids[] = { static struct usb_device_id ath9k_hif_usb_ids[] = {
{ USB_DEVICE(0x0cf3, 0x9271) }, /* Atheros */ { USB_DEVICE(0x0cf3, 0x9271) }, /* Atheros */
{ USB_DEVICE(0x0cf3, 0x1006) }, /* Atheros */ { USB_DEVICE(0x0cf3, 0x1006) }, /* Atheros */
{ USB_DEVICE(0x0cf3, 0x7010) }, /* Atheros */ { USB_DEVICE(0x0cf3, 0x7010),
{ USB_DEVICE(0x0cf3, 0x7015) }, /* Atheros */ .driver_info = AR7010_DEVICE },
/* Atheros */
{ USB_DEVICE(0x0cf3, 0x7015),
.driver_info = AR7010_DEVICE | AR9287_DEVICE },
/* Atheros */
{ USB_DEVICE(0x0846, 0x9030) }, /* Netgear N150 */ { USB_DEVICE(0x0846, 0x9030) }, /* Netgear N150 */
{ USB_DEVICE(0x0846, 0x9018) }, /* Netgear WNDA3200 */ { USB_DEVICE(0x0846, 0x9018),
.driver_info = AR7010_DEVICE },
/* Netgear WNDA3200 */
{ USB_DEVICE(0x07D1, 0x3A10) }, /* Dlink Wireless 150 */ { USB_DEVICE(0x07D1, 0x3A10) }, /* Dlink Wireless 150 */
{ USB_DEVICE(0x13D3, 0x3327) }, /* Azurewave */ { USB_DEVICE(0x13D3, 0x3327) }, /* Azurewave */
{ USB_DEVICE(0x13D3, 0x3328) }, /* Azurewave */ { USB_DEVICE(0x13D3, 0x3328) }, /* Azurewave */
@ -40,9 +46,13 @@ static struct usb_device_id ath9k_hif_usb_ids[] = {
{ USB_DEVICE(0x13D3, 0x3349) }, /* Azurewave */ { USB_DEVICE(0x13D3, 0x3349) }, /* Azurewave */
{ USB_DEVICE(0x13D3, 0x3350) }, /* Azurewave */ { USB_DEVICE(0x13D3, 0x3350) }, /* Azurewave */
{ USB_DEVICE(0x04CA, 0x4605) }, /* Liteon */ { USB_DEVICE(0x04CA, 0x4605) }, /* Liteon */
{ USB_DEVICE(0x083A, 0xA704) }, /* SMC Networks */ { USB_DEVICE(0x083A, 0xA704),
.driver_info = AR7010_DEVICE },
/* SMC Networks */
{ USB_DEVICE(0x040D, 0x3801) }, /* VIA */ { USB_DEVICE(0x040D, 0x3801) }, /* VIA */
{ USB_DEVICE(0x1668, 0x1200) }, /* Verizon */ { USB_DEVICE(0x1668, 0x1200),
.driver_info = AR7010_DEVICE | AR9287_DEVICE },
/* Verizon */
{ }, { },
}; };
@ -776,7 +786,8 @@ static void ath9k_hif_usb_dealloc_urbs(struct hif_device_usb *hif_dev)
ath9k_hif_usb_dealloc_rx_urbs(hif_dev); ath9k_hif_usb_dealloc_rx_urbs(hif_dev);
} }
static int ath9k_hif_usb_download_fw(struct hif_device_usb *hif_dev) static int ath9k_hif_usb_download_fw(struct hif_device_usb *hif_dev,
u32 drv_info)
{ {
int transfer, err; int transfer, err;
const void *data = hif_dev->firmware->data; const void *data = hif_dev->firmware->data;
@ -807,18 +818,10 @@ static int ath9k_hif_usb_download_fw(struct hif_device_usb *hif_dev)
} }
kfree(buf); kfree(buf);
switch (hif_dev->device_id) { if (drv_info & AR7010_DEVICE)
case 0x7010:
case 0x7015:
case 0x9018:
case 0xA704:
case 0x1200:
firm_offset = AR7010_FIRMWARE_TEXT; firm_offset = AR7010_FIRMWARE_TEXT;
break; else
default:
firm_offset = AR9271_FIRMWARE_TEXT; firm_offset = AR9271_FIRMWARE_TEXT;
break;
}
/* /*
* Issue FW download complete command to firmware. * Issue FW download complete command to firmware.
@ -836,7 +839,7 @@ static int ath9k_hif_usb_download_fw(struct hif_device_usb *hif_dev)
return 0; return 0;
} }
static int ath9k_hif_usb_dev_init(struct hif_device_usb *hif_dev) static int ath9k_hif_usb_dev_init(struct hif_device_usb *hif_dev, u32 drv_info)
{ {
int ret, idx; int ret, idx;
struct usb_host_interface *alt = &hif_dev->interface->altsetting[0]; struct usb_host_interface *alt = &hif_dev->interface->altsetting[0];
@ -852,7 +855,7 @@ static int ath9k_hif_usb_dev_init(struct hif_device_usb *hif_dev)
} }
/* Download firmware */ /* Download firmware */
ret = ath9k_hif_usb_download_fw(hif_dev); ret = ath9k_hif_usb_download_fw(hif_dev, drv_info);
if (ret) { if (ret) {
dev_err(&hif_dev->udev->dev, dev_err(&hif_dev->udev->dev,
"ath9k_htc: Firmware - %s download failed\n", "ath9k_htc: Firmware - %s download failed\n",
@ -931,23 +934,15 @@ static int ath9k_hif_usb_probe(struct usb_interface *interface,
/* Find out which firmware to load */ /* Find out which firmware to load */
switch(hif_dev->device_id) { if (id->driver_info & AR7010_DEVICE)
case 0x7010:
case 0x7015:
case 0x9018:
case 0xA704:
case 0x1200:
if (le16_to_cpu(udev->descriptor.bcdDevice) == 0x0202) if (le16_to_cpu(udev->descriptor.bcdDevice) == 0x0202)
hif_dev->fw_name = FIRMWARE_AR7010_1_1; hif_dev->fw_name = FIRMWARE_AR7010_1_1;
else else
hif_dev->fw_name = FIRMWARE_AR7010; hif_dev->fw_name = FIRMWARE_AR7010;
break; else
default:
hif_dev->fw_name = FIRMWARE_AR9271; hif_dev->fw_name = FIRMWARE_AR9271;
break;
}
ret = ath9k_hif_usb_dev_init(hif_dev); ret = ath9k_hif_usb_dev_init(hif_dev, id->driver_info);
if (ret) { if (ret) {
ret = -EINVAL; ret = -EINVAL;
goto err_hif_init_usb; goto err_hif_init_usb;
@ -955,7 +950,7 @@ static int ath9k_hif_usb_probe(struct usb_interface *interface,
ret = ath9k_htc_hw_init(hif_dev->htc_handle, ret = ath9k_htc_hw_init(hif_dev->htc_handle,
&hif_dev->udev->dev, hif_dev->device_id, &hif_dev->udev->dev, hif_dev->device_id,
hif_dev->udev->product); hif_dev->udev->product, id->driver_info);
if (ret) { if (ret) {
ret = -EINVAL; ret = -EINVAL;
goto err_htc_hw_init; goto err_htc_hw_init;
@ -1033,6 +1028,7 @@ static int ath9k_hif_usb_resume(struct usb_interface *interface)
{ {
struct hif_device_usb *hif_dev = struct hif_device_usb *hif_dev =
(struct hif_device_usb *) usb_get_intfdata(interface); (struct hif_device_usb *) usb_get_intfdata(interface);
struct htc_target *htc_handle = hif_dev->htc_handle;
int ret; int ret;
ret = ath9k_hif_usb_alloc_urbs(hif_dev); ret = ath9k_hif_usb_alloc_urbs(hif_dev);
@ -1040,7 +1036,8 @@ static int ath9k_hif_usb_resume(struct usb_interface *interface)
return ret; return ret;
if (hif_dev->firmware) { if (hif_dev->firmware) {
ret = ath9k_hif_usb_download_fw(hif_dev); ret = ath9k_hif_usb_download_fw(hif_dev,
htc_handle->drv_priv->ah->common.driver_info);
if (ret) if (ret)
goto fail_resume; goto fail_resume;
} else { } else {
@ -1050,7 +1047,7 @@ static int ath9k_hif_usb_resume(struct usb_interface *interface)
mdelay(100); mdelay(100);
ret = ath9k_htc_resume(hif_dev->htc_handle); ret = ath9k_htc_resume(htc_handle);
if (ret) if (ret)
goto fail_resume; goto fail_resume;

View file

@ -368,7 +368,7 @@ struct ath9k_htc_priv {
u16 seq_no; u16 seq_no;
u32 bmiss_cnt; u32 bmiss_cnt;
struct ath9k_hw_cal_data caldata[38]; struct ath9k_hw_cal_data caldata[ATH9K_NUM_CHANNELS];
spinlock_t beacon_lock; spinlock_t beacon_lock;
@ -461,7 +461,7 @@ void ath9k_init_leds(struct ath9k_htc_priv *priv);
void ath9k_deinit_leds(struct ath9k_htc_priv *priv); void ath9k_deinit_leds(struct ath9k_htc_priv *priv);
int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev, int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
u16 devid, char *product); u16 devid, char *product, u32 drv_info);
void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug); void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug);
#ifdef CONFIG_PM #ifdef CONFIG_PM
int ath9k_htc_resume(struct htc_target *htc_handle); int ath9k_htc_resume(struct htc_target *htc_handle);

View file

@ -181,7 +181,8 @@ static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv,
return htc_connect_service(priv->htc, &req, ep_id); return htc_connect_service(priv->htc, &req, ep_id);
} }
static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid) static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid,
u32 drv_info)
{ {
int ret; int ret;
@ -245,17 +246,10 @@ static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid)
* the HIF layer, shouldn't matter much. * the HIF layer, shouldn't matter much.
*/ */
switch(devid) { if (drv_info & AR7010_DEVICE)
case 0x7010:
case 0x7015:
case 0x9018:
case 0xA704:
case 0x1200:
priv->htc->credits = 45; priv->htc->credits = 45;
break; else
default:
priv->htc->credits = 33; priv->htc->credits = 33;
}
ret = htc_init(priv->htc); ret = htc_init(priv->htc);
if (ret) if (ret)
@ -308,7 +302,7 @@ static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
struct ath_hw *ah = (struct ath_hw *) hw_priv; struct ath_hw *ah = (struct ath_hw *) hw_priv;
struct ath_common *common = ath9k_hw_common(ah); struct ath_common *common = ath9k_hw_common(ah);
struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
__be32 buf[2] = { const __be32 buf[2] = {
cpu_to_be32(reg_offset), cpu_to_be32(reg_offset),
cpu_to_be32(val), cpu_to_be32(val),
}; };
@ -627,7 +621,8 @@ static void ath9k_init_btcoex(struct ath9k_htc_priv *priv)
} }
static int ath9k_init_priv(struct ath9k_htc_priv *priv, static int ath9k_init_priv(struct ath9k_htc_priv *priv,
u16 devid, char *product) u16 devid, char *product,
u32 drv_info)
{ {
struct ath_hw *ah = NULL; struct ath_hw *ah = NULL;
struct ath_common *common; struct ath_common *common;
@ -641,6 +636,7 @@ static int ath9k_init_priv(struct ath9k_htc_priv *priv,
ah->hw_version.devid = devid; ah->hw_version.devid = devid;
ah->hw_version.subsysid = 0; /* FIXME */ ah->hw_version.subsysid = 0; /* FIXME */
ah->ah_flags |= AH_USE_EEPROM;
priv->ah = ah; priv->ah = ah;
common = ath9k_hw_common(ah); common = ath9k_hw_common(ah);
@ -650,6 +646,7 @@ static int ath9k_init_priv(struct ath9k_htc_priv *priv,
common->hw = priv->hw; common->hw = priv->hw;
common->priv = priv; common->priv = priv;
common->debug_mask = ath9k_debug; common->debug_mask = ath9k_debug;
common->driver_info = drv_info;
spin_lock_init(&priv->wmi->wmi_lock); spin_lock_init(&priv->wmi->wmi_lock);
spin_lock_init(&priv->beacon_lock); spin_lock_init(&priv->beacon_lock);
@ -762,7 +759,7 @@ static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
} }
static int ath9k_init_device(struct ath9k_htc_priv *priv, static int ath9k_init_device(struct ath9k_htc_priv *priv,
u16 devid, char *product) u16 devid, char *product, u32 drv_info)
{ {
struct ieee80211_hw *hw = priv->hw; struct ieee80211_hw *hw = priv->hw;
struct ath_common *common; struct ath_common *common;
@ -771,7 +768,7 @@ static int ath9k_init_device(struct ath9k_htc_priv *priv,
struct ath_regulatory *reg; struct ath_regulatory *reg;
/* Bring up device */ /* Bring up device */
error = ath9k_init_priv(priv, devid, product); error = ath9k_init_priv(priv, devid, product, drv_info);
if (error != 0) if (error != 0)
goto err_init; goto err_init;
@ -829,7 +826,7 @@ err_init:
} }
int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev, int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
u16 devid, char *product) u16 devid, char *product, u32 drv_info)
{ {
struct ieee80211_hw *hw; struct ieee80211_hw *hw;
struct ath9k_htc_priv *priv; struct ath9k_htc_priv *priv;
@ -856,14 +853,14 @@ int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
goto err_free; goto err_free;
} }
ret = ath9k_init_htc_services(priv, devid); ret = ath9k_init_htc_services(priv, devid, drv_info);
if (ret) if (ret)
goto err_init; goto err_init;
/* The device may have been unplugged earlier. */ /* The device may have been unplugged earlier. */
priv->op_flags &= ~OP_UNPLUGGED; priv->op_flags &= ~OP_UNPLUGGED;
ret = ath9k_init_device(priv, devid, product); ret = ath9k_init_device(priv, devid, product, drv_info);
if (ret) if (ret)
goto err_init; goto err_init;
@ -893,14 +890,15 @@ void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug)
#ifdef CONFIG_PM #ifdef CONFIG_PM
int ath9k_htc_resume(struct htc_target *htc_handle) int ath9k_htc_resume(struct htc_target *htc_handle)
{ {
struct ath9k_htc_priv *priv = htc_handle->drv_priv;
int ret; int ret;
ret = ath9k_htc_wait_for_target(htc_handle->drv_priv); ret = ath9k_htc_wait_for_target(priv);
if (ret) if (ret)
return ret; return ret;
ret = ath9k_init_htc_services(htc_handle->drv_priv, ret = ath9k_init_htc_services(priv, priv->ah->hw_version.devid,
htc_handle->drv_priv->ah->hw_version.devid); priv->ah->common.driver_info);
return ret; return ret;
} }
#endif #endif

View file

@ -462,9 +462,10 @@ void ath9k_htc_hw_free(struct htc_target *htc)
} }
int ath9k_htc_hw_init(struct htc_target *target, int ath9k_htc_hw_init(struct htc_target *target,
struct device *dev, u16 devid, char *product) struct device *dev, u16 devid,
char *product, u32 drv_info)
{ {
if (ath9k_htc_probe_device(target, dev, devid, product)) { if (ath9k_htc_probe_device(target, dev, devid, product, drv_info)) {
printk(KERN_ERR "Failed to initialize the device\n"); printk(KERN_ERR "Failed to initialize the device\n");
return -ENODEV; return -ENODEV;
} }

View file

@ -239,7 +239,8 @@ struct htc_target *ath9k_htc_hw_alloc(void *hif_handle,
struct device *dev); struct device *dev);
void ath9k_htc_hw_free(struct htc_target *htc); void ath9k_htc_hw_free(struct htc_target *htc);
int ath9k_htc_hw_init(struct htc_target *target, int ath9k_htc_hw_init(struct htc_target *target,
struct device *dev, u16 devid, char *product); struct device *dev, u16 devid, char *product,
u32 drv_info);
void ath9k_htc_hw_deinit(struct htc_target *target, bool hot_unplug); void ath9k_htc_hw_deinit(struct htc_target *target, bool hot_unplug);
#endif /* HTC_HST_H */ #endif /* HTC_HST_H */

View file

@ -310,10 +310,9 @@ static bool ath9k_hw_chip_test(struct ath_hw *ah)
struct ath_common *common = ath9k_hw_common(ah); struct ath_common *common = ath9k_hw_common(ah);
u32 regAddr[2] = { AR_STA_ID0 }; u32 regAddr[2] = { AR_STA_ID0 };
u32 regHold[2]; u32 regHold[2];
u32 patternData[4] = { 0x55555555, static const u32 patternData[4] = {
0xaaaaaaaa, 0x55555555, 0xaaaaaaaa, 0x66666666, 0x99999999
0x66666666, };
0x99999999 };
int i, j, loop_max; int i, j, loop_max;
if (!AR_SREV_9300_20_OR_LATER(ah)) { if (!AR_SREV_9300_20_OR_LATER(ah)) {
@ -419,10 +418,6 @@ static void ath9k_hw_init_defaults(struct ath_hw *ah)
ah->hw_version.magic = AR5416_MAGIC; ah->hw_version.magic = AR5416_MAGIC;
ah->hw_version.subvendorid = 0; ah->hw_version.subvendorid = 0;
ah->ah_flags = 0;
if (!AR_SREV_9100(ah))
ah->ah_flags = AH_USE_EEPROM;
ah->atim_window = 0; ah->atim_window = 0;
ah->sta_id1_defaults = ah->sta_id1_defaults =
AR_STA_ID1_CRPT_MIC_ENABLE | AR_STA_ID1_CRPT_MIC_ENABLE |
@ -440,7 +435,7 @@ static int ath9k_hw_init_macaddr(struct ath_hw *ah)
u32 sum; u32 sum;
int i; int i;
u16 eeval; u16 eeval;
u32 EEP_MAC[] = { EEP_MAC_LSW, EEP_MAC_MID, EEP_MAC_MSW }; static const u32 EEP_MAC[] = { EEP_MAC_LSW, EEP_MAC_MID, EEP_MAC_MSW };
sum = 0; sum = 0;
for (i = 0; i < 3; i++) { for (i = 0; i < 3; i++) {
@ -1833,6 +1828,10 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
ah->misc_mode |= AR_PCU_MIC_NEW_LOC_ENA; ah->misc_mode |= AR_PCU_MIC_NEW_LOC_ENA;
/* enable key search for every frame in an aggregate */
if (AR_SREV_9300_20_OR_LATER(ah))
ah->misc_mode |= AR_PCU_ALWAYS_PERFORM_KEYSEARCH;
pCap->low_2ghz_chan = 2312; pCap->low_2ghz_chan = 2312;
pCap->high_2ghz_chan = 2732; pCap->high_2ghz_chan = 2732;
@ -1963,6 +1962,9 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
if (AR_SREV_9300_20_OR_LATER(ah)) if (AR_SREV_9300_20_OR_LATER(ah))
pCap->hw_caps |= ATH9K_HW_CAP_RAC_SUPPORTED; pCap->hw_caps |= ATH9K_HW_CAP_RAC_SUPPORTED;
if (AR_SREV_9300_20_OR_LATER(ah))
ah->ent_mode = REG_READ(ah, AR_ENT_OTP);
if (AR_SREV_9287_11_OR_LATER(ah) || AR_SREV_9271(ah)) if (AR_SREV_9287_11_OR_LATER(ah) || AR_SREV_9271(ah))
pCap->hw_caps |= ATH9K_HW_CAP_SGI_20; pCap->hw_caps |= ATH9K_HW_CAP_SGI_20;

View file

@ -484,6 +484,40 @@ struct ath_hw_antcomb_conf {
u8 fast_div_bias; u8 fast_div_bias;
}; };
/**
* struct ath_hw_radar_conf - radar detection initialization parameters
*
* @pulse_inband: threshold for checking the ratio of in-band power
* to total power for short radar pulses (half dB steps)
* @pulse_inband_step: threshold for checking an in-band power to total
* power ratio increase for short radar pulses (half dB steps)
* @pulse_height: threshold for detecting the beginning of a short
* radar pulse (dB step)
* @pulse_rssi: threshold for detecting if a short radar pulse is
* gone (dB step)
* @pulse_maxlen: maximum pulse length (0.8 us steps)
*
* @radar_rssi: RSSI threshold for starting long radar detection (dB steps)
* @radar_inband: threshold for checking the ratio of in-band power
* to total power for long radar pulses (half dB steps)
* @fir_power: threshold for detecting the end of a long radar pulse (dB)
*
* @ext_channel: enable extension channel radar detection
*/
struct ath_hw_radar_conf {
unsigned int pulse_inband;
unsigned int pulse_inband_step;
unsigned int pulse_height;
unsigned int pulse_rssi;
unsigned int pulse_maxlen;
unsigned int radar_rssi;
unsigned int radar_inband;
int fir_power;
bool ext_channel;
};
/** /**
* struct ath_hw_private_ops - callbacks used internally by hardware code * struct ath_hw_private_ops - callbacks used internally by hardware code
* *
@ -549,6 +583,8 @@ struct ath_hw_private_ops {
bool (*ani_control)(struct ath_hw *ah, enum ath9k_ani_cmd cmd, bool (*ani_control)(struct ath_hw *ah, enum ath9k_ani_cmd cmd,
int param); int param);
void (*do_getnf)(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS]); void (*do_getnf)(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS]);
void (*set_radar_params)(struct ath_hw *ah,
struct ath_hw_radar_conf *conf);
/* ANI */ /* ANI */
void (*ani_cache_ini_regs)(struct ath_hw *ah); void (*ani_cache_ini_regs)(struct ath_hw *ah);
@ -747,6 +783,8 @@ struct ath_hw {
u8 txchainmask; u8 txchainmask;
u8 rxchainmask; u8 rxchainmask;
struct ath_hw_radar_conf radar_conf;
u32 originalGain[22]; u32 originalGain[22];
int initPDADC; int initPDADC;
int PDADCdelta; int PDADCdelta;
@ -804,6 +842,9 @@ struct ath_hw {
* this register when in sleep states. * this register when in sleep states.
*/ */
u32 WARegVal; u32 WARegVal;
/* Enterprise mode cap */
u32 ent_mode;
}; };
static inline struct ath_common *ath9k_hw_common(struct ath_hw *ah) static inline struct ath_common *ath9k_hw_common(struct ath_hw *ah)

View file

@ -533,6 +533,9 @@ static int ath9k_init_softc(u16 devid, struct ath_softc *sc, u16 subsysid,
ah->hw_version.subsysid = subsysid; ah->hw_version.subsysid = subsysid;
sc->sc_ah = ah; sc->sc_ah = ah;
if (!sc->dev->platform_data)
ah->ah_flags |= AH_USE_EEPROM;
common = ath9k_hw_common(ah); common = ath9k_hw_common(ah);
common->ops = &ath9k_common_ops; common->ops = &ath9k_common_ops;
common->bus_ops = bus_ops; common->bus_ops = bus_ops;

View file

@ -766,14 +766,6 @@ void ath9k_hw_startpcureceive(struct ath_hw *ah, bool is_scanning)
} }
EXPORT_SYMBOL(ath9k_hw_startpcureceive); EXPORT_SYMBOL(ath9k_hw_startpcureceive);
void ath9k_hw_stoppcurecv(struct ath_hw *ah)
{
REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_DIS);
ath9k_hw_disable_mib_counters(ah);
}
EXPORT_SYMBOL(ath9k_hw_stoppcurecv);
void ath9k_hw_abortpcurecv(struct ath_hw *ah) void ath9k_hw_abortpcurecv(struct ath_hw *ah)
{ {
REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_ABORT | AR_DIAG_RX_DIS); REG_SET_BIT(ah, AR_DIAG_SW, AR_DIAG_RX_ABORT | AR_DIAG_RX_DIS);

View file

@ -691,7 +691,6 @@ void ath9k_hw_setuprxdesc(struct ath_hw *ah, struct ath_desc *ds,
bool ath9k_hw_setrxabort(struct ath_hw *ah, bool set); bool ath9k_hw_setrxabort(struct ath_hw *ah, bool set);
void ath9k_hw_putrxbuf(struct ath_hw *ah, u32 rxdp); void ath9k_hw_putrxbuf(struct ath_hw *ah, u32 rxdp);
void ath9k_hw_startpcureceive(struct ath_hw *ah, bool is_scanning); void ath9k_hw_startpcureceive(struct ath_hw *ah, bool is_scanning);
void ath9k_hw_stoppcurecv(struct ath_hw *ah);
void ath9k_hw_abortpcurecv(struct ath_hw *ah); void ath9k_hw_abortpcurecv(struct ath_hw *ah);
bool ath9k_hw_stopdmarecv(struct ath_hw *ah); bool ath9k_hw_stopdmarecv(struct ath_hw *ah);
int ath9k_hw_beaconq_setup(struct ath_hw *ah); int ath9k_hw_beaconq_setup(struct ath_hw *ah);

View file

@ -380,6 +380,7 @@ void ath_paprd_calibrate(struct work_struct *work)
} }
init_completion(&sc->paprd_complete); init_completion(&sc->paprd_complete);
sc->paprd_pending = true;
ar9003_paprd_setup_gain_table(ah, chain); ar9003_paprd_setup_gain_table(ah, chain);
txctl.paprd = BIT(chain); txctl.paprd = BIT(chain);
if (ath_tx_start(hw, skb, &txctl) != 0) if (ath_tx_start(hw, skb, &txctl) != 0)
@ -387,6 +388,7 @@ void ath_paprd_calibrate(struct work_struct *work)
time_left = wait_for_completion_timeout(&sc->paprd_complete, time_left = wait_for_completion_timeout(&sc->paprd_complete,
msecs_to_jiffies(ATH_PAPRD_TIMEOUT)); msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
sc->paprd_pending = false;
if (!time_left) { if (!time_left) {
ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE, ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
"Timeout waiting for paprd training on " "Timeout waiting for paprd training on "
@ -1193,12 +1195,10 @@ mutex_unlock:
static int ath9k_tx(struct ieee80211_hw *hw, static int ath9k_tx(struct ieee80211_hw *hw,
struct sk_buff *skb) struct sk_buff *skb)
{ {
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
struct ath_wiphy *aphy = hw->priv; struct ath_wiphy *aphy = hw->priv;
struct ath_softc *sc = aphy->sc; struct ath_softc *sc = aphy->sc;
struct ath_common *common = ath9k_hw_common(sc->sc_ah); struct ath_common *common = ath9k_hw_common(sc->sc_ah);
struct ath_tx_control txctl; struct ath_tx_control txctl;
int padpos, padsize;
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) { if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
@ -1249,29 +1249,6 @@ static int ath9k_tx(struct ieee80211_hw *hw,
} }
memset(&txctl, 0, sizeof(struct ath_tx_control)); memset(&txctl, 0, sizeof(struct ath_tx_control));
/*
* As a temporary workaround, assign seq# here; this will likely need
* to be cleaned up to work better with Beacon transmission and virtual
* BSSes.
*/
if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
sc->tx.seq_no += 0x10;
hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
}
/* Add the padding after the header if this is not already done */
padpos = ath9k_cmn_padpos(hdr->frame_control);
padsize = padpos & 3;
if (padsize && skb->len>padpos) {
if (skb_headroom(skb) < padsize)
return -1;
skb_push(skb, padsize);
memmove(skb->data, skb->data + padsize, padpos);
}
txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)]; txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb); ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
@ -2015,6 +1992,9 @@ static int ath9k_ampdu_action(struct ieee80211_hw *hw,
case IEEE80211_AMPDU_RX_STOP: case IEEE80211_AMPDU_RX_STOP:
break; break;
case IEEE80211_AMPDU_TX_START: case IEEE80211_AMPDU_TX_START:
if (!(sc->sc_flags & SC_OP_TXAGGR))
return -EOPNOTSUPP;
ath9k_ps_wakeup(sc); ath9k_ps_wakeup(sc);
ret = ath_tx_aggr_start(sc, sta, tid, ssn); ret = ath_tx_aggr_start(sc, sta, tid, ssn);
if (!ret) if (!ret)

View file

@ -16,6 +16,7 @@
#include <linux/nl80211.h> #include <linux/nl80211.h>
#include <linux/pci.h> #include <linux/pci.h>
#include <linux/ath9k_platform.h>
#include "ath9k.h" #include "ath9k.h"
static DEFINE_PCI_DEVICE_TABLE(ath_pci_id_table) = { static DEFINE_PCI_DEVICE_TABLE(ath_pci_id_table) = {
@ -53,21 +54,36 @@ static void ath_pci_read_cachesize(struct ath_common *common, int *csz)
static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data) static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data)
{ {
struct ath_hw *ah = (struct ath_hw *) common->ah; struct ath_softc *sc = (struct ath_softc *) common->priv;
struct ath9k_platform_data *pdata = sc->dev->platform_data;
common->ops->read(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S)); if (pdata) {
if (off >= (ARRAY_SIZE(pdata->eeprom_data))) {
ath_print(common, ATH_DBG_FATAL,
"%s: eeprom read failed, offset %08x "
"is out of range\n",
__func__, off);
}
if (!ath9k_hw_wait(ah, *data = pdata->eeprom_data[off];
AR_EEPROM_STATUS_DATA, } else {
AR_EEPROM_STATUS_DATA_BUSY | struct ath_hw *ah = (struct ath_hw *) common->ah;
AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
AH_WAIT_TIMEOUT)) { common->ops->read(ah, AR5416_EEPROM_OFFSET +
return false; (off << AR5416_EEPROM_S));
if (!ath9k_hw_wait(ah,
AR_EEPROM_STATUS_DATA,
AR_EEPROM_STATUS_DATA_BUSY |
AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
AH_WAIT_TIMEOUT)) {
return false;
}
*data = MS(common->ops->read(ah, AR_EEPROM_STATUS_DATA),
AR_EEPROM_STATUS_DATA_VAL);
} }
*data = MS(common->ops->read(ah, AR_EEPROM_STATUS_DATA),
AR_EEPROM_STATUS_DATA_VAL);
return true; return true;
} }

View file

@ -864,7 +864,7 @@ static bool ath_rc_update_per(struct ath_softc *sc,
bool state_change = false; bool state_change = false;
int count, n_bad_frames; int count, n_bad_frames;
u8 last_per; u8 last_per;
static u32 nretry_to_per_lookup[10] = { static const u32 nretry_to_per_lookup[10] = {
100 * 0 / 1, 100 * 0 / 1,
100 * 1 / 4, 100 * 1 / 4,
100 * 1 / 2, 100 * 1 / 2,
@ -1087,13 +1087,13 @@ static int ath_rc_get_rateindex(const struct ath_rate_table *rate_table,
struct ieee80211_tx_rate *rate) struct ieee80211_tx_rate *rate)
{ {
int rix = 0, i = 0; int rix = 0, i = 0;
int mcs_rix_off[] = { 7, 15, 20, 21, 22, 23 }; static const int mcs_rix_off[] = { 7, 15, 20, 21, 22, 23 };
if (!(rate->flags & IEEE80211_TX_RC_MCS)) if (!(rate->flags & IEEE80211_TX_RC_MCS))
return rate->idx; return rate->idx;
while (rate->idx > mcs_rix_off[i] && while (rate->idx > mcs_rix_off[i] &&
i < sizeof(mcs_rix_off)/sizeof(int)) { i < ARRAY_SIZE(mcs_rix_off)) {
rix++; i++; rix++; i++;
} }
@ -1354,23 +1354,7 @@ static void ath_tx_status(void *priv, struct ieee80211_supported_band *sband,
tx_info->status.ampdu_len = 1; tx_info->status.ampdu_len = 1;
} }
/* if (!(tx_info->flags & IEEE80211_TX_STAT_ACK))
* If an underrun error is seen assume it as an excessive retry only
* if max frame trigger level has been reached (2 KB for singel stream,
* and 4 KB for dual stream). Adjust the long retry as if the frame was
* tried hw->max_rate_tries times to affect how ratectrl updates PER for
* the failed rate. In case of congestion on the bus penalizing these
* type of underruns should help hardware actually transmit new frames
* successfully by eventually preferring slower rates. This itself
* should also alleviate congestion on the bus.
*/
if ((tx_info->pad[0] & ATH_TX_INFO_UNDERRUN) &&
(sc->sc_ah->tx_trig_level >= ath_rc_priv->tx_triglevel_max)) {
tx_status = 1;
is_underrun = 1;
}
if (tx_info->pad[0] & ATH_TX_INFO_XRETRY)
tx_status = 1; tx_status = 1;
ath_rc_tx_status(sc, ath_rc_priv, tx_info, final_ts_idx, tx_status, ath_rc_tx_status(sc, ath_rc_priv, tx_info, final_ts_idx, tx_status,
@ -1379,7 +1363,8 @@ static void ath_tx_status(void *priv, struct ieee80211_supported_band *sband,
/* Check if aggregation has to be enabled for this tid */ /* Check if aggregation has to be enabled for this tid */
if (conf_is_ht(&sc->hw->conf) && if (conf_is_ht(&sc->hw->conf) &&
!(skb->protocol == cpu_to_be16(ETH_P_PAE))) { !(skb->protocol == cpu_to_be16(ETH_P_PAE))) {
if (ieee80211_is_data_qos(fc)) { if (ieee80211_is_data_qos(fc) &&
skb_get_queue_mapping(skb) != IEEE80211_AC_VO) {
u8 *qc, tid; u8 *qc, tid;
struct ath_node *an; struct ath_node *an;
@ -1596,8 +1581,6 @@ static void *ath_rate_alloc_sta(void *priv, struct ieee80211_sta *sta, gfp_t gfp
return NULL; return NULL;
} }
rate_priv->tx_triglevel_max = sc->sc_ah->caps.tx_triglevel_max;
return rate_priv; return rate_priv;
} }

View file

@ -215,7 +215,6 @@ struct ath_rate_priv {
u32 per_down_time; u32 per_down_time;
u32 probe_interval; u32 probe_interval;
u32 prev_data_rix; u32 prev_data_rix;
u32 tx_triglevel_max;
struct ath_rateset neg_rates; struct ath_rateset neg_rates;
struct ath_rateset neg_ht_rates; struct ath_rateset neg_ht_rates;
struct ath_rate_softc *asc; struct ath_rate_softc *asc;
@ -225,11 +224,6 @@ struct ath_rate_priv {
struct ath_rc_stats rcstats[RATE_TABLE_SIZE]; struct ath_rc_stats rcstats[RATE_TABLE_SIZE];
}; };
#define ATH_TX_INFO_FRAME_TYPE_INTERNAL (1 << 0)
#define ATH_TX_INFO_FRAME_TYPE_PAUSE (1 << 1)
#define ATH_TX_INFO_XRETRY (1 << 3)
#define ATH_TX_INFO_UNDERRUN (1 << 4)
enum ath9k_internal_frame_type { enum ath9k_internal_frame_type {
ATH9K_IFT_NOT_INTERNAL, ATH9K_IFT_NOT_INTERNAL,
ATH9K_IFT_PAUSE, ATH9K_IFT_PAUSE,

View file

@ -518,7 +518,7 @@ bool ath_stoprecv(struct ath_softc *sc)
bool stopped; bool stopped;
spin_lock_bh(&sc->rx.rxbuflock); spin_lock_bh(&sc->rx.rxbuflock);
ath9k_hw_stoppcurecv(ah); ath9k_hw_abortpcurecv(ah);
ath9k_hw_setrxfilter(ah, 0); ath9k_hw_setrxfilter(ah, 0);
stopped = ath9k_hw_stopdmarecv(ah); stopped = ath9k_hw_stopdmarecv(ah);

View file

@ -864,15 +864,7 @@
((REG_READ(_ah, AR_AN_SYNTH9) & 0x7) == 0x1)) ((REG_READ(_ah, AR_AN_SYNTH9) & 0x7) == 0x1))
#define AR_DEVID_7010(_ah) \ #define AR_DEVID_7010(_ah) \
(((_ah)->hw_version.devid == 0x7010) || \ ((_ah)->common.driver_info & AR7010_DEVICE)
((_ah)->hw_version.devid == 0x7015) || \
((_ah)->hw_version.devid == 0x9018) || \
((_ah)->hw_version.devid == 0xA704) || \
((_ah)->hw_version.devid == 0x1200))
#define AR9287_HTC_DEVID(_ah) \
(((_ah)->hw_version.devid == 0x7015) || \
((_ah)->hw_version.devid == 0x1200))
#define AR_RADIO_SREV_MAJOR 0xf0 #define AR_RADIO_SREV_MAJOR 0xf0
#define AR_RAD5133_SREV_MAJOR 0xc0 #define AR_RAD5133_SREV_MAJOR 0xc0
@ -1072,6 +1064,9 @@ enum {
#define AR_INTR_PRIO_ASYNC_MASK 0x40c8 #define AR_INTR_PRIO_ASYNC_MASK 0x40c8
#define AR_INTR_PRIO_SYNC_MASK 0x40cc #define AR_INTR_PRIO_SYNC_MASK 0x40cc
#define AR_INTR_PRIO_ASYNC_ENABLE 0x40d4 #define AR_INTR_PRIO_ASYNC_ENABLE 0x40d4
#define AR_ENT_OTP 0x40d8
#define AR_ENT_OTP_CHAIN2_DISABLE 0x00020000
#define AR_ENT_OTP_MPSD 0x00800000
#define AR_RTC_9300_PLL_DIV 0x000003ff #define AR_RTC_9300_PLL_DIV 0x000003ff
#define AR_RTC_9300_PLL_DIV_S 0 #define AR_RTC_9300_PLL_DIV_S 0
@ -1572,6 +1567,7 @@ enum {
#define AR_PCU_TBTT_PROTECT 0x00200000 #define AR_PCU_TBTT_PROTECT 0x00200000
#define AR_PCU_CLEAR_VMF 0x01000000 #define AR_PCU_CLEAR_VMF 0x01000000
#define AR_PCU_CLEAR_BA_VALID 0x04000000 #define AR_PCU_CLEAR_BA_VALID 0x04000000
#define AR_PCU_ALWAYS_PERFORM_KEYSEARCH 0x10000000
#define AR_PCU_BT_ANT_PREVENT_RX 0x00100000 #define AR_PCU_BT_ANT_PREVENT_RX 0x00100000
#define AR_PCU_BT_ANT_PREVENT_RX_S 20 #define AR_PCU_BT_ANT_PREVENT_RX_S 20

View file

@ -305,13 +305,12 @@ void ath9k_wiphy_chan_work(struct work_struct *work)
* ath9k version of ieee80211_tx_status() for TX frames that are generated * ath9k version of ieee80211_tx_status() for TX frames that are generated
* internally in the driver. * internally in the driver.
*/ */
void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb) void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb, int ftype)
{ {
struct ath_wiphy *aphy = hw->priv; struct ath_wiphy *aphy = hw->priv;
struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
if ((tx_info->pad[0] & ATH_TX_INFO_FRAME_TYPE_PAUSE) && if (ftype == ATH9K_IFT_PAUSE && aphy->state == ATH_WIPHY_PAUSING) {
aphy->state == ATH_WIPHY_PAUSING) {
if (!(tx_info->flags & IEEE80211_TX_STAT_ACK)) { if (!(tx_info->flags & IEEE80211_TX_STAT_ACK)) {
printk(KERN_DEBUG "ath9k: %s: no ACK for pause " printk(KERN_DEBUG "ath9k: %s: no ACK for pause "
"frame\n", wiphy_name(hw->wiphy)); "frame\n", wiphy_name(hw->wiphy));

File diff suppressed because it is too large Load diff

View file

@ -41,7 +41,7 @@
int carl9170_write_reg(struct ar9170 *ar, const u32 reg, const u32 val) int carl9170_write_reg(struct ar9170 *ar, const u32 reg, const u32 val)
{ {
__le32 buf[2] = { const __le32 buf[2] = {
cpu_to_le32(reg), cpu_to_le32(reg),
cpu_to_le32(val), cpu_to_le32(val),
}; };

View file

@ -663,7 +663,7 @@ init:
} }
unlock: unlock:
if (err && (vif_id != -1)) { if (err && (vif_id >= 0)) {
vif_priv->active = false; vif_priv->active = false;
bitmap_release_region(&ar->vif_bitmap, vif_id, 0); bitmap_release_region(&ar->vif_bitmap, vif_id, 0);
ar->vifs--; ar->vifs--;

View file

@ -1261,7 +1261,7 @@ static void carl9170_tx(struct ar9170 *ar)
static bool carl9170_tx_ampdu_queue(struct ar9170 *ar, static bool carl9170_tx_ampdu_queue(struct ar9170 *ar,
struct ieee80211_sta *sta, struct sk_buff *skb) struct ieee80211_sta *sta, struct sk_buff *skb)
{ {
struct _carl9170_tx_superframe *super = (void *) super; struct _carl9170_tx_superframe *super = (void *) skb->data;
struct carl9170_sta_info *sta_info; struct carl9170_sta_info *sta_info;
struct carl9170_sta_tid *agg; struct carl9170_sta_tid *agg;
struct sk_buff *iter; struct sk_buff *iter;

View file

@ -19,14 +19,19 @@
void ath_print(struct ath_common *common, int dbg_mask, const char *fmt, ...) void ath_print(struct ath_common *common, int dbg_mask, const char *fmt, ...)
{ {
struct va_format vaf;
va_list args; va_list args;
if (likely(!(common->debug_mask & dbg_mask))) if (likely(!(common->debug_mask & dbg_mask)))
return; return;
va_start(args, fmt); va_start(args, fmt);
printk(KERN_DEBUG "ath: ");
vprintk(fmt, args); vaf.fmt = fmt;
vaf.va = &args;
printk(KERN_DEBUG "ath: %pV", &vaf);
va_end(args); va_end(args);
} }
EXPORT_SYMBOL(ath_print); EXPORT_SYMBOL(ath_print);

View file

@ -1161,7 +1161,7 @@ static irqreturn_t service_interrupt(int irq, void *dev_id)
struct atmel_private *priv = netdev_priv(dev); struct atmel_private *priv = netdev_priv(dev);
u8 isr; u8 isr;
int i = -1; int i = -1;
static u8 irq_order[] = { static const u8 irq_order[] = {
ISR_OUT_OF_RANGE, ISR_OUT_OF_RANGE,
ISR_RxCOMPLETE, ISR_RxCOMPLETE,
ISR_TxCOMPLETE, ISR_TxCOMPLETE,
@ -3771,7 +3771,9 @@ static int probe_atmel_card(struct net_device *dev)
if (rc) { if (rc) {
if (dev->dev_addr[0] == 0xFF) { if (dev->dev_addr[0] == 0xFF) {
u8 default_mac[] = {0x00, 0x04, 0x25, 0x00, 0x00, 0x00}; static const u8 default_mac[] = {
0x00, 0x04, 0x25, 0x00, 0x00, 0x00
};
printk(KERN_ALERT "%s: *** Invalid MAC address. UPGRADE Firmware ****\n", dev->name); printk(KERN_ALERT "%s: *** Invalid MAC address. UPGRADE Firmware ****\n", dev->name);
memcpy(dev->dev_addr, default_mac, 6); memcpy(dev->dev_addr, default_mac, 6);
} }

View file

@ -322,59 +322,83 @@ static int b43_ratelimit(struct b43_wl *wl)
void b43info(struct b43_wl *wl, const char *fmt, ...) void b43info(struct b43_wl *wl, const char *fmt, ...)
{ {
struct va_format vaf;
va_list args; va_list args;
if (b43_modparam_verbose < B43_VERBOSITY_INFO) if (b43_modparam_verbose < B43_VERBOSITY_INFO)
return; return;
if (!b43_ratelimit(wl)) if (!b43_ratelimit(wl))
return; return;
va_start(args, fmt); va_start(args, fmt);
printk(KERN_INFO "b43-%s: ",
(wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); vaf.fmt = fmt;
vprintk(fmt, args); vaf.va = &args;
printk(KERN_INFO "b43-%s: %pV",
(wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
va_end(args); va_end(args);
} }
void b43err(struct b43_wl *wl, const char *fmt, ...) void b43err(struct b43_wl *wl, const char *fmt, ...)
{ {
struct va_format vaf;
va_list args; va_list args;
if (b43_modparam_verbose < B43_VERBOSITY_ERROR) if (b43_modparam_verbose < B43_VERBOSITY_ERROR)
return; return;
if (!b43_ratelimit(wl)) if (!b43_ratelimit(wl))
return; return;
va_start(args, fmt); va_start(args, fmt);
printk(KERN_ERR "b43-%s ERROR: ",
(wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); vaf.fmt = fmt;
vprintk(fmt, args); vaf.va = &args;
printk(KERN_ERR "b43-%s ERROR: %pV",
(wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
va_end(args); va_end(args);
} }
void b43warn(struct b43_wl *wl, const char *fmt, ...) void b43warn(struct b43_wl *wl, const char *fmt, ...)
{ {
struct va_format vaf;
va_list args; va_list args;
if (b43_modparam_verbose < B43_VERBOSITY_WARN) if (b43_modparam_verbose < B43_VERBOSITY_WARN)
return; return;
if (!b43_ratelimit(wl)) if (!b43_ratelimit(wl))
return; return;
va_start(args, fmt); va_start(args, fmt);
printk(KERN_WARNING "b43-%s warning: ",
(wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); vaf.fmt = fmt;
vprintk(fmt, args); vaf.va = &args;
printk(KERN_WARNING "b43-%s warning: %pV",
(wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
va_end(args); va_end(args);
} }
void b43dbg(struct b43_wl *wl, const char *fmt, ...) void b43dbg(struct b43_wl *wl, const char *fmt, ...)
{ {
struct va_format vaf;
va_list args; va_list args;
if (b43_modparam_verbose < B43_VERBOSITY_DEBUG) if (b43_modparam_verbose < B43_VERBOSITY_DEBUG)
return; return;
va_start(args, fmt); va_start(args, fmt);
printk(KERN_DEBUG "b43-%s debug: ",
(wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); vaf.fmt = fmt;
vprintk(fmt, args); vaf.va = &args;
printk(KERN_DEBUG "b43-%s debug: %pV",
(wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
va_end(args); va_end(args);
} }

View file

@ -427,9 +427,11 @@ void b43_phyop_switch_analog_generic(struct b43_wldev *dev, bool on)
/* http://bcm-v4.sipsolutions.net/802.11/PHY/Cordic */ /* http://bcm-v4.sipsolutions.net/802.11/PHY/Cordic */
struct b43_c32 b43_cordic(int theta) struct b43_c32 b43_cordic(int theta)
{ {
u32 arctg[] = { 2949120, 1740967, 919879, 466945, 234379, 117304, static const u32 arctg[] = {
58666, 29335, 14668, 7334, 3667, 1833, 917, 458, 2949120, 1740967, 919879, 466945, 234379, 117304,
229, 115, 57, 29, }; 58666, 29335, 14668, 7334, 3667, 1833,
917, 458, 229, 115, 57, 29,
};
u8 i; u8 i;
s32 tmp; s32 tmp;
s8 signx = 1; s8 signx = 1;

View file

@ -573,7 +573,6 @@ static void b43_nphy_calc_rx_iq_comp(struct b43_wldev *dev, u8 mask)
ii = est.i1_pwr; ii = est.i1_pwr;
qq = est.q1_pwr; qq = est.q1_pwr;
} else { } else {
B43_WARN_ON(1);
continue; continue;
} }
@ -655,7 +654,8 @@ static void b43_nphy_tx_iq_workaround(struct b43_wldev *dev)
} }
/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/clip-detection */ /* http://bcm-v4.sipsolutions.net/802.11/PHY/N/clip-detection */
static void b43_nphy_write_clip_detection(struct b43_wldev *dev, u16 *clip_st) static void b43_nphy_write_clip_detection(struct b43_wldev *dev,
const u16 *clip_st)
{ {
b43_phy_write(dev, B43_NPHY_C1_CLIP1THRES, clip_st[0]); b43_phy_write(dev, B43_NPHY_C1_CLIP1THRES, clip_st[0]);
b43_phy_write(dev, B43_NPHY_C2_CLIP1THRES, clip_st[1]); b43_phy_write(dev, B43_NPHY_C2_CLIP1THRES, clip_st[1]);
@ -731,7 +731,7 @@ static void b43_nphy_stay_in_carrier_search(struct b43_wldev *dev, bool enable)
struct b43_phy_n *nphy = phy->n; struct b43_phy_n *nphy = phy->n;
if (enable) { if (enable) {
u16 clip[] = { 0xFFFF, 0xFFFF }; static const u16 clip[] = { 0xFFFF, 0xFFFF };
if (nphy->deaf_count++ == 0) { if (nphy->deaf_count++ == 0) {
nphy->classifier_state = b43_nphy_classifier(dev, 0, 0); nphy->classifier_state = b43_nphy_classifier(dev, 0, 0);
b43_nphy_classifier(dev, 0x7, 0); b43_nphy_classifier(dev, 0x7, 0);
@ -843,7 +843,7 @@ static void b43_nphy_adjust_lna_gain_table(struct b43_wldev *dev)
u16 data[4]; u16 data[4];
s16 gain[2]; s16 gain[2];
u16 minmax[2]; u16 minmax[2];
u16 lna_gain[4] = { -2, 10, 19, 25 }; static const u16 lna_gain[4] = { -2, 10, 19, 25 };
if (nphy->hang_avoid) if (nphy->hang_avoid)
b43_nphy_stay_in_carrier_search(dev, 1); b43_nphy_stay_in_carrier_search(dev, 1);
@ -875,7 +875,7 @@ static void b43_nphy_adjust_lna_gain_table(struct b43_wldev *dev)
data[2] = lna_gain[2] + gain[i]; data[2] = lna_gain[2] + gain[i];
data[3] = lna_gain[3] + gain[i]; data[3] = lna_gain[3] + gain[i];
} }
b43_ntab_write_bulk(dev, B43_NTAB16(10, 8), 4, data); b43_ntab_write_bulk(dev, B43_NTAB16(i, 8), 4, data);
minmax[i] = 23 + gain[i]; minmax[i] = 23 + gain[i];
} }
@ -895,6 +895,7 @@ static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
struct b43_phy_n *nphy = dev->phy.n; struct b43_phy_n *nphy = dev->phy.n;
u8 i, j; u8 i, j;
u8 code; u8 code;
u16 tmp;
/* TODO: for PHY >= 3 /* TODO: for PHY >= 3
s8 *lna1_gain, *lna2_gain; s8 *lna1_gain, *lna2_gain;
@ -917,15 +918,15 @@ static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
B43_NPHY_C2_CGAINI_CL2DETECT); B43_NPHY_C2_CGAINI_CL2DETECT);
/* Set narrowband clip threshold */ /* Set narrowband clip threshold */
b43_phy_set(dev, B43_NPHY_C1_NBCLIPTHRES, 0x84); b43_phy_write(dev, B43_NPHY_C1_NBCLIPTHRES, 0x84);
b43_phy_set(dev, B43_NPHY_C2_NBCLIPTHRES, 0x84); b43_phy_write(dev, B43_NPHY_C2_NBCLIPTHRES, 0x84);
if (!dev->phy.is_40mhz) { if (!dev->phy.is_40mhz) {
/* Set dwell lengths */ /* Set dwell lengths */
b43_phy_set(dev, B43_NPHY_CLIP1_NBDWELL_LEN, 0x002B); b43_phy_write(dev, B43_NPHY_CLIP1_NBDWELL_LEN, 0x002B);
b43_phy_set(dev, B43_NPHY_CLIP2_NBDWELL_LEN, 0x002B); b43_phy_write(dev, B43_NPHY_CLIP2_NBDWELL_LEN, 0x002B);
b43_phy_set(dev, B43_NPHY_W1CLIP1_DWELL_LEN, 0x0009); b43_phy_write(dev, B43_NPHY_W1CLIP1_DWELL_LEN, 0x0009);
b43_phy_set(dev, B43_NPHY_W1CLIP2_DWELL_LEN, 0x0009); b43_phy_write(dev, B43_NPHY_W1CLIP2_DWELL_LEN, 0x0009);
} }
/* Set wideband clip 2 threshold */ /* Set wideband clip 2 threshold */
@ -947,7 +948,7 @@ static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
~B43_NPHY_C2_CCK_CGAINI_GAINBKOFF, 0x1); ~B43_NPHY_C2_CCK_CGAINI_GAINBKOFF, 0x1);
} }
b43_phy_set(dev, B43_NPHY_CCK_SHIFTB_REF, 0x809C); b43_phy_write(dev, B43_NPHY_CCK_SHIFTB_REF, 0x809C);
if (nphy->gain_boost) { if (nphy->gain_boost) {
if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ && if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ &&
@ -968,10 +969,10 @@ static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
code << B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT); code << B43_NPHY_C2_INITGAIN_HPVGA2_SHIFT);
b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06); b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06);
b43_phy_write(dev, B43_NPHY_TABLE_DATALO, /* specs say about 2 loops, but wl does 4 */
(code << 8 | 0x7C)); for (i = 0; i < 4; i++)
b43_phy_write(dev, B43_NPHY_TABLE_DATALO, b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
(code << 8 | 0x7C)); (code << 8 | 0x7C));
b43_nphy_adjust_lna_gain_table(dev); b43_nphy_adjust_lna_gain_table(dev);
@ -989,19 +990,21 @@ static void b43_nphy_gain_ctrl_workarounds(struct b43_wldev *dev)
b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1); b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1);
b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06); b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06);
b43_phy_write(dev, B43_NPHY_TABLE_DATALO, /* specs say about 2 loops, but wl does 4 */
(code << 8 | 0x74)); for (i = 0; i < 4; i++)
b43_phy_write(dev, B43_NPHY_TABLE_DATALO, b43_phy_write(dev, B43_NPHY_TABLE_DATALO,
(code << 8 | 0x74)); (code << 8 | 0x74));
} }
if (dev->phy.rev == 2) { if (dev->phy.rev == 2) {
for (i = 0; i < 4; i++) { for (i = 0; i < 4; i++) {
b43_phy_write(dev, B43_NPHY_TABLE_ADDR, b43_phy_write(dev, B43_NPHY_TABLE_ADDR,
(0x0400 * i) + 0x0020); (0x0400 * i) + 0x0020);
for (j = 0; j < 21; j++) for (j = 0; j < 21; j++) {
tmp = j * (i < 2 ? 3 : 1);
b43_phy_write(dev, b43_phy_write(dev,
B43_NPHY_TABLE_DATALO, 3 * j); B43_NPHY_TABLE_DATALO, tmp);
}
} }
b43_nphy_set_rf_sequence(dev, 5, b43_nphy_set_rf_sequence(dev, 5,
@ -1030,7 +1033,7 @@ static void b43_nphy_workarounds(struct b43_wldev *dev)
u8 events2[7] = { 0x0, 0x3, 0x5, 0x4, 0x2, 0x1, 0x8 }; u8 events2[7] = { 0x0, 0x3, 0x5, 0x4, 0x2, 0x1, 0x8 };
u8 delays2[7] = { 0x8, 0x6, 0x2, 0x4, 0x4, 0x6, 0x1 }; u8 delays2[7] = { 0x8, 0x6, 0x2, 0x4, 0x4, 0x6, 0x1 };
if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ)
b43_nphy_classifier(dev, 1, 0); b43_nphy_classifier(dev, 1, 0);
else else
b43_nphy_classifier(dev, 1, 1); b43_nphy_classifier(dev, 1, 1);
@ -1569,19 +1572,20 @@ static void b43_nphy_rf_control_intc_override(struct b43_wldev *dev, u8 field,
} }
} }
/* http://bcm-v4.sipsolutions.net/802.11/PHY/N/BPHYInit */
static void b43_nphy_bphy_init(struct b43_wldev *dev) static void b43_nphy_bphy_init(struct b43_wldev *dev)
{ {
unsigned int i; unsigned int i;
u16 val; u16 val;
val = 0x1E1F; val = 0x1E1F;
for (i = 0; i < 14; i++) { for (i = 0; i < 16; i++) {
b43_phy_write(dev, B43_PHY_N_BMODE(0x88 + i), val); b43_phy_write(dev, B43_PHY_N_BMODE(0x88 + i), val);
val -= 0x202; val -= 0x202;
} }
val = 0x3E3F; val = 0x3E3F;
for (i = 0; i < 16; i++) { for (i = 0; i < 16; i++) {
b43_phy_write(dev, B43_PHY_N_BMODE(0x97 + i), val); b43_phy_write(dev, B43_PHY_N_BMODE(0x98 + i), val);
val -= 0x202; val -= 0x202;
} }
b43_phy_write(dev, B43_PHY_N_BMODE(0x38), 0x668); b43_phy_write(dev, B43_PHY_N_BMODE(0x38), 0x668);
@ -1841,6 +1845,14 @@ static int b43_nphy_poll_rssi(struct b43_wldev *dev, u8 type, s32 *buf,
save_regs_phy[5] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER); save_regs_phy[5] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
save_regs_phy[6] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B1S0); save_regs_phy[6] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B1S0);
save_regs_phy[7] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B32S1); save_regs_phy[7] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B32S1);
} else if (dev->phy.rev == 2) {
save_regs_phy[0] = b43_phy_read(dev, B43_NPHY_AFECTL_C1);
save_regs_phy[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C2);
save_regs_phy[2] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER);
save_regs_phy[3] = b43_phy_read(dev, B43_NPHY_RFCTL_CMD);
save_regs_phy[4] = b43_phy_read(dev, B43_NPHY_RFCTL_OVER);
save_regs_phy[5] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO1);
save_regs_phy[6] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO2);
} }
b43_nphy_rssi_select(dev, 5, type); b43_nphy_rssi_select(dev, 5, type);
@ -1884,6 +1896,14 @@ static int b43_nphy_poll_rssi(struct b43_wldev *dev, u8 type, s32 *buf,
b43_phy_write(dev, B43_NPHY_AFECTL_OVER, save_regs_phy[5]); b43_phy_write(dev, B43_NPHY_AFECTL_OVER, save_regs_phy[5]);
b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S0, save_regs_phy[6]); b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S0, save_regs_phy[6]);
b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S1, save_regs_phy[7]); b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S1, save_regs_phy[7]);
} else if (dev->phy.rev == 2) {
b43_phy_write(dev, B43_NPHY_AFECTL_C1, save_regs_phy[0]);
b43_phy_write(dev, B43_NPHY_AFECTL_C2, save_regs_phy[1]);
b43_phy_write(dev, B43_NPHY_AFECTL_OVER, save_regs_phy[2]);
b43_phy_write(dev, B43_NPHY_RFCTL_CMD, save_regs_phy[3]);
b43_phy_write(dev, B43_NPHY_RFCTL_OVER, save_regs_phy[4]);
b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO1, save_regs_phy[5]);
b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO2, save_regs_phy[6]);
} }
return out; return out;
@ -2008,7 +2028,7 @@ static void b43_nphy_rev2_rssi_cal(struct b43_wldev *dev, u8 type)
} }
b43_radio_maskset(dev, B2055_C1_PD_RSSIMISC, 0xF8, state[0]); b43_radio_maskset(dev, B2055_C1_PD_RSSIMISC, 0xF8, state[0]);
b43_radio_maskset(dev, B2055_C1_PD_RSSIMISC, 0xF8, state[1]); b43_radio_maskset(dev, B2055_C2_PD_RSSIMISC, 0xF8, state[1]);
switch (state[2]) { switch (state[2]) {
case 1: case 1:
@ -2299,7 +2319,7 @@ static void b43_nphy_int_pa_set_tx_dig_filters(struct b43_wldev *dev)
{ {
int i, j; int i, j;
/* B43_NPHY_TXF_20CO_S0A1, B43_NPHY_TXF_40CO_S0A1, unknown */ /* B43_NPHY_TXF_20CO_S0A1, B43_NPHY_TXF_40CO_S0A1, unknown */
u16 offset[] = { 0x186, 0x195, 0x2C5 }; static const u16 offset[] = { 0x186, 0x195, 0x2C5 };
for (i = 0; i < 3; i++) for (i = 0; i < 3; i++)
for (j = 0; j < 15; j++) for (j = 0; j < 15; j++)
@ -3092,7 +3112,7 @@ static void b43_nphy_set_rx_core_state(struct b43_wldev *dev, u8 mask)
{ {
struct b43_phy *phy = &dev->phy; struct b43_phy *phy = &dev->phy;
struct b43_phy_n *nphy = phy->n; struct b43_phy_n *nphy = phy->n;
u16 buf[16]; /* u16 buf[16]; it's rev3+ */
nphy->phyrxchain = mask; nphy->phyrxchain = mask;
@ -3236,6 +3256,9 @@ int b43_phy_initn(struct b43_wldev *dev)
b43_nphy_classifier(dev, 0, 0); b43_nphy_classifier(dev, 0, 0);
b43_nphy_read_clip_detection(dev, clip); b43_nphy_read_clip_detection(dev, clip);
if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)
b43_nphy_bphy_init(dev);
tx_pwr_state = nphy->txpwrctrl; tx_pwr_state = nphy->txpwrctrl;
/* TODO N PHY TX power control with argument 0 /* TODO N PHY TX power control with argument 0
(turning off power control) */ (turning off power control) */
@ -3385,7 +3408,6 @@ static int b43_nphy_set_channel(struct b43_wldev *dev,
enum nl80211_channel_type channel_type) enum nl80211_channel_type channel_type)
{ {
struct b43_phy *phy = &dev->phy; struct b43_phy *phy = &dev->phy;
struct b43_phy_n *nphy = dev->phy.n;
const struct b43_nphy_channeltab_entry_rev2 *tabent_r2; const struct b43_nphy_channeltab_entry_rev2 *tabent_r2;
const struct b43_nphy_channeltab_entry_rev3 *tabent_r3; const struct b43_nphy_channeltab_entry_rev3 *tabent_r3;
@ -3455,7 +3477,9 @@ static void b43_nphy_op_prepare_structs(struct b43_wldev *dev)
memset(nphy, 0, sizeof(*nphy)); memset(nphy, 0, sizeof(*nphy));
//TODO init struct b43_phy_n nphy->gain_boost = true; /* this way we follow wl, assume it is true */
nphy->txrx_chain = 2; /* sth different than 0 and 1 for now */
nphy->phyrxchain = 3; /* to avoid b43_nphy_set_rx_core_state like wl */
} }
static void b43_nphy_op_free(struct b43_wldev *dev) static void b43_nphy_op_free(struct b43_wldev *dev)
@ -3528,8 +3552,6 @@ static void b43_nphy_op_radio_write(struct b43_wldev *dev, u16 reg, u16 value)
static void b43_nphy_op_software_rfkill(struct b43_wldev *dev, static void b43_nphy_op_software_rfkill(struct b43_wldev *dev,
bool blocked) bool blocked)
{ {
struct b43_phy_n *nphy = dev->phy.n;
if (b43_read32(dev, B43_MMIO_MACCTL) & B43_MACCTL_ENABLED) if (b43_read32(dev, B43_MMIO_MACCTL) & B43_MACCTL_ENABLED)
b43err(dev->wl, "MAC not suspended\n"); b43err(dev->wl, "MAC not suspended\n");

View file

@ -307,7 +307,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x01, 0xEC, 0x0F, 0xFF, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x01, 0xEC, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F, 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F,
0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
PHYREGS(0xB407, 0xB007, 0xAC07, 0x1402, 0x1502, 0x1602), PHYREGS(0x07B4, 0x07B0, 0x07AC, 0x0214, 0x0215, 0x0216),
}, },
{ .channel = 186, { .channel = 186,
.freq = 4930, /* MHz */ .freq = 4930, /* MHz */
@ -315,7 +315,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x01, 0xED, 0x0F, 0xFF, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x01, 0xED, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F, 0x00, 0x8F, 0xFF, 0xFF, 0xFF, 0x00, 0x0F, 0x0F,
0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
PHYREGS(0xB807, 0xB407, 0xB007, 0x1302, 0x1402, 0x1502), PHYREGS(0x07B8, 0x07B4, 0x07B0, 0x0213, 0x0214, 0x0215),
}, },
{ .channel = 188, { .channel = 188,
.freq = 4940, /* MHz */ .freq = 4940, /* MHz */
@ -323,7 +323,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x01, 0xEE, 0x0F, 0xFF, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x01, 0xEE, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F,
0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
PHYREGS(0xBC07, 0xB807, 0xB407, 0x1202, 0x1302, 0x1402), PHYREGS(0x07BC, 0x07B8, 0x07B4, 0x0212, 0x0213, 0x0214),
}, },
{ .channel = 190, { .channel = 190,
.freq = 4950, /* MHz */ .freq = 4950, /* MHz */
@ -331,7 +331,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x01, 0xEF, 0x0F, 0xFF, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x01, 0xEF, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F,
0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
PHYREGS(0xC007, 0xBC07, 0xB807, 0x1102, 0x1202, 0x1302), PHYREGS(0x07C0, 0x07BC, 0x07B8, 0x0211, 0x0212, 0x0213),
}, },
{ .channel = 192, { .channel = 192,
.freq = 4960, /* MHz */ .freq = 4960, /* MHz */
@ -339,7 +339,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x01, 0xF0, 0x0F, 0xFF, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x01, 0xF0, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F,
0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
PHYREGS(0xC407, 0xC007, 0xBC07, 0x0F02, 0x1102, 0x1202), PHYREGS(0x07C4, 0x07C0, 0x07BC, 0x020F, 0x0211, 0x0212),
}, },
{ .channel = 194, { .channel = 194,
.freq = 4970, /* MHz */ .freq = 4970, /* MHz */
@ -347,7 +347,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x01, 0xF1, 0x0F, 0xFF, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x01, 0xF1, 0x0F, 0xFF, 0x01, 0x04, 0x0A,
0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F, 0x00, 0x8F, 0xEE, 0xEE, 0xFF, 0x00, 0x0F, 0x0F,
0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
PHYREGS(0xC807, 0xC407, 0xC007, 0x0E02, 0x0F02, 0x1102), PHYREGS(0x07C8, 0x07C4, 0x07C0, 0x020E, 0x020F, 0x0211),
}, },
{ .channel = 196, { .channel = 196,
.freq = 4980, /* MHz */ .freq = 4980, /* MHz */
@ -355,7 +355,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x01, 0xF2, 0x0E, 0xFF, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x01, 0xF2, 0x0E, 0xFF, 0x01, 0x04, 0x0A,
0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F,
0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
PHYREGS(0xCC07, 0xC807, 0xC407, 0x0D02, 0x0E02, 0x0F02), PHYREGS(0x07CC, 0x07C8, 0x07C4, 0x020D, 0x020E, 0x020F),
}, },
{ .channel = 198, { .channel = 198,
.freq = 4990, /* MHz */ .freq = 4990, /* MHz */
@ -363,7 +363,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x01, 0xF3, 0x0E, 0xFF, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x01, 0xF3, 0x0E, 0xFF, 0x01, 0x04, 0x0A,
0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F,
0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
PHYREGS(0xD007, 0xCC07, 0xC807, 0x0C02, 0x0D02, 0x0E02), PHYREGS(0x07D0, 0x07CC, 0x07C8, 0x020C, 0x020D, 0x020E),
}, },
{ .channel = 200, { .channel = 200,
.freq = 5000, /* MHz */ .freq = 5000, /* MHz */
@ -371,7 +371,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x01, 0xF4, 0x0E, 0xFF, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x01, 0xF4, 0x0E, 0xFF, 0x01, 0x04, 0x0A,
0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F,
0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
PHYREGS(0xD407, 0xD007, 0xCC07, 0x0B02, 0x0C02, 0x0D02), PHYREGS(0x07D4, 0x07D0, 0x07CC, 0x020B, 0x020C, 0x020D),
}, },
{ .channel = 202, { .channel = 202,
.freq = 5010, /* MHz */ .freq = 5010, /* MHz */
@ -379,7 +379,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x01, 0xF5, 0x0E, 0xFF, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x01, 0xF5, 0x0E, 0xFF, 0x01, 0x04, 0x0A,
0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F, 0x00, 0x8F, 0xDD, 0xDD, 0xFF, 0x00, 0x0F, 0x0F,
0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
PHYREGS(0xD807, 0xD407, 0xD007, 0x0A02, 0x0B02, 0x0C02), PHYREGS(0x07D8, 0x07D4, 0x07D0, 0x020A, 0x020B, 0x020C),
}, },
{ .channel = 204, { .channel = 204,
.freq = 5020, /* MHz */ .freq = 5020, /* MHz */
@ -387,7 +387,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x01, 0xF6, 0x0E, 0xF7, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x01, 0xF6, 0x0E, 0xF7, 0x01, 0x04, 0x0A,
0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F,
0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
PHYREGS(0xDC07, 0xD807, 0xD407, 0x0902, 0x0A02, 0x0B02), PHYREGS(0x07DC, 0x07D8, 0x07D4, 0x0209, 0x020A, 0x020B),
}, },
{ .channel = 206, { .channel = 206,
.freq = 5030, /* MHz */ .freq = 5030, /* MHz */
@ -395,7 +395,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x01, 0xF7, 0x0E, 0xF7, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x01, 0xF7, 0x0E, 0xF7, 0x01, 0x04, 0x0A,
0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F,
0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
PHYREGS(0xE007, 0xDC07, 0xD807, 0x0802, 0x0902, 0x0A02), PHYREGS(0x07E0, 0x07DC, 0x07D8, 0x0208, 0x0209, 0x020A),
}, },
{ .channel = 208, { .channel = 208,
.freq = 5040, /* MHz */ .freq = 5040, /* MHz */
@ -403,7 +403,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x01, 0xF8, 0x0D, 0xEF, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x01, 0xF8, 0x0D, 0xEF, 0x01, 0x04, 0x0A,
0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F,
0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
PHYREGS(0xE407, 0xE007, 0xDC07, 0x0702, 0x0802, 0x0902), PHYREGS(0x07E4, 0x07E0, 0x07DC, 0x0207, 0x0208, 0x0209),
}, },
{ .channel = 210, { .channel = 210,
.freq = 5050, /* MHz */ .freq = 5050, /* MHz */
@ -411,7 +411,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x01, 0xF9, 0x0D, 0xEF, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x01, 0xF9, 0x0D, 0xEF, 0x01, 0x04, 0x0A,
0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F, 0x00, 0x8F, 0xCC, 0xCC, 0xFF, 0x00, 0x0F, 0x0F,
0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F), 0x8F, 0xFF, 0x00, 0x0F, 0x0F, 0x8F),
PHYREGS(0xE807, 0xE407, 0xE007, 0x0602, 0x0702, 0x0802), PHYREGS(0x07E8, 0x07E4, 0x07E0, 0x0206, 0x0207, 0x0208),
}, },
{ .channel = 212, { .channel = 212,
.freq = 5060, /* MHz */ .freq = 5060, /* MHz */
@ -419,7 +419,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x01, 0xFA, 0x0D, 0xE6, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x01, 0xFA, 0x0D, 0xE6, 0x01, 0x04, 0x0A,
0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F, 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F,
0x8E, 0xFF, 0x00, 0x0E, 0x0F, 0x8E), 0x8E, 0xFF, 0x00, 0x0E, 0x0F, 0x8E),
PHYREGS(0xEC07, 0xE807, 0xE407, 0x0502, 0x0602, 0x0702), PHYREGS(0x07EC, 0x07E8, 0x07E4, 0x0205, 0x0206, 0x0207),
}, },
{ .channel = 214, { .channel = 214,
.freq = 5070, /* MHz */ .freq = 5070, /* MHz */
@ -427,7 +427,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x01, 0xFB, 0x0D, 0xE6, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x01, 0xFB, 0x0D, 0xE6, 0x01, 0x04, 0x0A,
0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F, 0x00, 0x8F, 0xBB, 0xBB, 0xFF, 0x00, 0x0E, 0x0F,
0x8E, 0xFF, 0x00, 0x0E, 0x0F, 0x8E), 0x8E, 0xFF, 0x00, 0x0E, 0x0F, 0x8E),
PHYREGS(0xF007, 0xEC07, 0xE807, 0x0402, 0x0502, 0x0602), PHYREGS(0x07F0, 0x07EC, 0x07E8, 0x0204, 0x0205, 0x0206),
}, },
{ .channel = 216, { .channel = 216,
.freq = 5080, /* MHz */ .freq = 5080, /* MHz */
@ -435,7 +435,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x01, 0xFC, 0x0D, 0xDE, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x01, 0xFC, 0x0D, 0xDE, 0x01, 0x04, 0x0A,
0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F, 0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F,
0x8D, 0xEE, 0x00, 0x0E, 0x0F, 0x8D), 0x8D, 0xEE, 0x00, 0x0E, 0x0F, 0x8D),
PHYREGS(0xF407, 0xF007, 0xEC07, 0x0302, 0x0402, 0x0502), PHYREGS(0x07F4, 0x07F0, 0x07EC, 0x0203, 0x0204, 0x0205),
}, },
{ .channel = 218, { .channel = 218,
.freq = 5090, /* MHz */ .freq = 5090, /* MHz */
@ -443,7 +443,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x01, 0xFD, 0x0D, 0xDE, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x01, 0xFD, 0x0D, 0xDE, 0x01, 0x04, 0x0A,
0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F, 0x00, 0x8E, 0xBB, 0xBB, 0xEE, 0x00, 0x0E, 0x0F,
0x8D, 0xEE, 0x00, 0x0E, 0x0F, 0x8D), 0x8D, 0xEE, 0x00, 0x0E, 0x0F, 0x8D),
PHYREGS(0xF807, 0xF407, 0xF007, 0x0202, 0x0302, 0x0402), PHYREGS(0x07F8, 0x07F4, 0x07F0, 0x0202, 0x0203, 0x0204),
}, },
{ .channel = 220, { .channel = 220,
.freq = 5100, /* MHz */ .freq = 5100, /* MHz */
@ -451,7 +451,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x01, 0xFE, 0x0C, 0xD6, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x01, 0xFE, 0x0C, 0xD6, 0x01, 0x04, 0x0A,
0x00, 0x8E, 0xAA, 0xAA, 0xEE, 0x00, 0x0D, 0x0F, 0x00, 0x8E, 0xAA, 0xAA, 0xEE, 0x00, 0x0D, 0x0F,
0x8D, 0xEE, 0x00, 0x0D, 0x0F, 0x8D), 0x8D, 0xEE, 0x00, 0x0D, 0x0F, 0x8D),
PHYREGS(0xFC07, 0xF807, 0xF407, 0x0102, 0x0202, 0x0302), PHYREGS(0x07FC, 0x07F8, 0x07F4, 0x0201, 0x0202, 0x0203),
}, },
{ .channel = 222, { .channel = 222,
.freq = 5110, /* MHz */ .freq = 5110, /* MHz */
@ -459,7 +459,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x01, 0xFF, 0x0C, 0xD6, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x01, 0xFF, 0x0C, 0xD6, 0x01, 0x04, 0x0A,
0x00, 0x8E, 0xAA, 0xAA, 0xEE, 0x00, 0x0D, 0x0F, 0x00, 0x8E, 0xAA, 0xAA, 0xEE, 0x00, 0x0D, 0x0F,
0x8D, 0xEE, 0x00, 0x0D, 0x0F, 0x8D), 0x8D, 0xEE, 0x00, 0x0D, 0x0F, 0x8D),
PHYREGS(0x0008, 0xFC07, 0xF807, 0x0002, 0x0102, 0x0202), PHYREGS(0x0800, 0x07FC, 0x07F8, 0x0200, 0x0201, 0x0202),
}, },
{ .channel = 224, { .channel = 224,
.freq = 5120, /* MHz */ .freq = 5120, /* MHz */
@ -467,7 +467,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x00, 0x0C, 0xCE, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x00, 0x0C, 0xCE, 0x01, 0x04, 0x0A,
0x00, 0x8D, 0xAA, 0xAA, 0xDD, 0x00, 0x0D, 0x0F, 0x00, 0x8D, 0xAA, 0xAA, 0xDD, 0x00, 0x0D, 0x0F,
0x8C, 0xDD, 0x00, 0x0D, 0x0F, 0x8C), 0x8C, 0xDD, 0x00, 0x0D, 0x0F, 0x8C),
PHYREGS(0x0408, 0x0008, 0xFC07, 0xFF01, 0x0002, 0x0102), PHYREGS(0x0804, 0x0800, 0x07FC, 0x01FF, 0x0200, 0x0201),
}, },
{ .channel = 226, { .channel = 226,
.freq = 5130, /* MHz */ .freq = 5130, /* MHz */
@ -475,7 +475,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x01, 0x0C, 0xCE, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x01, 0x0C, 0xCE, 0x01, 0x04, 0x0A,
0x00, 0x8D, 0xAA, 0xAA, 0xDD, 0x00, 0x0D, 0x0F, 0x00, 0x8D, 0xAA, 0xAA, 0xDD, 0x00, 0x0D, 0x0F,
0x8C, 0xDD, 0x00, 0x0D, 0x0F, 0x8C), 0x8C, 0xDD, 0x00, 0x0D, 0x0F, 0x8C),
PHYREGS(0x0808, 0x0408, 0x0008, 0xFE01, 0xFF01, 0x0002), PHYREGS(0x0808, 0x0804, 0x0800, 0x01FE, 0x01FF, 0x0200),
}, },
{ .channel = 228, { .channel = 228,
.freq = 5140, /* MHz */ .freq = 5140, /* MHz */
@ -483,7 +483,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x02, 0x0C, 0xC6, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x02, 0x0C, 0xC6, 0x01, 0x04, 0x0A,
0x00, 0x8D, 0x99, 0x99, 0xDD, 0x00, 0x0C, 0x0E, 0x00, 0x8D, 0x99, 0x99, 0xDD, 0x00, 0x0C, 0x0E,
0x8B, 0xDD, 0x00, 0x0C, 0x0E, 0x8B), 0x8B, 0xDD, 0x00, 0x0C, 0x0E, 0x8B),
PHYREGS(0x0C08, 0x0808, 0x0408, 0xFD01, 0xFE01, 0xFF01), PHYREGS(0x080C, 0x0808, 0x0804, 0x01FD, 0x01FE, 0x01FF),
}, },
{ .channel = 32, { .channel = 32,
.freq = 5160, /* MHz */ .freq = 5160, /* MHz */
@ -491,7 +491,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x04, 0x0B, 0xBE, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x04, 0x0B, 0xBE, 0x01, 0x04, 0x0A,
0x00, 0x8C, 0x99, 0x99, 0xCC, 0x00, 0x0B, 0x0D, 0x00, 0x8C, 0x99, 0x99, 0xCC, 0x00, 0x0B, 0x0D,
0x8A, 0xCC, 0x00, 0x0B, 0x0D, 0x8A), 0x8A, 0xCC, 0x00, 0x0B, 0x0D, 0x8A),
PHYREGS(0x1408, 0x1008, 0x0C08, 0xFB01, 0xFC01, 0xFD01), PHYREGS(0x0814, 0x0810, 0x080C, 0x01FB, 0x01FC, 0x01FD),
}, },
{ .channel = 34, { .channel = 34,
.freq = 5170, /* MHz */ .freq = 5170, /* MHz */
@ -499,7 +499,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x05, 0x0B, 0xBE, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x05, 0x0B, 0xBE, 0x01, 0x04, 0x0A,
0x00, 0x8C, 0x99, 0x99, 0xCC, 0x00, 0x0B, 0x0D, 0x00, 0x8C, 0x99, 0x99, 0xCC, 0x00, 0x0B, 0x0D,
0x8A, 0xCC, 0x00, 0x0B, 0x0D, 0x8A), 0x8A, 0xCC, 0x00, 0x0B, 0x0D, 0x8A),
PHYREGS(0x1808, 0x1408, 0x1008, 0xFA01, 0xFB01, 0xFC01), PHYREGS(0x0818, 0x0814, 0x0810, 0x01FA, 0x01FB, 0x01FC),
}, },
{ .channel = 36, { .channel = 36,
.freq = 5180, /* MHz */ .freq = 5180, /* MHz */
@ -507,7 +507,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x06, 0x0B, 0xB6, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x06, 0x0B, 0xB6, 0x01, 0x04, 0x0A,
0x00, 0x8C, 0x88, 0x88, 0xCC, 0x00, 0x0B, 0x0C, 0x00, 0x8C, 0x88, 0x88, 0xCC, 0x00, 0x0B, 0x0C,
0x89, 0xCC, 0x00, 0x0B, 0x0C, 0x89), 0x89, 0xCC, 0x00, 0x0B, 0x0C, 0x89),
PHYREGS(0x1C08, 0x1808, 0x1408, 0xF901, 0xFA01, 0xFB01), PHYREGS(0x081C, 0x0818, 0x0814, 0x01F9, 0x01FA, 0x01FB),
}, },
{ .channel = 38, { .channel = 38,
.freq = 5190, /* MHz */ .freq = 5190, /* MHz */
@ -515,7 +515,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x07, 0x0B, 0xB6, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x07, 0x0B, 0xB6, 0x01, 0x04, 0x0A,
0x00, 0x8C, 0x88, 0x88, 0xCC, 0x00, 0x0B, 0x0C, 0x00, 0x8C, 0x88, 0x88, 0xCC, 0x00, 0x0B, 0x0C,
0x89, 0xCC, 0x00, 0x0B, 0x0C, 0x89), 0x89, 0xCC, 0x00, 0x0B, 0x0C, 0x89),
PHYREGS(0x2008, 0x1C08, 0x1808, 0xF801, 0xF901, 0xFA01), PHYREGS(0x0820, 0x081C, 0x0818, 0x01F8, 0x01F9, 0x01FA),
}, },
{ .channel = 40, { .channel = 40,
.freq = 5200, /* MHz */ .freq = 5200, /* MHz */
@ -523,7 +523,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x08, 0x0B, 0xAF, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x08, 0x0B, 0xAF, 0x01, 0x04, 0x0A,
0x00, 0x8B, 0x88, 0x88, 0xBB, 0x00, 0x0A, 0x0B, 0x00, 0x8B, 0x88, 0x88, 0xBB, 0x00, 0x0A, 0x0B,
0x89, 0xBB, 0x00, 0x0A, 0x0B, 0x89), 0x89, 0xBB, 0x00, 0x0A, 0x0B, 0x89),
PHYREGS(0x2408, 0x2008, 0x1C08, 0xF701, 0xF801, 0xF901), PHYREGS(0x0824, 0x0820, 0x081C, 0x01F7, 0x01F8, 0x01F9),
}, },
{ .channel = 42, { .channel = 42,
.freq = 5210, /* MHz */ .freq = 5210, /* MHz */
@ -531,7 +531,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x09, 0x0B, 0xAF, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x09, 0x0B, 0xAF, 0x01, 0x04, 0x0A,
0x00, 0x8B, 0x88, 0x88, 0xBB, 0x00, 0x0A, 0x0B, 0x00, 0x8B, 0x88, 0x88, 0xBB, 0x00, 0x0A, 0x0B,
0x89, 0xBB, 0x00, 0x0A, 0x0B, 0x89), 0x89, 0xBB, 0x00, 0x0A, 0x0B, 0x89),
PHYREGS(0x2808, 0x2408, 0x2008, 0xF601, 0xF701, 0xF801), PHYREGS(0x0828, 0x0824, 0x0820, 0x01F6, 0x01F7, 0x01F8),
}, },
{ .channel = 44, { .channel = 44,
.freq = 5220, /* MHz */ .freq = 5220, /* MHz */
@ -539,7 +539,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x0A, 0x0A, 0xA7, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x0A, 0x0A, 0xA7, 0x01, 0x04, 0x0A,
0x00, 0x8B, 0x77, 0x77, 0xBB, 0x00, 0x09, 0x0A, 0x00, 0x8B, 0x77, 0x77, 0xBB, 0x00, 0x09, 0x0A,
0x88, 0xBB, 0x00, 0x09, 0x0A, 0x88), 0x88, 0xBB, 0x00, 0x09, 0x0A, 0x88),
PHYREGS(0x2C08, 0x2808, 0x2408, 0xF501, 0xF601, 0xF701), PHYREGS(0x082C, 0x0828, 0x0824, 0x01F5, 0x01F6, 0x01F7),
}, },
{ .channel = 46, { .channel = 46,
.freq = 5230, /* MHz */ .freq = 5230, /* MHz */
@ -547,7 +547,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x0B, 0x0A, 0xA7, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x0B, 0x0A, 0xA7, 0x01, 0x04, 0x0A,
0x00, 0x8B, 0x77, 0x77, 0xBB, 0x00, 0x09, 0x0A, 0x00, 0x8B, 0x77, 0x77, 0xBB, 0x00, 0x09, 0x0A,
0x88, 0xBB, 0x00, 0x09, 0x0A, 0x88), 0x88, 0xBB, 0x00, 0x09, 0x0A, 0x88),
PHYREGS(0x3008, 0x2C08, 0x2808, 0xF401, 0xF501, 0xF601), PHYREGS(0x0830, 0x082C, 0x0828, 0x01F4, 0x01F5, 0x01F6),
}, },
{ .channel = 48, { .channel = 48,
.freq = 5240, /* MHz */ .freq = 5240, /* MHz */
@ -555,7 +555,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x0C, 0x0A, 0xA0, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x0C, 0x0A, 0xA0, 0x01, 0x04, 0x0A,
0x00, 0x8A, 0x77, 0x77, 0xAA, 0x00, 0x09, 0x0A, 0x00, 0x8A, 0x77, 0x77, 0xAA, 0x00, 0x09, 0x0A,
0x87, 0xAA, 0x00, 0x09, 0x0A, 0x87), 0x87, 0xAA, 0x00, 0x09, 0x0A, 0x87),
PHYREGS(0x3408, 0x3008, 0x2C08, 0xF301, 0xF401, 0xF501), PHYREGS(0x0834, 0x0830, 0x082C, 0x01F3, 0x01F4, 0x01F5),
}, },
{ .channel = 50, { .channel = 50,
.freq = 5250, /* MHz */ .freq = 5250, /* MHz */
@ -563,7 +563,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x0D, 0x0A, 0xA0, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x0D, 0x0A, 0xA0, 0x01, 0x04, 0x0A,
0x00, 0x8A, 0x77, 0x77, 0xAA, 0x00, 0x09, 0x0A, 0x00, 0x8A, 0x77, 0x77, 0xAA, 0x00, 0x09, 0x0A,
0x87, 0xAA, 0x00, 0x09, 0x0A, 0x87), 0x87, 0xAA, 0x00, 0x09, 0x0A, 0x87),
PHYREGS(0x3808, 0x3408, 0x3008, 0xF201, 0xF301, 0xF401), PHYREGS(0x0838, 0x0834, 0x0830, 0x01F2, 0x01F3, 0x01F4),
}, },
{ .channel = 52, { .channel = 52,
.freq = 5260, /* MHz */ .freq = 5260, /* MHz */
@ -571,7 +571,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x0E, 0x0A, 0x98, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x0E, 0x0A, 0x98, 0x01, 0x04, 0x0A,
0x00, 0x8A, 0x66, 0x66, 0xAA, 0x00, 0x08, 0x09, 0x00, 0x8A, 0x66, 0x66, 0xAA, 0x00, 0x08, 0x09,
0x87, 0xAA, 0x00, 0x08, 0x09, 0x87), 0x87, 0xAA, 0x00, 0x08, 0x09, 0x87),
PHYREGS(0x3C08, 0x3808, 0x3408, 0xF101, 0xF201, 0xF301), PHYREGS(0x083C, 0x0838, 0x0834, 0x01F1, 0x01F2, 0x01F3),
}, },
{ .channel = 54, { .channel = 54,
.freq = 5270, /* MHz */ .freq = 5270, /* MHz */
@ -579,7 +579,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x0F, 0x0A, 0x98, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x0F, 0x0A, 0x98, 0x01, 0x04, 0x0A,
0x00, 0x8A, 0x66, 0x66, 0xAA, 0x00, 0x08, 0x09, 0x00, 0x8A, 0x66, 0x66, 0xAA, 0x00, 0x08, 0x09,
0x87, 0xAA, 0x00, 0x08, 0x09, 0x87), 0x87, 0xAA, 0x00, 0x08, 0x09, 0x87),
PHYREGS(0x4008, 0x3C08, 0x3808, 0xF001, 0xF101, 0xF201), PHYREGS(0x0840, 0x083C, 0x0838, 0x01F0, 0x01F1, 0x01F2),
}, },
{ .channel = 56, { .channel = 56,
.freq = 5280, /* MHz */ .freq = 5280, /* MHz */
@ -587,7 +587,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x10, 0x09, 0x91, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x10, 0x09, 0x91, 0x01, 0x04, 0x0A,
0x00, 0x89, 0x66, 0x66, 0x99, 0x00, 0x08, 0x08, 0x00, 0x89, 0x66, 0x66, 0x99, 0x00, 0x08, 0x08,
0x86, 0x99, 0x00, 0x08, 0x08, 0x86), 0x86, 0x99, 0x00, 0x08, 0x08, 0x86),
PHYREGS(0x4408, 0x4008, 0x3C08, 0xF001, 0xF001, 0xF101), PHYREGS(0x0844, 0x0840, 0x083C, 0x01F0, 0x01F0, 0x01F1),
}, },
{ .channel = 58, { .channel = 58,
.freq = 5290, /* MHz */ .freq = 5290, /* MHz */
@ -595,7 +595,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x11, 0x09, 0x91, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x11, 0x09, 0x91, 0x01, 0x04, 0x0A,
0x00, 0x89, 0x66, 0x66, 0x99, 0x00, 0x08, 0x08, 0x00, 0x89, 0x66, 0x66, 0x99, 0x00, 0x08, 0x08,
0x86, 0x99, 0x00, 0x08, 0x08, 0x86), 0x86, 0x99, 0x00, 0x08, 0x08, 0x86),
PHYREGS(0x4808, 0x4408, 0x4008, 0xEF01, 0xF001, 0xF001), PHYREGS(0x0848, 0x0844, 0x0840, 0x01EF, 0x01F0, 0x01F0),
}, },
{ .channel = 60, { .channel = 60,
.freq = 5300, /* MHz */ .freq = 5300, /* MHz */
@ -603,7 +603,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x12, 0x09, 0x8A, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x12, 0x09, 0x8A, 0x01, 0x04, 0x0A,
0x00, 0x89, 0x55, 0x55, 0x99, 0x00, 0x08, 0x07, 0x00, 0x89, 0x55, 0x55, 0x99, 0x00, 0x08, 0x07,
0x85, 0x99, 0x00, 0x08, 0x07, 0x85), 0x85, 0x99, 0x00, 0x08, 0x07, 0x85),
PHYREGS(0x4C08, 0x4808, 0x4408, 0xEE01, 0xEF01, 0xF001), PHYREGS(0x084C, 0x0848, 0x0844, 0x01EE, 0x01EF, 0x01F0),
}, },
{ .channel = 62, { .channel = 62,
.freq = 5310, /* MHz */ .freq = 5310, /* MHz */
@ -611,7 +611,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x13, 0x09, 0x8A, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x13, 0x09, 0x8A, 0x01, 0x04, 0x0A,
0x00, 0x89, 0x55, 0x55, 0x99, 0x00, 0x08, 0x07, 0x00, 0x89, 0x55, 0x55, 0x99, 0x00, 0x08, 0x07,
0x85, 0x99, 0x00, 0x08, 0x07, 0x85), 0x85, 0x99, 0x00, 0x08, 0x07, 0x85),
PHYREGS(0x5008, 0x4C08, 0x4808, 0xED01, 0xEE01, 0xEF01), PHYREGS(0x0850, 0x084C, 0x0848, 0x01ED, 0x01EE, 0x01EF),
}, },
{ .channel = 64, { .channel = 64,
.freq = 5320, /* MHz */ .freq = 5320, /* MHz */
@ -619,7 +619,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x14, 0x09, 0x83, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x14, 0x09, 0x83, 0x01, 0x04, 0x0A,
0x00, 0x88, 0x55, 0x55, 0x88, 0x00, 0x07, 0x07, 0x00, 0x88, 0x55, 0x55, 0x88, 0x00, 0x07, 0x07,
0x84, 0x88, 0x00, 0x07, 0x07, 0x84), 0x84, 0x88, 0x00, 0x07, 0x07, 0x84),
PHYREGS(0x5408, 0x5008, 0x4C08, 0xEC01, 0xED01, 0xEE01), PHYREGS(0x0854, 0x0850, 0x084C, 0x01EC, 0x01ED, 0x01EE),
}, },
{ .channel = 66, { .channel = 66,
.freq = 5330, /* MHz */ .freq = 5330, /* MHz */
@ -627,7 +627,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x15, 0x09, 0x83, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x15, 0x09, 0x83, 0x01, 0x04, 0x0A,
0x00, 0x88, 0x55, 0x55, 0x88, 0x00, 0x07, 0x07, 0x00, 0x88, 0x55, 0x55, 0x88, 0x00, 0x07, 0x07,
0x84, 0x88, 0x00, 0x07, 0x07, 0x84), 0x84, 0x88, 0x00, 0x07, 0x07, 0x84),
PHYREGS(0x5808, 0x5408, 0x5008, 0xEB01, 0xEC01, 0xED01), PHYREGS(0x0858, 0x0854, 0x0850, 0x01EB, 0x01EC, 0x01ED),
}, },
{ .channel = 68, { .channel = 68,
.freq = 5340, /* MHz */ .freq = 5340, /* MHz */
@ -635,7 +635,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x16, 0x08, 0x7C, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x16, 0x08, 0x7C, 0x01, 0x04, 0x0A,
0x00, 0x88, 0x44, 0x44, 0x88, 0x00, 0x07, 0x06, 0x00, 0x88, 0x44, 0x44, 0x88, 0x00, 0x07, 0x06,
0x84, 0x88, 0x00, 0x07, 0x06, 0x84), 0x84, 0x88, 0x00, 0x07, 0x06, 0x84),
PHYREGS(0x5C08, 0x5808, 0x5408, 0xEA01, 0xEB01, 0xEC01), PHYREGS(0x085C, 0x0858, 0x0854, 0x01EA, 0x01EB, 0x01EC),
}, },
{ .channel = 70, { .channel = 70,
.freq = 5350, /* MHz */ .freq = 5350, /* MHz */
@ -643,7 +643,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x17, 0x08, 0x7C, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x17, 0x08, 0x7C, 0x01, 0x04, 0x0A,
0x00, 0x88, 0x44, 0x44, 0x88, 0x00, 0x07, 0x06, 0x00, 0x88, 0x44, 0x44, 0x88, 0x00, 0x07, 0x06,
0x84, 0x88, 0x00, 0x07, 0x06, 0x84), 0x84, 0x88, 0x00, 0x07, 0x06, 0x84),
PHYREGS(0x6008, 0x5C08, 0x5808, 0xE901, 0xEA01, 0xEB01), PHYREGS(0x0860, 0x085C, 0x0858, 0x01E9, 0x01EA, 0x01EB),
}, },
{ .channel = 72, { .channel = 72,
.freq = 5360, /* MHz */ .freq = 5360, /* MHz */
@ -651,7 +651,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x18, 0x08, 0x75, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x18, 0x08, 0x75, 0x01, 0x04, 0x0A,
0x00, 0x87, 0x44, 0x44, 0x77, 0x00, 0x06, 0x05, 0x00, 0x87, 0x44, 0x44, 0x77, 0x00, 0x06, 0x05,
0x83, 0x77, 0x00, 0x06, 0x05, 0x83), 0x83, 0x77, 0x00, 0x06, 0x05, 0x83),
PHYREGS(0x6408, 0x6008, 0x5C08, 0xE801, 0xE901, 0xEA01), PHYREGS(0x0864, 0x0860, 0x085C, 0x01E8, 0x01E9, 0x01EA),
}, },
{ .channel = 74, { .channel = 74,
.freq = 5370, /* MHz */ .freq = 5370, /* MHz */
@ -659,7 +659,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x19, 0x08, 0x75, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x19, 0x08, 0x75, 0x01, 0x04, 0x0A,
0x00, 0x87, 0x44, 0x44, 0x77, 0x00, 0x06, 0x05, 0x00, 0x87, 0x44, 0x44, 0x77, 0x00, 0x06, 0x05,
0x83, 0x77, 0x00, 0x06, 0x05, 0x83), 0x83, 0x77, 0x00, 0x06, 0x05, 0x83),
PHYREGS(0x6808, 0x6408, 0x6008, 0xE701, 0xE801, 0xE901), PHYREGS(0x0868, 0x0864, 0x0860, 0x01E7, 0x01E8, 0x01E9),
}, },
{ .channel = 76, { .channel = 76,
.freq = 5380, /* MHz */ .freq = 5380, /* MHz */
@ -667,7 +667,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x1A, 0x08, 0x6E, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x1A, 0x08, 0x6E, 0x01, 0x04, 0x0A,
0x00, 0x87, 0x33, 0x33, 0x77, 0x00, 0x06, 0x04, 0x00, 0x87, 0x33, 0x33, 0x77, 0x00, 0x06, 0x04,
0x82, 0x77, 0x00, 0x06, 0x04, 0x82), 0x82, 0x77, 0x00, 0x06, 0x04, 0x82),
PHYREGS(0x6C08, 0x6808, 0x6408, 0xE601, 0xE701, 0xE801), PHYREGS(0x086C, 0x0868, 0x0864, 0x01E6, 0x01E7, 0x01E8),
}, },
{ .channel = 78, { .channel = 78,
.freq = 5390, /* MHz */ .freq = 5390, /* MHz */
@ -675,7 +675,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x1B, 0x08, 0x6E, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x1B, 0x08, 0x6E, 0x01, 0x04, 0x0A,
0x00, 0x87, 0x33, 0x33, 0x77, 0x00, 0x06, 0x04, 0x00, 0x87, 0x33, 0x33, 0x77, 0x00, 0x06, 0x04,
0x82, 0x77, 0x00, 0x06, 0x04, 0x82), 0x82, 0x77, 0x00, 0x06, 0x04, 0x82),
PHYREGS(0x7008, 0x6C08, 0x6808, 0xE501, 0xE601, 0xE701), PHYREGS(0x0870, 0x086C, 0x0868, 0x01E5, 0x01E6, 0x01E7),
}, },
{ .channel = 80, { .channel = 80,
.freq = 5400, /* MHz */ .freq = 5400, /* MHz */
@ -683,7 +683,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x1C, 0x07, 0x67, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x1C, 0x07, 0x67, 0x01, 0x04, 0x0A,
0x00, 0x86, 0x33, 0x33, 0x66, 0x00, 0x05, 0x04, 0x00, 0x86, 0x33, 0x33, 0x66, 0x00, 0x05, 0x04,
0x81, 0x66, 0x00, 0x05, 0x04, 0x81), 0x81, 0x66, 0x00, 0x05, 0x04, 0x81),
PHYREGS(0x7408, 0x7008, 0x6C08, 0xE501, 0xE501, 0xE601), PHYREGS(0x0874, 0x0870, 0x086C, 0x01E5, 0x01E5, 0x01E6),
}, },
{ .channel = 82, { .channel = 82,
.freq = 5410, /* MHz */ .freq = 5410, /* MHz */
@ -691,7 +691,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x1D, 0x07, 0x67, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x1D, 0x07, 0x67, 0x01, 0x04, 0x0A,
0x00, 0x86, 0x33, 0x33, 0x66, 0x00, 0x05, 0x04, 0x00, 0x86, 0x33, 0x33, 0x66, 0x00, 0x05, 0x04,
0x81, 0x66, 0x00, 0x05, 0x04, 0x81), 0x81, 0x66, 0x00, 0x05, 0x04, 0x81),
PHYREGS(0x7808, 0x7408, 0x7008, 0xE401, 0xE501, 0xE501), PHYREGS(0x0878, 0x0874, 0x0870, 0x01E4, 0x01E5, 0x01E5),
}, },
{ .channel = 84, { .channel = 84,
.freq = 5420, /* MHz */ .freq = 5420, /* MHz */
@ -699,7 +699,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x1E, 0x07, 0x61, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x1E, 0x07, 0x61, 0x01, 0x04, 0x0A,
0x00, 0x86, 0x22, 0x22, 0x66, 0x00, 0x05, 0x03, 0x00, 0x86, 0x22, 0x22, 0x66, 0x00, 0x05, 0x03,
0x80, 0x66, 0x00, 0x05, 0x03, 0x80), 0x80, 0x66, 0x00, 0x05, 0x03, 0x80),
PHYREGS(0x7C08, 0x7808, 0x7408, 0xE301, 0xE401, 0xE501), PHYREGS(0x087C, 0x0878, 0x0874, 0x01E3, 0x01E4, 0x01E5),
}, },
{ .channel = 86, { .channel = 86,
.freq = 5430, /* MHz */ .freq = 5430, /* MHz */
@ -707,7 +707,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x1F, 0x07, 0x61, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x1F, 0x07, 0x61, 0x01, 0x04, 0x0A,
0x00, 0x86, 0x22, 0x22, 0x66, 0x00, 0x05, 0x03, 0x00, 0x86, 0x22, 0x22, 0x66, 0x00, 0x05, 0x03,
0x80, 0x66, 0x00, 0x05, 0x03, 0x80), 0x80, 0x66, 0x00, 0x05, 0x03, 0x80),
PHYREGS(0x8008, 0x7C08, 0x7808, 0xE201, 0xE301, 0xE401), PHYREGS(0x0880, 0x087C, 0x0878, 0x01E2, 0x01E3, 0x01E4),
}, },
{ .channel = 88, { .channel = 88,
.freq = 5440, /* MHz */ .freq = 5440, /* MHz */
@ -715,7 +715,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x20, 0x07, 0x5A, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x20, 0x07, 0x5A, 0x01, 0x04, 0x0A,
0x00, 0x85, 0x22, 0x22, 0x55, 0x00, 0x04, 0x02, 0x00, 0x85, 0x22, 0x22, 0x55, 0x00, 0x04, 0x02,
0x80, 0x55, 0x00, 0x04, 0x02, 0x80), 0x80, 0x55, 0x00, 0x04, 0x02, 0x80),
PHYREGS(0x8408, 0x8008, 0x7C08, 0xE101, 0xE201, 0xE301), PHYREGS(0x0884, 0x0880, 0x087C, 0x01E1, 0x01E2, 0x01E3),
}, },
{ .channel = 90, { .channel = 90,
.freq = 5450, /* MHz */ .freq = 5450, /* MHz */
@ -723,7 +723,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x21, 0x07, 0x5A, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x21, 0x07, 0x5A, 0x01, 0x04, 0x0A,
0x00, 0x85, 0x22, 0x22, 0x55, 0x00, 0x04, 0x02, 0x00, 0x85, 0x22, 0x22, 0x55, 0x00, 0x04, 0x02,
0x80, 0x55, 0x00, 0x04, 0x02, 0x80), 0x80, 0x55, 0x00, 0x04, 0x02, 0x80),
PHYREGS(0x8808, 0x8408, 0x8008, 0xE001, 0xE101, 0xE201), PHYREGS(0x0888, 0x0884, 0x0880, 0x01E0, 0x01E1, 0x01E2),
}, },
{ .channel = 92, { .channel = 92,
.freq = 5460, /* MHz */ .freq = 5460, /* MHz */
@ -731,7 +731,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x22, 0x06, 0x53, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x22, 0x06, 0x53, 0x01, 0x04, 0x0A,
0x00, 0x85, 0x11, 0x11, 0x55, 0x00, 0x04, 0x01, 0x00, 0x85, 0x11, 0x11, 0x55, 0x00, 0x04, 0x01,
0x80, 0x55, 0x00, 0x04, 0x01, 0x80), 0x80, 0x55, 0x00, 0x04, 0x01, 0x80),
PHYREGS(0x8C08, 0x8808, 0x8408, 0xDF01, 0xE001, 0xE101), PHYREGS(0x088C, 0x0888, 0x0884, 0x01DF, 0x01E0, 0x01E1),
}, },
{ .channel = 94, { .channel = 94,
.freq = 5470, /* MHz */ .freq = 5470, /* MHz */
@ -739,7 +739,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x23, 0x06, 0x53, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x23, 0x06, 0x53, 0x01, 0x04, 0x0A,
0x00, 0x85, 0x11, 0x11, 0x55, 0x00, 0x04, 0x01, 0x00, 0x85, 0x11, 0x11, 0x55, 0x00, 0x04, 0x01,
0x80, 0x55, 0x00, 0x04, 0x01, 0x80), 0x80, 0x55, 0x00, 0x04, 0x01, 0x80),
PHYREGS(0x9008, 0x8C08, 0x8808, 0xDE01, 0xDF01, 0xE001), PHYREGS(0x0890, 0x088C, 0x0888, 0x01DE, 0x01DF, 0x01E0),
}, },
{ .channel = 96, { .channel = 96,
.freq = 5480, /* MHz */ .freq = 5480, /* MHz */
@ -747,7 +747,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x24, 0x06, 0x4D, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x24, 0x06, 0x4D, 0x01, 0x04, 0x0A,
0x00, 0x84, 0x11, 0x11, 0x44, 0x00, 0x03, 0x00, 0x00, 0x84, 0x11, 0x11, 0x44, 0x00, 0x03, 0x00,
0x80, 0x44, 0x00, 0x03, 0x00, 0x80), 0x80, 0x44, 0x00, 0x03, 0x00, 0x80),
PHYREGS(0x9408, 0x9008, 0x8C08, 0xDD01, 0xDE01, 0xDF01), PHYREGS(0x0894, 0x0890, 0x088C, 0x01DD, 0x01DE, 0x01DF),
}, },
{ .channel = 98, { .channel = 98,
.freq = 5490, /* MHz */ .freq = 5490, /* MHz */
@ -755,7 +755,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x25, 0x06, 0x4D, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x25, 0x06, 0x4D, 0x01, 0x04, 0x0A,
0x00, 0x84, 0x11, 0x11, 0x44, 0x00, 0x03, 0x00, 0x00, 0x84, 0x11, 0x11, 0x44, 0x00, 0x03, 0x00,
0x80, 0x44, 0x00, 0x03, 0x00, 0x80), 0x80, 0x44, 0x00, 0x03, 0x00, 0x80),
PHYREGS(0x9808, 0x9408, 0x9008, 0xDD01, 0xDD01, 0xDE01), PHYREGS(0x0898, 0x0894, 0x0890, 0x01DD, 0x01DD, 0x01DE),
}, },
{ .channel = 100, { .channel = 100,
.freq = 5500, /* MHz */ .freq = 5500, /* MHz */
@ -763,7 +763,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x26, 0x06, 0x47, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x26, 0x06, 0x47, 0x01, 0x04, 0x0A,
0x00, 0x84, 0x00, 0x00, 0x44, 0x00, 0x03, 0x00, 0x00, 0x84, 0x00, 0x00, 0x44, 0x00, 0x03, 0x00,
0x80, 0x44, 0x00, 0x03, 0x00, 0x80), 0x80, 0x44, 0x00, 0x03, 0x00, 0x80),
PHYREGS(0x9C08, 0x9808, 0x9408, 0xDC01, 0xDD01, 0xDD01), PHYREGS(0x089C, 0x0898, 0x0894, 0x01DC, 0x01DD, 0x01DD),
}, },
{ .channel = 102, { .channel = 102,
.freq = 5510, /* MHz */ .freq = 5510, /* MHz */
@ -771,7 +771,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x27, 0x06, 0x47, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x27, 0x06, 0x47, 0x01, 0x04, 0x0A,
0x00, 0x84, 0x00, 0x00, 0x44, 0x00, 0x03, 0x00, 0x00, 0x84, 0x00, 0x00, 0x44, 0x00, 0x03, 0x00,
0x80, 0x44, 0x00, 0x03, 0x00, 0x80), 0x80, 0x44, 0x00, 0x03, 0x00, 0x80),
PHYREGS(0xA008, 0x9C08, 0x9808, 0xDB01, 0xDC01, 0xDD01), PHYREGS(0x08A0, 0x089C, 0x0898, 0x01DB, 0x01DC, 0x01DD),
}, },
{ .channel = 104, { .channel = 104,
.freq = 5520, /* MHz */ .freq = 5520, /* MHz */
@ -779,7 +779,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x28, 0x05, 0x40, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x28, 0x05, 0x40, 0x01, 0x04, 0x0A,
0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00, 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00,
0x80, 0x33, 0x00, 0x02, 0x00, 0x80), 0x80, 0x33, 0x00, 0x02, 0x00, 0x80),
PHYREGS(0xA408, 0xA008, 0x9C08, 0xDA01, 0xDB01, 0xDC01), PHYREGS(0x08A4, 0x08A0, 0x089C, 0x01DA, 0x01DB, 0x01DC),
}, },
{ .channel = 106, { .channel = 106,
.freq = 5530, /* MHz */ .freq = 5530, /* MHz */
@ -787,7 +787,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x29, 0x05, 0x40, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x29, 0x05, 0x40, 0x01, 0x04, 0x0A,
0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00, 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00,
0x80, 0x33, 0x00, 0x02, 0x00, 0x80), 0x80, 0x33, 0x00, 0x02, 0x00, 0x80),
PHYREGS(0xA808, 0xA408, 0xA008, 0xD901, 0xDA01, 0xDB01), PHYREGS(0x08A8, 0x08A4, 0x08A0, 0x01D9, 0x01DA, 0x01DB),
}, },
{ .channel = 108, { .channel = 108,
.freq = 5540, /* MHz */ .freq = 5540, /* MHz */
@ -795,7 +795,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x2A, 0x05, 0x3A, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x2A, 0x05, 0x3A, 0x01, 0x04, 0x0A,
0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00, 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00,
0x80, 0x33, 0x00, 0x02, 0x00, 0x80), 0x80, 0x33, 0x00, 0x02, 0x00, 0x80),
PHYREGS(0xAC08, 0xA808, 0xA408, 0xD801, 0xD901, 0xDA01), PHYREGS(0x08AC, 0x08A8, 0x08A4, 0x01D8, 0x01D9, 0x01DA),
}, },
{ .channel = 110, { .channel = 110,
.freq = 5550, /* MHz */ .freq = 5550, /* MHz */
@ -803,7 +803,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x2B, 0x05, 0x3A, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x2B, 0x05, 0x3A, 0x01, 0x04, 0x0A,
0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00, 0x00, 0x83, 0x00, 0x00, 0x33, 0x00, 0x02, 0x00,
0x80, 0x33, 0x00, 0x02, 0x00, 0x80), 0x80, 0x33, 0x00, 0x02, 0x00, 0x80),
PHYREGS(0xB008, 0xAC08, 0xA808, 0xD701, 0xD801, 0xD901), PHYREGS(0x08B0, 0x08AC, 0x08A8, 0x01D7, 0x01D8, 0x01D9),
}, },
{ .channel = 112, { .channel = 112,
.freq = 5560, /* MHz */ .freq = 5560, /* MHz */
@ -811,7 +811,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x2C, 0x05, 0x34, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x2C, 0x05, 0x34, 0x01, 0x04, 0x0A,
0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00, 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00,
0x80, 0x22, 0x00, 0x01, 0x00, 0x80), 0x80, 0x22, 0x00, 0x01, 0x00, 0x80),
PHYREGS(0xB408, 0xB008, 0xAC08, 0xD701, 0xD701, 0xD801), PHYREGS(0x08B4, 0x08B0, 0x08AC, 0x01D7, 0x01D7, 0x01D8),
}, },
{ .channel = 114, { .channel = 114,
.freq = 5570, /* MHz */ .freq = 5570, /* MHz */
@ -819,7 +819,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x2D, 0x05, 0x34, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x2D, 0x05, 0x34, 0x01, 0x04, 0x0A,
0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00, 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00,
0x80, 0x22, 0x00, 0x01, 0x00, 0x80), 0x80, 0x22, 0x00, 0x01, 0x00, 0x80),
PHYREGS(0xB808, 0xB408, 0xB008, 0xD601, 0xD701, 0xD701), PHYREGS(0x08B8, 0x08B4, 0x08B0, 0x01D6, 0x01D7, 0x01D7),
}, },
{ .channel = 116, { .channel = 116,
.freq = 5580, /* MHz */ .freq = 5580, /* MHz */
@ -827,7 +827,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x2E, 0x04, 0x2E, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x2E, 0x04, 0x2E, 0x01, 0x04, 0x0A,
0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00, 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00,
0x80, 0x22, 0x00, 0x01, 0x00, 0x80), 0x80, 0x22, 0x00, 0x01, 0x00, 0x80),
PHYREGS(0xBC08, 0xB808, 0xB408, 0xD501, 0xD601, 0xD701), PHYREGS(0x08BC, 0x08B8, 0x08B4, 0x01D5, 0x01D6, 0x01D7),
}, },
{ .channel = 118, { .channel = 118,
.freq = 5590, /* MHz */ .freq = 5590, /* MHz */
@ -835,7 +835,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x2F, 0x04, 0x2E, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x2F, 0x04, 0x2E, 0x01, 0x04, 0x0A,
0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00, 0x00, 0x82, 0x00, 0x00, 0x22, 0x00, 0x01, 0x00,
0x80, 0x22, 0x00, 0x01, 0x00, 0x80), 0x80, 0x22, 0x00, 0x01, 0x00, 0x80),
PHYREGS(0xC008, 0xBC08, 0xB808, 0xD401, 0xD501, 0xD601), PHYREGS(0x08C0, 0x08BC, 0x08B8, 0x01D4, 0x01D5, 0x01D6),
}, },
{ .channel = 120, { .channel = 120,
.freq = 5600, /* MHz */ .freq = 5600, /* MHz */
@ -843,7 +843,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x30, 0x04, 0x28, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x30, 0x04, 0x28, 0x01, 0x04, 0x0A,
0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x01, 0x00, 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x01, 0x00,
0x80, 0x11, 0x00, 0x01, 0x00, 0x80), 0x80, 0x11, 0x00, 0x01, 0x00, 0x80),
PHYREGS(0xC408, 0xC008, 0xBC08, 0xD301, 0xD401, 0xD501), PHYREGS(0x08C4, 0x08C0, 0x08BC, 0x01D3, 0x01D4, 0x01D5),
}, },
{ .channel = 122, { .channel = 122,
.freq = 5610, /* MHz */ .freq = 5610, /* MHz */
@ -851,7 +851,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x31, 0x04, 0x28, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x31, 0x04, 0x28, 0x01, 0x04, 0x0A,
0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x01, 0x00, 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x01, 0x00,
0x80, 0x11, 0x00, 0x01, 0x00, 0x80), 0x80, 0x11, 0x00, 0x01, 0x00, 0x80),
PHYREGS(0xC808, 0xC408, 0xC008, 0xD201, 0xD301, 0xD401), PHYREGS(0x08C8, 0x08C4, 0x08C0, 0x01D2, 0x01D3, 0x01D4),
}, },
{ .channel = 124, { .channel = 124,
.freq = 5620, /* MHz */ .freq = 5620, /* MHz */
@ -859,7 +859,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x32, 0x04, 0x21, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x32, 0x04, 0x21, 0x01, 0x04, 0x0A,
0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00,
0x80, 0x11, 0x00, 0x00, 0x00, 0x80), 0x80, 0x11, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0xCC08, 0xC808, 0xC408, 0xD201, 0xD201, 0xD301), PHYREGS(0x08CC, 0x08C8, 0x08C4, 0x01D2, 0x01D2, 0x01D3),
}, },
{ .channel = 126, { .channel = 126,
.freq = 5630, /* MHz */ .freq = 5630, /* MHz */
@ -867,7 +867,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x33, 0x04, 0x21, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x33, 0x04, 0x21, 0x01, 0x04, 0x0A,
0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x81, 0x00, 0x00, 0x11, 0x00, 0x00, 0x00,
0x80, 0x11, 0x00, 0x00, 0x00, 0x80), 0x80, 0x11, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0xD008, 0xCC08, 0xC808, 0xD101, 0xD201, 0xD201), PHYREGS(0x08D0, 0x08CC, 0x08C8, 0x01D1, 0x01D2, 0x01D2),
}, },
{ .channel = 128, { .channel = 128,
.freq = 5640, /* MHz */ .freq = 5640, /* MHz */
@ -875,7 +875,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x34, 0x03, 0x1C, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x34, 0x03, 0x1C, 0x01, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0xD408, 0xD008, 0xCC08, 0xD001, 0xD101, 0xD201), PHYREGS(0x08D4, 0x08D0, 0x08CC, 0x01D0, 0x01D1, 0x01D2),
}, },
{ .channel = 130, { .channel = 130,
.freq = 5650, /* MHz */ .freq = 5650, /* MHz */
@ -883,7 +883,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x35, 0x03, 0x1C, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x35, 0x03, 0x1C, 0x01, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0xD808, 0xD408, 0xD008, 0xCF01, 0xD001, 0xD101), PHYREGS(0x08D8, 0x08D4, 0x08D0, 0x01CF, 0x01D0, 0x01D1),
}, },
{ .channel = 132, { .channel = 132,
.freq = 5660, /* MHz */ .freq = 5660, /* MHz */
@ -891,7 +891,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x36, 0x03, 0x16, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x36, 0x03, 0x16, 0x01, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0xDC08, 0xD808, 0xD408, 0xCE01, 0xCF01, 0xD001), PHYREGS(0x08DC, 0x08D8, 0x08D4, 0x01CE, 0x01CF, 0x01D0),
}, },
{ .channel = 134, { .channel = 134,
.freq = 5670, /* MHz */ .freq = 5670, /* MHz */
@ -899,7 +899,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x37, 0x03, 0x16, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x37, 0x03, 0x16, 0x01, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0xE008, 0xDC08, 0xD808, 0xCE01, 0xCE01, 0xCF01), PHYREGS(0x08E0, 0x08DC, 0x08D8, 0x01CE, 0x01CE, 0x01CF),
}, },
{ .channel = 136, { .channel = 136,
.freq = 5680, /* MHz */ .freq = 5680, /* MHz */
@ -907,7 +907,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x38, 0x03, 0x10, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x38, 0x03, 0x10, 0x01, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0xE408, 0xE008, 0xDC08, 0xCD01, 0xCE01, 0xCE01), PHYREGS(0x08E4, 0x08E0, 0x08DC, 0x01CD, 0x01CE, 0x01CE),
}, },
{ .channel = 138, { .channel = 138,
.freq = 5690, /* MHz */ .freq = 5690, /* MHz */
@ -915,7 +915,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x39, 0x03, 0x10, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x39, 0x03, 0x10, 0x01, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0xE808, 0xE408, 0xE008, 0xCC01, 0xCD01, 0xCE01), PHYREGS(0x08E8, 0x08E4, 0x08E0, 0x01CC, 0x01CD, 0x01CE),
}, },
{ .channel = 140, { .channel = 140,
.freq = 5700, /* MHz */ .freq = 5700, /* MHz */
@ -923,7 +923,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x3A, 0x02, 0x0A, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x3A, 0x02, 0x0A, 0x01, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0xEC08, 0xE808, 0xE408, 0xCB01, 0xCC01, 0xCD01), PHYREGS(0x08EC, 0x08E8, 0x08E4, 0x01CB, 0x01CC, 0x01CD),
}, },
{ .channel = 142, { .channel = 142,
.freq = 5710, /* MHz */ .freq = 5710, /* MHz */
@ -931,7 +931,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x3B, 0x02, 0x0A, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x3B, 0x02, 0x0A, 0x01, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0xF008, 0xEC08, 0xE808, 0xCA01, 0xCB01, 0xCC01), PHYREGS(0x08F0, 0x08EC, 0x08E8, 0x01CA, 0x01CB, 0x01CC),
}, },
{ .channel = 144, { .channel = 144,
.freq = 5720, /* MHz */ .freq = 5720, /* MHz */
@ -939,7 +939,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x3C, 0x02, 0x0A, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x3C, 0x02, 0x0A, 0x01, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0xF408, 0xF008, 0xEC08, 0xC901, 0xCA01, 0xCB01), PHYREGS(0x08F4, 0x08F0, 0x08EC, 0x01C9, 0x01CA, 0x01CB),
}, },
{ .channel = 145, { .channel = 145,
.freq = 5725, /* MHz */ .freq = 5725, /* MHz */
@ -947,7 +947,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x72, 0x04, 0x79, 0x02, 0x03, 0x01, 0x03, 0x14, RADIOREGS(0x72, 0x04, 0x79, 0x02, 0x03, 0x01, 0x03, 0x14,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0xF608, 0xF208, 0xEE08, 0xC901, 0xCA01, 0xCB01), PHYREGS(0x08F6, 0x08F2, 0x08EE, 0x01C9, 0x01CA, 0x01CB),
}, },
{ .channel = 146, { .channel = 146,
.freq = 5730, /* MHz */ .freq = 5730, /* MHz */
@ -955,7 +955,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x3D, 0x02, 0x0A, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x3D, 0x02, 0x0A, 0x01, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0xF808, 0xF408, 0xF008, 0xC901, 0xC901, 0xCA01), PHYREGS(0x08F8, 0x08F4, 0x08F0, 0x01C9, 0x01C9, 0x01CA),
}, },
{ .channel = 147, { .channel = 147,
.freq = 5735, /* MHz */ .freq = 5735, /* MHz */
@ -963,7 +963,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x72, 0x04, 0x7B, 0x02, 0x03, 0x01, 0x03, 0x14, RADIOREGS(0x72, 0x04, 0x7B, 0x02, 0x03, 0x01, 0x03, 0x14,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0xFA08, 0xF608, 0xF208, 0xC801, 0xC901, 0xCA01), PHYREGS(0x08FA, 0x08F6, 0x08F2, 0x01C8, 0x01C9, 0x01CA),
}, },
{ .channel = 148, { .channel = 148,
.freq = 5740, /* MHz */ .freq = 5740, /* MHz */
@ -971,7 +971,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x3E, 0x02, 0x0A, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x3E, 0x02, 0x0A, 0x01, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0xFC08, 0xF808, 0xF408, 0xC801, 0xC901, 0xC901), PHYREGS(0x08FC, 0x08F8, 0x08F4, 0x01C8, 0x01C9, 0x01C9),
}, },
{ .channel = 149, { .channel = 149,
.freq = 5745, /* MHz */ .freq = 5745, /* MHz */
@ -979,7 +979,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x72, 0x04, 0x7D, 0x02, 0xFE, 0x00, 0x03, 0x14, RADIOREGS(0x72, 0x04, 0x7D, 0x02, 0xFE, 0x00, 0x03, 0x14,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0xFE08, 0xFA08, 0xF608, 0xC801, 0xC801, 0xC901), PHYREGS(0x08FE, 0x08FA, 0x08F6, 0x01C8, 0x01C8, 0x01C9),
}, },
{ .channel = 150, { .channel = 150,
.freq = 5750, /* MHz */ .freq = 5750, /* MHz */
@ -987,7 +987,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x3F, 0x02, 0x0A, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x3F, 0x02, 0x0A, 0x01, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x0009, 0xFC08, 0xF808, 0xC701, 0xC801, 0xC901), PHYREGS(0x0900, 0x08FC, 0x08F8, 0x01C7, 0x01C8, 0x01C9),
}, },
{ .channel = 151, { .channel = 151,
.freq = 5755, /* MHz */ .freq = 5755, /* MHz */
@ -995,7 +995,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x72, 0x04, 0x7F, 0x02, 0xFE, 0x00, 0x03, 0x14, RADIOREGS(0x72, 0x04, 0x7F, 0x02, 0xFE, 0x00, 0x03, 0x14,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x0209, 0xFE08, 0xFA08, 0xC701, 0xC801, 0xC801), PHYREGS(0x0902, 0x08FE, 0x08FA, 0x01C7, 0x01C8, 0x01C8),
}, },
{ .channel = 152, { .channel = 152,
.freq = 5760, /* MHz */ .freq = 5760, /* MHz */
@ -1003,7 +1003,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x40, 0x02, 0x0A, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x40, 0x02, 0x0A, 0x01, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x0409, 0x0009, 0xFC08, 0xC601, 0xC701, 0xC801), PHYREGS(0x0904, 0x0900, 0x08FC, 0x01C6, 0x01C7, 0x01C8),
}, },
{ .channel = 153, { .channel = 153,
.freq = 5765, /* MHz */ .freq = 5765, /* MHz */
@ -1011,7 +1011,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x72, 0x04, 0x81, 0x02, 0xF8, 0x00, 0x03, 0x14, RADIOREGS(0x72, 0x04, 0x81, 0x02, 0xF8, 0x00, 0x03, 0x14,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x0609, 0x0209, 0xFE08, 0xC601, 0xC701, 0xC801), PHYREGS(0x0906, 0x0902, 0x08FE, 0x01C6, 0x01C7, 0x01C8),
}, },
{ .channel = 154, { .channel = 154,
.freq = 5770, /* MHz */ .freq = 5770, /* MHz */
@ -1019,7 +1019,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x41, 0x02, 0x0A, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x41, 0x02, 0x0A, 0x01, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x0809, 0x0409, 0x0009, 0xC601, 0xC601, 0xC701), PHYREGS(0x0908, 0x0904, 0x0900, 0x01C6, 0x01C6, 0x01C7),
}, },
{ .channel = 155, { .channel = 155,
.freq = 5775, /* MHz */ .freq = 5775, /* MHz */
@ -1027,7 +1027,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x72, 0x04, 0x83, 0x02, 0xF8, 0x00, 0x03, 0x14, RADIOREGS(0x72, 0x04, 0x83, 0x02, 0xF8, 0x00, 0x03, 0x14,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x0A09, 0x0609, 0x0209, 0xC501, 0xC601, 0xC701), PHYREGS(0x090A, 0x0906, 0x0902, 0x01C5, 0x01C6, 0x01C7),
}, },
{ .channel = 156, { .channel = 156,
.freq = 5780, /* MHz */ .freq = 5780, /* MHz */
@ -1035,7 +1035,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x42, 0x02, 0x0A, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x42, 0x02, 0x0A, 0x01, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x0C09, 0x0809, 0x0409, 0xC501, 0xC601, 0xC601), PHYREGS(0x090C, 0x0908, 0x0904, 0x01C5, 0x01C6, 0x01C6),
}, },
{ .channel = 157, { .channel = 157,
.freq = 5785, /* MHz */ .freq = 5785, /* MHz */
@ -1043,7 +1043,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x72, 0x04, 0x85, 0x02, 0xF2, 0x00, 0x03, 0x14, RADIOREGS(0x72, 0x04, 0x85, 0x02, 0xF2, 0x00, 0x03, 0x14,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x0E09, 0x0A09, 0x0609, 0xC401, 0xC501, 0xC601), PHYREGS(0x090E, 0x090A, 0x0906, 0x01C4, 0x01C5, 0x01C6),
}, },
{ .channel = 158, { .channel = 158,
.freq = 5790, /* MHz */ .freq = 5790, /* MHz */
@ -1051,7 +1051,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x43, 0x02, 0x0A, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x43, 0x02, 0x0A, 0x01, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x1009, 0x0C09, 0x0809, 0xC401, 0xC501, 0xC601), PHYREGS(0x0910, 0x090C, 0x0908, 0x01C4, 0x01C5, 0x01C6),
}, },
{ .channel = 159, { .channel = 159,
.freq = 5795, /* MHz */ .freq = 5795, /* MHz */
@ -1059,7 +1059,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x72, 0x04, 0x87, 0x02, 0xF2, 0x00, 0x03, 0x14, RADIOREGS(0x72, 0x04, 0x87, 0x02, 0xF2, 0x00, 0x03, 0x14,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x1209, 0x0E09, 0x0A09, 0xC401, 0xC401, 0xC501), PHYREGS(0x0912, 0x090E, 0x090A, 0x01C4, 0x01C4, 0x01C5),
}, },
{ .channel = 160, { .channel = 160,
.freq = 5800, /* MHz */ .freq = 5800, /* MHz */
@ -1067,7 +1067,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x44, 0x01, 0x0A, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x44, 0x01, 0x0A, 0x01, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x1409, 0x1009, 0x0C09, 0xC301, 0xC401, 0xC501), PHYREGS(0x0914, 0x0910, 0x090C, 0x01C3, 0x01C4, 0x01C5),
}, },
{ .channel = 161, { .channel = 161,
.freq = 5805, /* MHz */ .freq = 5805, /* MHz */
@ -1075,7 +1075,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x72, 0x04, 0x89, 0x01, 0xED, 0x00, 0x03, 0x14, RADIOREGS(0x72, 0x04, 0x89, 0x01, 0xED, 0x00, 0x03, 0x14,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x1609, 0x1209, 0x0E09, 0xC301, 0xC401, 0xC401), PHYREGS(0x0916, 0x0912, 0x090E, 0x01C3, 0x01C4, 0x01C4),
}, },
{ .channel = 162, { .channel = 162,
.freq = 5810, /* MHz */ .freq = 5810, /* MHz */
@ -1083,7 +1083,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x45, 0x01, 0x0A, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x45, 0x01, 0x0A, 0x01, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x1809, 0x1409, 0x1009, 0xC201, 0xC301, 0xC401), PHYREGS(0x0918, 0x0914, 0x0910, 0x01C2, 0x01C3, 0x01C4),
}, },
{ .channel = 163, { .channel = 163,
.freq = 5815, /* MHz */ .freq = 5815, /* MHz */
@ -1091,7 +1091,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x72, 0x04, 0x8B, 0x01, 0xED, 0x00, 0x03, 0x14, RADIOREGS(0x72, 0x04, 0x8B, 0x01, 0xED, 0x00, 0x03, 0x14,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x1A09, 0x1609, 0x1209, 0xC201, 0xC301, 0xC401), PHYREGS(0x091A, 0x0916, 0x0912, 0x01C2, 0x01C3, 0x01C4),
}, },
{ .channel = 164, { .channel = 164,
.freq = 5820, /* MHz */ .freq = 5820, /* MHz */
@ -1099,7 +1099,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x46, 0x01, 0x0A, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x46, 0x01, 0x0A, 0x01, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x1C09, 0x1809, 0x1409, 0xC201, 0xC201, 0xC301), PHYREGS(0x091C, 0x0918, 0x0914, 0x01C2, 0x01C2, 0x01C3),
}, },
{ .channel = 165, { .channel = 165,
.freq = 5825, /* MHz */ .freq = 5825, /* MHz */
@ -1107,7 +1107,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x72, 0x04, 0x8D, 0x01, 0xED, 0x00, 0x03, 0x14, RADIOREGS(0x72, 0x04, 0x8D, 0x01, 0xED, 0x00, 0x03, 0x14,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x1E09, 0x1A09, 0x1609, 0xC101, 0xC201, 0xC301), PHYREGS(0x091E, 0x091A, 0x0916, 0x01C1, 0x01C2, 0x01C3),
}, },
{ .channel = 166, { .channel = 166,
.freq = 5830, /* MHz */ .freq = 5830, /* MHz */
@ -1115,7 +1115,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x47, 0x01, 0x0A, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x47, 0x01, 0x0A, 0x01, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x2009, 0x1C09, 0x1809, 0xC101, 0xC201, 0xC201), PHYREGS(0x0920, 0x091C, 0x0918, 0x01C1, 0x01C2, 0x01C2),
}, },
{ .channel = 168, { .channel = 168,
.freq = 5840, /* MHz */ .freq = 5840, /* MHz */
@ -1123,7 +1123,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x48, 0x01, 0x0A, 0x01, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x48, 0x01, 0x0A, 0x01, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x2409, 0x2009, 0x1C09, 0xC001, 0xC101, 0xC201), PHYREGS(0x0924, 0x0920, 0x091C, 0x01C0, 0x01C1, 0x01C2),
}, },
{ .channel = 170, { .channel = 170,
.freq = 5850, /* MHz */ .freq = 5850, /* MHz */
@ -1131,7 +1131,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x49, 0x01, 0xE0, 0x00, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x49, 0x01, 0xE0, 0x00, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x2809, 0x2409, 0x2009, 0xBF01, 0xC001, 0xC101), PHYREGS(0x0928, 0x0924, 0x0920, 0x01BF, 0x01C0, 0x01C1),
}, },
{ .channel = 172, { .channel = 172,
.freq = 5860, /* MHz */ .freq = 5860, /* MHz */
@ -1139,7 +1139,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x4A, 0x01, 0xDE, 0x00, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x4A, 0x01, 0xDE, 0x00, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x2C09, 0x2809, 0x2409, 0xBF01, 0xBF01, 0xC001), PHYREGS(0x092C, 0x0928, 0x0924, 0x01BF, 0x01BF, 0x01C0),
}, },
{ .channel = 174, { .channel = 174,
.freq = 5870, /* MHz */ .freq = 5870, /* MHz */
@ -1147,7 +1147,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x4B, 0x00, 0xDB, 0x00, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x4B, 0x00, 0xDB, 0x00, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x3009, 0x2C09, 0x2809, 0xBE01, 0xBF01, 0xBF01), PHYREGS(0x0930, 0x092C, 0x0928, 0x01BE, 0x01BF, 0x01BF),
}, },
{ .channel = 176, { .channel = 176,
.freq = 5880, /* MHz */ .freq = 5880, /* MHz */
@ -1155,7 +1155,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x4C, 0x00, 0xD8, 0x00, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x4C, 0x00, 0xD8, 0x00, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x3409, 0x3009, 0x2C09, 0xBD01, 0xBE01, 0xBF01), PHYREGS(0x0934, 0x0930, 0x092C, 0x01BD, 0x01BE, 0x01BF),
}, },
{ .channel = 178, { .channel = 178,
.freq = 5890, /* MHz */ .freq = 5890, /* MHz */
@ -1163,7 +1163,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x4D, 0x00, 0xD6, 0x00, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x4D, 0x00, 0xD6, 0x00, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x3809, 0x3409, 0x3009, 0xBC01, 0xBD01, 0xBE01), PHYREGS(0x0938, 0x0934, 0x0930, 0x01BC, 0x01BD, 0x01BE),
}, },
{ .channel = 180, { .channel = 180,
.freq = 5900, /* MHz */ .freq = 5900, /* MHz */
@ -1171,7 +1171,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x4E, 0x00, 0xD3, 0x00, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x4E, 0x00, 0xD3, 0x00, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x3C09, 0x3809, 0x3409, 0xBC01, 0xBC01, 0xBD01), PHYREGS(0x093C, 0x0938, 0x0934, 0x01BC, 0x01BC, 0x01BD),
}, },
{ .channel = 182, { .channel = 182,
.freq = 5910, /* MHz */ .freq = 5910, /* MHz */
@ -1179,7 +1179,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x71, 0x02, 0x4F, 0x00, 0xD6, 0x00, 0x04, 0x0A, RADIOREGS(0x71, 0x02, 0x4F, 0x00, 0xD6, 0x00, 0x04, 0x0A,
0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
0x80, 0x00, 0x00, 0x00, 0x00, 0x80), 0x80, 0x00, 0x00, 0x00, 0x00, 0x80),
PHYREGS(0x4009, 0x3C09, 0x3809, 0xBB01, 0xBC01, 0xBC01), PHYREGS(0x0940, 0x093C, 0x0938, 0x01BB, 0x01BC, 0x01BC),
}, },
{ .channel = 1, { .channel = 1,
.freq = 2412, /* MHz */ .freq = 2412, /* MHz */
@ -1187,7 +1187,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x73, 0x09, 0x6C, 0x0F, 0x00, 0x01, 0x07, 0x15, RADIOREGS(0x73, 0x09, 0x6C, 0x0F, 0x00, 0x01, 0x07, 0x15,
0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0D, 0x0C, 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0D, 0x0C,
0x80, 0xFF, 0x88, 0x0D, 0x0C, 0x80), 0x80, 0xFF, 0x88, 0x0D, 0x0C, 0x80),
PHYREGS(0xC903, 0xC503, 0xC103, 0x3A04, 0x3F04, 0x4304), PHYREGS(0x03C9, 0x03C5, 0x03C1, 0x043A, 0x043F, 0x0443),
}, },
{ .channel = 2, { .channel = 2,
.freq = 2417, /* MHz */ .freq = 2417, /* MHz */
@ -1195,7 +1195,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x73, 0x09, 0x71, 0x0F, 0x00, 0x01, 0x07, 0x15, RADIOREGS(0x73, 0x09, 0x71, 0x0F, 0x00, 0x01, 0x07, 0x15,
0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0B, 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0B,
0x80, 0xFF, 0x88, 0x0C, 0x0B, 0x80), 0x80, 0xFF, 0x88, 0x0C, 0x0B, 0x80),
PHYREGS(0xCB03, 0xC703, 0xC303, 0x3804, 0x3D04, 0x4104), PHYREGS(0x03CB, 0x03C7, 0x03C3, 0x0438, 0x043D, 0x0441),
}, },
{ .channel = 3, { .channel = 3,
.freq = 2422, /* MHz */ .freq = 2422, /* MHz */
@ -1203,7 +1203,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x73, 0x09, 0x76, 0x0F, 0x00, 0x01, 0x07, 0x15, RADIOREGS(0x73, 0x09, 0x76, 0x0F, 0x00, 0x01, 0x07, 0x15,
0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A, 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A,
0x80, 0xFF, 0x88, 0x0C, 0x0A, 0x80), 0x80, 0xFF, 0x88, 0x0C, 0x0A, 0x80),
PHYREGS(0xCD03, 0xC903, 0xC503, 0x3604, 0x3A04, 0x3F04), PHYREGS(0x03CD, 0x03C9, 0x03C5, 0x0436, 0x043A, 0x043F),
}, },
{ .channel = 4, { .channel = 4,
.freq = 2427, /* MHz */ .freq = 2427, /* MHz */
@ -1211,7 +1211,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x73, 0x09, 0x7B, 0x0F, 0x00, 0x01, 0x07, 0x15, RADIOREGS(0x73, 0x09, 0x7B, 0x0F, 0x00, 0x01, 0x07, 0x15,
0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A, 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x0A,
0x80, 0xFF, 0x88, 0x0C, 0x0A, 0x80), 0x80, 0xFF, 0x88, 0x0C, 0x0A, 0x80),
PHYREGS(0xCF03, 0xCB03, 0xC703, 0x3404, 0x3804, 0x3D04), PHYREGS(0x03CF, 0x03CB, 0x03C7, 0x0434, 0x0438, 0x043D),
}, },
{ .channel = 5, { .channel = 5,
.freq = 2432, /* MHz */ .freq = 2432, /* MHz */
@ -1219,7 +1219,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x73, 0x09, 0x80, 0x0F, 0x00, 0x01, 0x07, 0x15, RADIOREGS(0x73, 0x09, 0x80, 0x0F, 0x00, 0x01, 0x07, 0x15,
0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x09, 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0C, 0x09,
0x80, 0xFF, 0x88, 0x0C, 0x09, 0x80), 0x80, 0xFF, 0x88, 0x0C, 0x09, 0x80),
PHYREGS(0xD103, 0xCD03, 0xC903, 0x3104, 0x3604, 0x3A04), PHYREGS(0x03D1, 0x03CD, 0x03C9, 0x0431, 0x0436, 0x043A),
}, },
{ .channel = 6, { .channel = 6,
.freq = 2437, /* MHz */ .freq = 2437, /* MHz */
@ -1227,7 +1227,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x73, 0x09, 0x85, 0x0F, 0x00, 0x01, 0x07, 0x15, RADIOREGS(0x73, 0x09, 0x85, 0x0F, 0x00, 0x01, 0x07, 0x15,
0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0B, 0x08, 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0B, 0x08,
0x80, 0xFF, 0x88, 0x0B, 0x08, 0x80), 0x80, 0xFF, 0x88, 0x0B, 0x08, 0x80),
PHYREGS(0xD303, 0xCF03, 0xCB03, 0x2F04, 0x3404, 0x3804), PHYREGS(0x03D3, 0x03CF, 0x03CB, 0x042F, 0x0434, 0x0438),
}, },
{ .channel = 7, { .channel = 7,
.freq = 2442, /* MHz */ .freq = 2442, /* MHz */
@ -1235,7 +1235,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x73, 0x09, 0x8A, 0x0F, 0x00, 0x01, 0x07, 0x15, RADIOREGS(0x73, 0x09, 0x8A, 0x0F, 0x00, 0x01, 0x07, 0x15,
0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x07, 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x07,
0x80, 0xFF, 0x88, 0x0A, 0x07, 0x80), 0x80, 0xFF, 0x88, 0x0A, 0x07, 0x80),
PHYREGS(0xD503, 0xD103, 0xCD03, 0x2D04, 0x3104, 0x3604), PHYREGS(0x03D5, 0x03D1, 0x03CD, 0x042D, 0x0431, 0x0436),
}, },
{ .channel = 8, { .channel = 8,
.freq = 2447, /* MHz */ .freq = 2447, /* MHz */
@ -1243,7 +1243,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x73, 0x09, 0x8F, 0x0F, 0x00, 0x01, 0x07, 0x15, RADIOREGS(0x73, 0x09, 0x8F, 0x0F, 0x00, 0x01, 0x07, 0x15,
0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x06, 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x0A, 0x06,
0x80, 0xFF, 0x88, 0x0A, 0x06, 0x80), 0x80, 0xFF, 0x88, 0x0A, 0x06, 0x80),
PHYREGS(0xD703, 0xD303, 0xCF03, 0x2B04, 0x2F04, 0x3404), PHYREGS(0x03D7, 0x03D3, 0x03CF, 0x042B, 0x042F, 0x0434),
}, },
{ .channel = 9, { .channel = 9,
.freq = 2452, /* MHz */ .freq = 2452, /* MHz */
@ -1251,7 +1251,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x73, 0x09, 0x94, 0x0F, 0x00, 0x01, 0x07, 0x15, RADIOREGS(0x73, 0x09, 0x94, 0x0F, 0x00, 0x01, 0x07, 0x15,
0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x09, 0x06, 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x09, 0x06,
0x80, 0xFF, 0x88, 0x09, 0x06, 0x80), 0x80, 0xFF, 0x88, 0x09, 0x06, 0x80),
PHYREGS(0xD903, 0xD503, 0xD103, 0x2904, 0x2D04, 0x3104), PHYREGS(0x03D9, 0x03D5, 0x03D1, 0x0429, 0x042D, 0x0431),
}, },
{ .channel = 10, { .channel = 10,
.freq = 2457, /* MHz */ .freq = 2457, /* MHz */
@ -1259,7 +1259,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x73, 0x09, 0x99, 0x0F, 0x00, 0x01, 0x07, 0x15, RADIOREGS(0x73, 0x09, 0x99, 0x0F, 0x00, 0x01, 0x07, 0x15,
0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x05, 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x05,
0x80, 0xFF, 0x88, 0x08, 0x05, 0x80), 0x80, 0xFF, 0x88, 0x08, 0x05, 0x80),
PHYREGS(0xDB03, 0xD703, 0xD303, 0x2704, 0x2B04, 0x2F04), PHYREGS(0x03DB, 0x03D7, 0x03D3, 0x0427, 0x042B, 0x042F),
}, },
{ .channel = 11, { .channel = 11,
.freq = 2462, /* MHz */ .freq = 2462, /* MHz */
@ -1267,7 +1267,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x73, 0x09, 0x9E, 0x0F, 0x00, 0x01, 0x07, 0x15, RADIOREGS(0x73, 0x09, 0x9E, 0x0F, 0x00, 0x01, 0x07, 0x15,
0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x04, 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x04,
0x80, 0xFF, 0x88, 0x08, 0x04, 0x80), 0x80, 0xFF, 0x88, 0x08, 0x04, 0x80),
PHYREGS(0xDD03, 0xD903, 0xD503, 0x2404, 0x2904, 0x2D04), PHYREGS(0x03DD, 0x03D9, 0x03D5, 0x0424, 0x0429, 0x042D),
}, },
{ .channel = 12, { .channel = 12,
.freq = 2467, /* MHz */ .freq = 2467, /* MHz */
@ -1275,7 +1275,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x73, 0x09, 0xA3, 0x0F, 0x00, 0x01, 0x07, 0x15, RADIOREGS(0x73, 0x09, 0xA3, 0x0F, 0x00, 0x01, 0x07, 0x15,
0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x03, 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x08, 0x03,
0x80, 0xFF, 0x88, 0x08, 0x03, 0x80), 0x80, 0xFF, 0x88, 0x08, 0x03, 0x80),
PHYREGS(0xDF03, 0xDB03, 0xD703, 0x2204, 0x2704, 0x2B04), PHYREGS(0x03DF, 0x03DB, 0x03D7, 0x0422, 0x0427, 0x042B),
}, },
{ .channel = 13, { .channel = 13,
.freq = 2472, /* MHz */ .freq = 2472, /* MHz */
@ -1283,7 +1283,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x73, 0x09, 0xA8, 0x0F, 0x00, 0x01, 0x07, 0x15, RADIOREGS(0x73, 0x09, 0xA8, 0x0F, 0x00, 0x01, 0x07, 0x15,
0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x03, 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x03,
0x80, 0xFF, 0x88, 0x07, 0x03, 0x80), 0x80, 0xFF, 0x88, 0x07, 0x03, 0x80),
PHYREGS(0xE103, 0xDD03, 0xD903, 0x2004, 0x2404, 0x2904), PHYREGS(0x03E1, 0x03DD, 0x03D9, 0x0420, 0x0424, 0x0429),
}, },
{ .channel = 14, { .channel = 14,
.freq = 2484, /* MHz */ .freq = 2484, /* MHz */
@ -1291,7 +1291,7 @@ static const struct b43_nphy_channeltab_entry_rev2 b43_nphy_channeltab_rev2[] =
RADIOREGS(0x73, 0x09, 0xB4, 0x0F, 0xFF, 0x01, 0x07, 0x15, RADIOREGS(0x73, 0x09, 0xB4, 0x0F, 0xFF, 0x01, 0x07, 0x15,
0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x01, 0x01, 0x8F, 0xFF, 0xFF, 0xFF, 0x88, 0x07, 0x01,
0x80, 0xFF, 0x88, 0x07, 0x01, 0x80), 0x80, 0xFF, 0x88, 0x07, 0x01, 0x80),
PHYREGS(0xE603, 0xE203, 0xDE03, 0x1B04, 0x1F04, 0x2404), PHYREGS(0x03E6, 0x03E2, 0x03DE, 0x041B, 0x041F, 0x0424),
}, },
}; };

File diff suppressed because it is too large Load diff

View file

@ -28,23 +28,8 @@
/* Returns TRUE, if the radio is enabled in hardware. */ /* Returns TRUE, if the radio is enabled in hardware. */
bool b43_is_hw_radio_enabled(struct b43_wldev *dev) bool b43_is_hw_radio_enabled(struct b43_wldev *dev)
{ {
if (dev->phy.rev >= 3 || dev->phy.type == B43_PHYTYPE_LP) { return !(b43_read32(dev, B43_MMIO_RADIO_HWENABLED_HI)
if (!(b43_read32(dev, B43_MMIO_RADIO_HWENABLED_HI) & B43_MMIO_RADIO_HWENABLED_HI_MASK);
& B43_MMIO_RADIO_HWENABLED_HI_MASK))
return 1;
} else {
/* To prevent CPU fault on PPC, do not read a register
* unless the interface is started; however, on resume
* for hibernation, this routine is entered early. When
* that happens, unconditionally return TRUE.
*/
if (b43_status(dev) < B43_STAT_STARTED)
return 1;
if (b43_read16(dev, B43_MMIO_RADIO_HWENABLED_LO)
& B43_MMIO_RADIO_HWENABLED_LO_MASK)
return 1;
}
return 0;
} }
/* The poll callback for the hardware button. */ /* The poll callback for the hardware button. */

View file

@ -163,6 +163,7 @@ static int b43_sdio_probe(struct sdio_func *func,
err_free_ssb: err_free_ssb:
kfree(sdio); kfree(sdio);
err_disable_func: err_disable_func:
sdio_claim_host(func);
sdio_disable_func(func); sdio_disable_func(func);
err_release_host: err_release_host:
sdio_release_host(func); sdio_release_host(func);

View file

@ -181,52 +181,75 @@ static int b43legacy_ratelimit(struct b43legacy_wl *wl)
void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...) void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
{ {
struct va_format vaf;
va_list args; va_list args;
if (!b43legacy_ratelimit(wl)) if (!b43legacy_ratelimit(wl))
return; return;
va_start(args, fmt); va_start(args, fmt);
printk(KERN_INFO "b43legacy-%s: ",
(wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); vaf.fmt = fmt;
vprintk(fmt, args); vaf.va = &args;
printk(KERN_INFO "b43legacy-%s: %pV",
(wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
va_end(args); va_end(args);
} }
void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...) void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
{ {
struct va_format vaf;
va_list args; va_list args;
if (!b43legacy_ratelimit(wl)) if (!b43legacy_ratelimit(wl))
return; return;
va_start(args, fmt); va_start(args, fmt);
printk(KERN_ERR "b43legacy-%s ERROR: ",
(wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); vaf.fmt = fmt;
vprintk(fmt, args); vaf.va = &args;
printk(KERN_ERR "b43legacy-%s ERROR: %pV",
(wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
va_end(args); va_end(args);
} }
void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...) void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
{ {
struct va_format vaf;
va_list args; va_list args;
if (!b43legacy_ratelimit(wl)) if (!b43legacy_ratelimit(wl))
return; return;
va_start(args, fmt); va_start(args, fmt);
printk(KERN_WARNING "b43legacy-%s warning: ",
(wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); vaf.fmt = fmt;
vprintk(fmt, args); vaf.va = &args;
printk(KERN_WARNING "b43legacy-%s warning: %pV",
(wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
va_end(args); va_end(args);
} }
#if B43legacy_DEBUG #if B43legacy_DEBUG
void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...) void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
{ {
struct va_format vaf;
va_list args; va_list args;
va_start(args, fmt); va_start(args, fmt);
printk(KERN_DEBUG "b43legacy-%s debug: ",
(wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan"); vaf.fmt = fmt;
vprintk(fmt, args); vaf.va = &args;
printk(KERN_DEBUG "b43legacy-%s debug: %pV",
(wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
va_end(args); va_end(args);
} }
#endif /* DEBUG */ #endif /* DEBUG */

View file

@ -7,6 +7,10 @@ iwlcore-$(CONFIG_IWL4965) += iwl-legacy.o
iwlcore-$(CONFIG_IWLWIFI_DEBUGFS) += iwl-debugfs.o iwlcore-$(CONFIG_IWLWIFI_DEBUGFS) += iwl-debugfs.o
iwlcore-$(CONFIG_IWLWIFI_DEVICE_TRACING) += iwl-devtrace.o iwlcore-$(CONFIG_IWLWIFI_DEVICE_TRACING) += iwl-devtrace.o
# If 3945 is selected only, iwl-legacy.o will be added
# to iwlcore-m above, but it needs to be built in.
iwlcore-objs += $(iwlcore-m)
CFLAGS_iwl-devtrace.o := -I$(src) CFLAGS_iwl-devtrace.o := -I$(src)
# AGN # AGN

View file

@ -278,7 +278,6 @@ struct iwl_cfg iwl1000_bgn_cfg = {
.fw_name_pre = IWL1000_FW_PRE, .fw_name_pre = IWL1000_FW_PRE,
.ucode_api_max = IWL1000_UCODE_API_MAX, .ucode_api_max = IWL1000_UCODE_API_MAX,
.ucode_api_min = IWL1000_UCODE_API_MIN, .ucode_api_min = IWL1000_UCODE_API_MIN,
.sku = IWL_SKU_G|IWL_SKU_N,
.valid_tx_ant = ANT_A, .valid_tx_ant = ANT_A,
.valid_rx_ant = ANT_AB, .valid_rx_ant = ANT_AB,
.eeprom_ver = EEPROM_1000_EEPROM_VERSION, .eeprom_ver = EEPROM_1000_EEPROM_VERSION,
@ -287,6 +286,7 @@ struct iwl_cfg iwl1000_bgn_cfg = {
.mod_params = &iwlagn_mod_params, .mod_params = &iwlagn_mod_params,
.base_params = &iwl1000_base_params, .base_params = &iwl1000_base_params,
.ht_params = &iwl1000_ht_params, .ht_params = &iwl1000_ht_params,
.led_mode = IWL_LED_BLINK,
}; };
struct iwl_cfg iwl1000_bg_cfg = { struct iwl_cfg iwl1000_bg_cfg = {
@ -294,7 +294,6 @@ struct iwl_cfg iwl1000_bg_cfg = {
.fw_name_pre = IWL1000_FW_PRE, .fw_name_pre = IWL1000_FW_PRE,
.ucode_api_max = IWL1000_UCODE_API_MAX, .ucode_api_max = IWL1000_UCODE_API_MAX,
.ucode_api_min = IWL1000_UCODE_API_MIN, .ucode_api_min = IWL1000_UCODE_API_MIN,
.sku = IWL_SKU_G,
.valid_tx_ant = ANT_A, .valid_tx_ant = ANT_A,
.valid_rx_ant = ANT_AB, .valid_rx_ant = ANT_AB,
.eeprom_ver = EEPROM_1000_EEPROM_VERSION, .eeprom_ver = EEPROM_1000_EEPROM_VERSION,
@ -302,6 +301,7 @@ struct iwl_cfg iwl1000_bg_cfg = {
.ops = &iwl1000_ops, .ops = &iwl1000_ops,
.mod_params = &iwlagn_mod_params, .mod_params = &iwlagn_mod_params,
.base_params = &iwl1000_base_params, .base_params = &iwl1000_base_params,
.led_mode = IWL_LED_BLINK,
}; };
struct iwl_cfg iwl100_bgn_cfg = { struct iwl_cfg iwl100_bgn_cfg = {
@ -309,7 +309,6 @@ struct iwl_cfg iwl100_bgn_cfg = {
.fw_name_pre = IWL100_FW_PRE, .fw_name_pre = IWL100_FW_PRE,
.ucode_api_max = IWL100_UCODE_API_MAX, .ucode_api_max = IWL100_UCODE_API_MAX,
.ucode_api_min = IWL100_UCODE_API_MIN, .ucode_api_min = IWL100_UCODE_API_MIN,
.sku = IWL_SKU_G|IWL_SKU_N,
.valid_tx_ant = ANT_A, .valid_tx_ant = ANT_A,
.valid_rx_ant = ANT_A, .valid_rx_ant = ANT_A,
.eeprom_ver = EEPROM_1000_EEPROM_VERSION, .eeprom_ver = EEPROM_1000_EEPROM_VERSION,
@ -318,6 +317,7 @@ struct iwl_cfg iwl100_bgn_cfg = {
.mod_params = &iwlagn_mod_params, .mod_params = &iwlagn_mod_params,
.base_params = &iwl1000_base_params, .base_params = &iwl1000_base_params,
.ht_params = &iwl1000_ht_params, .ht_params = &iwl1000_ht_params,
.led_mode = IWL_LED_RF_STATE,
}; };
struct iwl_cfg iwl100_bg_cfg = { struct iwl_cfg iwl100_bg_cfg = {
@ -325,7 +325,6 @@ struct iwl_cfg iwl100_bg_cfg = {
.fw_name_pre = IWL100_FW_PRE, .fw_name_pre = IWL100_FW_PRE,
.ucode_api_max = IWL100_UCODE_API_MAX, .ucode_api_max = IWL100_UCODE_API_MAX,
.ucode_api_min = IWL100_UCODE_API_MIN, .ucode_api_min = IWL100_UCODE_API_MIN,
.sku = IWL_SKU_G,
.valid_tx_ant = ANT_A, .valid_tx_ant = ANT_A,
.valid_rx_ant = ANT_A, .valid_rx_ant = ANT_A,
.eeprom_ver = EEPROM_1000_EEPROM_VERSION, .eeprom_ver = EEPROM_1000_EEPROM_VERSION,
@ -333,6 +332,7 @@ struct iwl_cfg iwl100_bg_cfg = {
.ops = &iwl1000_ops, .ops = &iwl1000_ops,
.mod_params = &iwlagn_mod_params, .mod_params = &iwlagn_mod_params,
.base_params = &iwl1000_base_params, .base_params = &iwl1000_base_params,
.led_mode = IWL_LED_RF_STATE,
}; };
MODULE_FIRMWARE(IWL1000_MODULE_FIRMWARE(IWL1000_UCODE_API_MAX)); MODULE_FIRMWARE(IWL1000_MODULE_FIRMWARE(IWL1000_UCODE_API_MAX));

View file

@ -116,7 +116,7 @@ void iwl3945_disable_events(struct iwl_priv *priv)
u32 base; /* SRAM address of event log header */ u32 base; /* SRAM address of event log header */
u32 disable_ptr; /* SRAM address of event-disable bitmap array */ u32 disable_ptr; /* SRAM address of event-disable bitmap array */
u32 array_size; /* # of u32 entries in array */ u32 array_size; /* # of u32 entries in array */
u32 evt_disable[IWL_EVT_DISABLE_SIZE] = { static const u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
0x00000000, /* 31 - 0 Event id numbers */ 0x00000000, /* 31 - 0 Event id numbers */
0x00000000, /* 63 - 32 */ 0x00000000, /* 63 - 32 */
0x00000000, /* 95 - 64 */ 0x00000000, /* 95 - 64 */
@ -297,7 +297,7 @@ static void iwl3945_tx_queue_reclaim(struct iwl_priv *priv,
if (iwl_queue_space(q) > q->low_mark && (txq_id >= 0) && if (iwl_queue_space(q) > q->low_mark && (txq_id >= 0) &&
(txq_id != IWL39_CMD_QUEUE_NUM) && (txq_id != IWL39_CMD_QUEUE_NUM) &&
priv->mac80211_registered) priv->mac80211_registered)
iwl_wake_queue(priv, txq_id); iwl_wake_queue(priv, txq);
} }
/** /**
@ -2788,6 +2788,7 @@ static struct iwl_cfg iwl3945_bg_cfg = {
.ops = &iwl3945_ops, .ops = &iwl3945_ops,
.mod_params = &iwl3945_mod_params, .mod_params = &iwl3945_mod_params,
.base_params = &iwl3945_base_params, .base_params = &iwl3945_base_params,
.led_mode = IWL_LED_BLINK,
}; };
static struct iwl_cfg iwl3945_abg_cfg = { static struct iwl_cfg iwl3945_abg_cfg = {
@ -2800,6 +2801,7 @@ static struct iwl_cfg iwl3945_abg_cfg = {
.ops = &iwl3945_ops, .ops = &iwl3945_ops,
.mod_params = &iwl3945_mod_params, .mod_params = &iwl3945_mod_params,
.base_params = &iwl3945_base_params, .base_params = &iwl3945_base_params,
.led_mode = IWL_LED_BLINK,
}; };
DEFINE_PCI_DEVICE_TABLE(iwl3945_hw_card_ids) = { DEFINE_PCI_DEVICE_TABLE(iwl3945_hw_card_ids) = {

View file

@ -2238,12 +2238,8 @@ static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
if (priv->mac80211_registered && if (priv->mac80211_registered &&
(iwl_queue_space(&txq->q) > txq->q.low_mark) && (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
(agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) { (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA))
if (agg->state == IWL_AGG_OFF) iwl_wake_queue(priv, txq);
iwl_wake_queue(priv, txq_id);
else
iwl_wake_queue(priv, txq->swq_id);
}
} }
} else { } else {
info->status.rates[0].count = tx_resp->failure_frame + 1; info->status.rates[0].count = tx_resp->failure_frame + 1;
@ -2267,7 +2263,7 @@ static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
if (priv->mac80211_registered && if (priv->mac80211_registered &&
(iwl_queue_space(&txq->q) > txq->q.low_mark)) (iwl_queue_space(&txq->q) > txq->q.low_mark))
iwl_wake_queue(priv, txq_id); iwl_wake_queue(priv, txq);
} }
if (qc && likely(sta_id != IWL_INVALID_STATION)) if (qc && likely(sta_id != IWL_INVALID_STATION))
iwlagn_txq_check_empty(priv, sta_id, tid, txq_id); iwlagn_txq_check_empty(priv, sta_id, tid, txq_id);
@ -2620,6 +2616,7 @@ static struct iwl_base_params iwl4965_base_params = {
.ucode_tracing = true, .ucode_tracing = true,
.sensitivity_calib_by_driver = true, .sensitivity_calib_by_driver = true,
.chain_noise_calib_by_driver = true, .chain_noise_calib_by_driver = true,
.no_agg_framecnt_info = true,
}; };
struct iwl_cfg iwl4965_agn_cfg = { struct iwl_cfg iwl4965_agn_cfg = {
@ -2627,7 +2624,6 @@ struct iwl_cfg iwl4965_agn_cfg = {
.fw_name_pre = IWL4965_FW_PRE, .fw_name_pre = IWL4965_FW_PRE,
.ucode_api_max = IWL4965_UCODE_API_MAX, .ucode_api_max = IWL4965_UCODE_API_MAX,
.ucode_api_min = IWL4965_UCODE_API_MIN, .ucode_api_min = IWL4965_UCODE_API_MIN,
.sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
.valid_tx_ant = ANT_AB, .valid_tx_ant = ANT_AB,
.valid_rx_ant = ANT_ABC, .valid_rx_ant = ANT_ABC,
.eeprom_ver = EEPROM_4965_EEPROM_VERSION, .eeprom_ver = EEPROM_4965_EEPROM_VERSION,
@ -2635,6 +2631,7 @@ struct iwl_cfg iwl4965_agn_cfg = {
.ops = &iwl4965_ops, .ops = &iwl4965_ops,
.mod_params = &iwlagn_mod_params, .mod_params = &iwlagn_mod_params,
.base_params = &iwl4965_base_params, .base_params = &iwl4965_base_params,
.led_mode = IWL_LED_BLINK,
/* /*
* Force use of chains B and C for scan RX on 5 GHz band * Force use of chains B and C for scan RX on 5 GHz band
* because the device has off-channel reception on chain A. * because the device has off-channel reception on chain A.

View file

@ -527,7 +527,6 @@ struct iwl_cfg iwl5300_agn_cfg = {
.fw_name_pre = IWL5000_FW_PRE, .fw_name_pre = IWL5000_FW_PRE,
.ucode_api_max = IWL5000_UCODE_API_MAX, .ucode_api_max = IWL5000_UCODE_API_MAX,
.ucode_api_min = IWL5000_UCODE_API_MIN, .ucode_api_min = IWL5000_UCODE_API_MIN,
.sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
.valid_tx_ant = ANT_ABC, .valid_tx_ant = ANT_ABC,
.valid_rx_ant = ANT_ABC, .valid_rx_ant = ANT_ABC,
.eeprom_ver = EEPROM_5000_EEPROM_VERSION, .eeprom_ver = EEPROM_5000_EEPROM_VERSION,
@ -536,6 +535,7 @@ struct iwl_cfg iwl5300_agn_cfg = {
.mod_params = &iwlagn_mod_params, .mod_params = &iwlagn_mod_params,
.base_params = &iwl5000_base_params, .base_params = &iwl5000_base_params,
.ht_params = &iwl5000_ht_params, .ht_params = &iwl5000_ht_params,
.led_mode = IWL_LED_BLINK,
}; };
struct iwl_cfg iwl5100_bgn_cfg = { struct iwl_cfg iwl5100_bgn_cfg = {
@ -543,7 +543,6 @@ struct iwl_cfg iwl5100_bgn_cfg = {
.fw_name_pre = IWL5000_FW_PRE, .fw_name_pre = IWL5000_FW_PRE,
.ucode_api_max = IWL5000_UCODE_API_MAX, .ucode_api_max = IWL5000_UCODE_API_MAX,
.ucode_api_min = IWL5000_UCODE_API_MIN, .ucode_api_min = IWL5000_UCODE_API_MIN,
.sku = IWL_SKU_G|IWL_SKU_N,
.valid_tx_ant = ANT_B, .valid_tx_ant = ANT_B,
.valid_rx_ant = ANT_AB, .valid_rx_ant = ANT_AB,
.eeprom_ver = EEPROM_5000_EEPROM_VERSION, .eeprom_ver = EEPROM_5000_EEPROM_VERSION,
@ -552,6 +551,7 @@ struct iwl_cfg iwl5100_bgn_cfg = {
.mod_params = &iwlagn_mod_params, .mod_params = &iwlagn_mod_params,
.base_params = &iwl5000_base_params, .base_params = &iwl5000_base_params,
.ht_params = &iwl5000_ht_params, .ht_params = &iwl5000_ht_params,
.led_mode = IWL_LED_BLINK,
}; };
struct iwl_cfg iwl5100_abg_cfg = { struct iwl_cfg iwl5100_abg_cfg = {
@ -559,7 +559,6 @@ struct iwl_cfg iwl5100_abg_cfg = {
.fw_name_pre = IWL5000_FW_PRE, .fw_name_pre = IWL5000_FW_PRE,
.ucode_api_max = IWL5000_UCODE_API_MAX, .ucode_api_max = IWL5000_UCODE_API_MAX,
.ucode_api_min = IWL5000_UCODE_API_MIN, .ucode_api_min = IWL5000_UCODE_API_MIN,
.sku = IWL_SKU_A|IWL_SKU_G,
.valid_tx_ant = ANT_B, .valid_tx_ant = ANT_B,
.valid_rx_ant = ANT_AB, .valid_rx_ant = ANT_AB,
.eeprom_ver = EEPROM_5000_EEPROM_VERSION, .eeprom_ver = EEPROM_5000_EEPROM_VERSION,
@ -567,6 +566,7 @@ struct iwl_cfg iwl5100_abg_cfg = {
.ops = &iwl5000_ops, .ops = &iwl5000_ops,
.mod_params = &iwlagn_mod_params, .mod_params = &iwlagn_mod_params,
.base_params = &iwl5000_base_params, .base_params = &iwl5000_base_params,
.led_mode = IWL_LED_BLINK,
}; };
struct iwl_cfg iwl5100_agn_cfg = { struct iwl_cfg iwl5100_agn_cfg = {
@ -574,7 +574,6 @@ struct iwl_cfg iwl5100_agn_cfg = {
.fw_name_pre = IWL5000_FW_PRE, .fw_name_pre = IWL5000_FW_PRE,
.ucode_api_max = IWL5000_UCODE_API_MAX, .ucode_api_max = IWL5000_UCODE_API_MAX,
.ucode_api_min = IWL5000_UCODE_API_MIN, .ucode_api_min = IWL5000_UCODE_API_MIN,
.sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
.valid_tx_ant = ANT_B, .valid_tx_ant = ANT_B,
.valid_rx_ant = ANT_AB, .valid_rx_ant = ANT_AB,
.eeprom_ver = EEPROM_5000_EEPROM_VERSION, .eeprom_ver = EEPROM_5000_EEPROM_VERSION,
@ -583,6 +582,7 @@ struct iwl_cfg iwl5100_agn_cfg = {
.mod_params = &iwlagn_mod_params, .mod_params = &iwlagn_mod_params,
.base_params = &iwl5000_base_params, .base_params = &iwl5000_base_params,
.ht_params = &iwl5000_ht_params, .ht_params = &iwl5000_ht_params,
.led_mode = IWL_LED_BLINK,
}; };
struct iwl_cfg iwl5350_agn_cfg = { struct iwl_cfg iwl5350_agn_cfg = {
@ -590,7 +590,6 @@ struct iwl_cfg iwl5350_agn_cfg = {
.fw_name_pre = IWL5000_FW_PRE, .fw_name_pre = IWL5000_FW_PRE,
.ucode_api_max = IWL5000_UCODE_API_MAX, .ucode_api_max = IWL5000_UCODE_API_MAX,
.ucode_api_min = IWL5000_UCODE_API_MIN, .ucode_api_min = IWL5000_UCODE_API_MIN,
.sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
.valid_tx_ant = ANT_ABC, .valid_tx_ant = ANT_ABC,
.valid_rx_ant = ANT_ABC, .valid_rx_ant = ANT_ABC,
.eeprom_ver = EEPROM_5050_EEPROM_VERSION, .eeprom_ver = EEPROM_5050_EEPROM_VERSION,
@ -599,6 +598,7 @@ struct iwl_cfg iwl5350_agn_cfg = {
.mod_params = &iwlagn_mod_params, .mod_params = &iwlagn_mod_params,
.base_params = &iwl5000_base_params, .base_params = &iwl5000_base_params,
.ht_params = &iwl5000_ht_params, .ht_params = &iwl5000_ht_params,
.led_mode = IWL_LED_BLINK,
}; };
struct iwl_cfg iwl5150_agn_cfg = { struct iwl_cfg iwl5150_agn_cfg = {
@ -606,7 +606,6 @@ struct iwl_cfg iwl5150_agn_cfg = {
.fw_name_pre = IWL5150_FW_PRE, .fw_name_pre = IWL5150_FW_PRE,
.ucode_api_max = IWL5150_UCODE_API_MAX, .ucode_api_max = IWL5150_UCODE_API_MAX,
.ucode_api_min = IWL5150_UCODE_API_MIN, .ucode_api_min = IWL5150_UCODE_API_MIN,
.sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
.valid_tx_ant = ANT_A, .valid_tx_ant = ANT_A,
.valid_rx_ant = ANT_AB, .valid_rx_ant = ANT_AB,
.eeprom_ver = EEPROM_5050_EEPROM_VERSION, .eeprom_ver = EEPROM_5050_EEPROM_VERSION,
@ -616,6 +615,7 @@ struct iwl_cfg iwl5150_agn_cfg = {
.base_params = &iwl5000_base_params, .base_params = &iwl5000_base_params,
.ht_params = &iwl5000_ht_params, .ht_params = &iwl5000_ht_params,
.need_dc_calib = true, .need_dc_calib = true,
.led_mode = IWL_LED_BLINK,
}; };
struct iwl_cfg iwl5150_abg_cfg = { struct iwl_cfg iwl5150_abg_cfg = {
@ -623,7 +623,6 @@ struct iwl_cfg iwl5150_abg_cfg = {
.fw_name_pre = IWL5150_FW_PRE, .fw_name_pre = IWL5150_FW_PRE,
.ucode_api_max = IWL5150_UCODE_API_MAX, .ucode_api_max = IWL5150_UCODE_API_MAX,
.ucode_api_min = IWL5150_UCODE_API_MIN, .ucode_api_min = IWL5150_UCODE_API_MIN,
.sku = IWL_SKU_A|IWL_SKU_G,
.valid_tx_ant = ANT_A, .valid_tx_ant = ANT_A,
.valid_rx_ant = ANT_AB, .valid_rx_ant = ANT_AB,
.eeprom_ver = EEPROM_5050_EEPROM_VERSION, .eeprom_ver = EEPROM_5050_EEPROM_VERSION,
@ -632,6 +631,7 @@ struct iwl_cfg iwl5150_abg_cfg = {
.mod_params = &iwlagn_mod_params, .mod_params = &iwlagn_mod_params,
.base_params = &iwl5000_base_params, .base_params = &iwl5000_base_params,
.need_dc_calib = true, .need_dc_calib = true,
.led_mode = IWL_LED_BLINK,
}; };
MODULE_FIRMWARE(IWL5000_MODULE_FIRMWARE(IWL5000_UCODE_API_MAX)); MODULE_FIRMWARE(IWL5000_MODULE_FIRMWARE(IWL5000_UCODE_API_MAX));

View file

@ -546,8 +546,10 @@ static struct iwl_bt_params iwl6000_bt_params = {
.bt_statistics = true, .bt_statistics = true,
/* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */
.advanced_bt_coexist = true, .advanced_bt_coexist = true,
.agg_time_limit = BT_AGG_THRESHOLD_DEF,
.bt_init_traffic_load = IWL_BT_COEX_TRAFFIC_LOAD_NONE, .bt_init_traffic_load = IWL_BT_COEX_TRAFFIC_LOAD_NONE,
.bt_prio_boost = IWLAGN_BT_PRIO_BOOST_DEFAULT, .bt_prio_boost = IWLAGN_BT_PRIO_BOOST_DEFAULT,
.bt_sco_disable = true,
}; };
struct iwl_cfg iwl6000g2a_2agn_cfg = { struct iwl_cfg iwl6000g2a_2agn_cfg = {
@ -555,7 +557,6 @@ struct iwl_cfg iwl6000g2a_2agn_cfg = {
.fw_name_pre = IWL6000G2A_FW_PRE, .fw_name_pre = IWL6000G2A_FW_PRE,
.ucode_api_max = IWL6000G2_UCODE_API_MAX, .ucode_api_max = IWL6000G2_UCODE_API_MAX,
.ucode_api_min = IWL6000G2_UCODE_API_MIN, .ucode_api_min = IWL6000G2_UCODE_API_MIN,
.sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
.valid_tx_ant = ANT_AB, .valid_tx_ant = ANT_AB,
.valid_rx_ant = ANT_AB, .valid_rx_ant = ANT_AB,
.eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,
@ -566,6 +567,7 @@ struct iwl_cfg iwl6000g2a_2agn_cfg = {
.ht_params = &iwl6000_ht_params, .ht_params = &iwl6000_ht_params,
.need_dc_calib = true, .need_dc_calib = true,
.need_temp_offset_calib = true, .need_temp_offset_calib = true,
.led_mode = IWL_LED_RF_STATE,
}; };
struct iwl_cfg iwl6000g2a_2abg_cfg = { struct iwl_cfg iwl6000g2a_2abg_cfg = {
@ -573,7 +575,6 @@ struct iwl_cfg iwl6000g2a_2abg_cfg = {
.fw_name_pre = IWL6000G2A_FW_PRE, .fw_name_pre = IWL6000G2A_FW_PRE,
.ucode_api_max = IWL6000G2_UCODE_API_MAX, .ucode_api_max = IWL6000G2_UCODE_API_MAX,
.ucode_api_min = IWL6000G2_UCODE_API_MIN, .ucode_api_min = IWL6000G2_UCODE_API_MIN,
.sku = IWL_SKU_A|IWL_SKU_G,
.valid_tx_ant = ANT_AB, .valid_tx_ant = ANT_AB,
.valid_rx_ant = ANT_AB, .valid_rx_ant = ANT_AB,
.eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,
@ -583,6 +584,7 @@ struct iwl_cfg iwl6000g2a_2abg_cfg = {
.base_params = &iwl6000_base_params, .base_params = &iwl6000_base_params,
.need_dc_calib = true, .need_dc_calib = true,
.need_temp_offset_calib = true, .need_temp_offset_calib = true,
.led_mode = IWL_LED_RF_STATE,
}; };
struct iwl_cfg iwl6000g2a_2bg_cfg = { struct iwl_cfg iwl6000g2a_2bg_cfg = {
@ -590,7 +592,6 @@ struct iwl_cfg iwl6000g2a_2bg_cfg = {
.fw_name_pre = IWL6000G2A_FW_PRE, .fw_name_pre = IWL6000G2A_FW_PRE,
.ucode_api_max = IWL6000G2_UCODE_API_MAX, .ucode_api_max = IWL6000G2_UCODE_API_MAX,
.ucode_api_min = IWL6000G2_UCODE_API_MIN, .ucode_api_min = IWL6000G2_UCODE_API_MIN,
.sku = IWL_SKU_G,
.valid_tx_ant = ANT_AB, .valid_tx_ant = ANT_AB,
.valid_rx_ant = ANT_AB, .valid_rx_ant = ANT_AB,
.eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,
@ -600,6 +601,7 @@ struct iwl_cfg iwl6000g2a_2bg_cfg = {
.base_params = &iwl6000_base_params, .base_params = &iwl6000_base_params,
.need_dc_calib = true, .need_dc_calib = true,
.need_temp_offset_calib = true, .need_temp_offset_calib = true,
.led_mode = IWL_LED_RF_STATE,
}; };
struct iwl_cfg iwl6000g2b_2agn_cfg = { struct iwl_cfg iwl6000g2b_2agn_cfg = {
@ -607,7 +609,6 @@ struct iwl_cfg iwl6000g2b_2agn_cfg = {
.fw_name_pre = IWL6000G2B_FW_PRE, .fw_name_pre = IWL6000G2B_FW_PRE,
.ucode_api_max = IWL6000G2_UCODE_API_MAX, .ucode_api_max = IWL6000G2_UCODE_API_MAX,
.ucode_api_min = IWL6000G2_UCODE_API_MIN, .ucode_api_min = IWL6000G2_UCODE_API_MIN,
.sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
.valid_tx_ant = ANT_AB, .valid_tx_ant = ANT_AB,
.valid_rx_ant = ANT_AB, .valid_rx_ant = ANT_AB,
.eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,
@ -619,6 +620,8 @@ struct iwl_cfg iwl6000g2b_2agn_cfg = {
.ht_params = &iwl6000_ht_params, .ht_params = &iwl6000_ht_params,
.need_dc_calib = true, .need_dc_calib = true,
.need_temp_offset_calib = true, .need_temp_offset_calib = true,
.led_mode = IWL_LED_RF_STATE,
.adv_pm = true,
/* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */
.scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A,
}; };
@ -628,7 +631,6 @@ struct iwl_cfg iwl6000g2b_2abg_cfg = {
.fw_name_pre = IWL6000G2B_FW_PRE, .fw_name_pre = IWL6000G2B_FW_PRE,
.ucode_api_max = IWL6000G2_UCODE_API_MAX, .ucode_api_max = IWL6000G2_UCODE_API_MAX,
.ucode_api_min = IWL6000G2_UCODE_API_MIN, .ucode_api_min = IWL6000G2_UCODE_API_MIN,
.sku = IWL_SKU_A|IWL_SKU_G,
.valid_tx_ant = ANT_AB, .valid_tx_ant = ANT_AB,
.valid_rx_ant = ANT_AB, .valid_rx_ant = ANT_AB,
.eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,
@ -639,6 +641,8 @@ struct iwl_cfg iwl6000g2b_2abg_cfg = {
.bt_params = &iwl6000_bt_params, .bt_params = &iwl6000_bt_params,
.need_dc_calib = true, .need_dc_calib = true,
.need_temp_offset_calib = true, .need_temp_offset_calib = true,
.led_mode = IWL_LED_RF_STATE,
.adv_pm = true,
/* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */
.scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A,
}; };
@ -648,7 +652,6 @@ struct iwl_cfg iwl6000g2b_2bgn_cfg = {
.fw_name_pre = IWL6000G2B_FW_PRE, .fw_name_pre = IWL6000G2B_FW_PRE,
.ucode_api_max = IWL6000G2_UCODE_API_MAX, .ucode_api_max = IWL6000G2_UCODE_API_MAX,
.ucode_api_min = IWL6000G2_UCODE_API_MIN, .ucode_api_min = IWL6000G2_UCODE_API_MIN,
.sku = IWL_SKU_G|IWL_SKU_N,
.valid_tx_ant = ANT_AB, .valid_tx_ant = ANT_AB,
.valid_rx_ant = ANT_AB, .valid_rx_ant = ANT_AB,
.eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,
@ -660,6 +663,8 @@ struct iwl_cfg iwl6000g2b_2bgn_cfg = {
.ht_params = &iwl6000_ht_params, .ht_params = &iwl6000_ht_params,
.need_dc_calib = true, .need_dc_calib = true,
.need_temp_offset_calib = true, .need_temp_offset_calib = true,
.led_mode = IWL_LED_RF_STATE,
.adv_pm = true,
/* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */
.scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A,
}; };
@ -669,7 +674,6 @@ struct iwl_cfg iwl6000g2b_2bg_cfg = {
.fw_name_pre = IWL6000G2B_FW_PRE, .fw_name_pre = IWL6000G2B_FW_PRE,
.ucode_api_max = IWL6000G2_UCODE_API_MAX, .ucode_api_max = IWL6000G2_UCODE_API_MAX,
.ucode_api_min = IWL6000G2_UCODE_API_MIN, .ucode_api_min = IWL6000G2_UCODE_API_MIN,
.sku = IWL_SKU_G,
.valid_tx_ant = ANT_AB, .valid_tx_ant = ANT_AB,
.valid_rx_ant = ANT_AB, .valid_rx_ant = ANT_AB,
.eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,
@ -680,6 +684,8 @@ struct iwl_cfg iwl6000g2b_2bg_cfg = {
.bt_params = &iwl6000_bt_params, .bt_params = &iwl6000_bt_params,
.need_dc_calib = true, .need_dc_calib = true,
.need_temp_offset_calib = true, .need_temp_offset_calib = true,
.led_mode = IWL_LED_RF_STATE,
.adv_pm = true,
/* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */
.scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A,
}; };
@ -689,7 +695,6 @@ struct iwl_cfg iwl6000g2b_bgn_cfg = {
.fw_name_pre = IWL6000G2B_FW_PRE, .fw_name_pre = IWL6000G2B_FW_PRE,
.ucode_api_max = IWL6000G2_UCODE_API_MAX, .ucode_api_max = IWL6000G2_UCODE_API_MAX,
.ucode_api_min = IWL6000G2_UCODE_API_MIN, .ucode_api_min = IWL6000G2_UCODE_API_MIN,
.sku = IWL_SKU_G|IWL_SKU_N,
.valid_tx_ant = ANT_A, .valid_tx_ant = ANT_A,
.valid_rx_ant = ANT_AB, .valid_rx_ant = ANT_AB,
.eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,
@ -701,6 +706,8 @@ struct iwl_cfg iwl6000g2b_bgn_cfg = {
.ht_params = &iwl6000_ht_params, .ht_params = &iwl6000_ht_params,
.need_dc_calib = true, .need_dc_calib = true,
.need_temp_offset_calib = true, .need_temp_offset_calib = true,
.led_mode = IWL_LED_RF_STATE,
.adv_pm = true,
/* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */
.scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A,
}; };
@ -710,7 +717,6 @@ struct iwl_cfg iwl6000g2b_bg_cfg = {
.fw_name_pre = IWL6000G2B_FW_PRE, .fw_name_pre = IWL6000G2B_FW_PRE,
.ucode_api_max = IWL6000G2_UCODE_API_MAX, .ucode_api_max = IWL6000G2_UCODE_API_MAX,
.ucode_api_min = IWL6000G2_UCODE_API_MIN, .ucode_api_min = IWL6000G2_UCODE_API_MIN,
.sku = IWL_SKU_G,
.valid_tx_ant = ANT_A, .valid_tx_ant = ANT_A,
.valid_rx_ant = ANT_AB, .valid_rx_ant = ANT_AB,
.eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,
@ -721,6 +727,8 @@ struct iwl_cfg iwl6000g2b_bg_cfg = {
.bt_params = &iwl6000_bt_params, .bt_params = &iwl6000_bt_params,
.need_dc_calib = true, .need_dc_calib = true,
.need_temp_offset_calib = true, .need_temp_offset_calib = true,
.led_mode = IWL_LED_RF_STATE,
.adv_pm = true,
/* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */
.scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A,
}; };
@ -733,7 +741,6 @@ struct iwl_cfg iwl6000i_2agn_cfg = {
.fw_name_pre = IWL6000_FW_PRE, .fw_name_pre = IWL6000_FW_PRE,
.ucode_api_max = IWL6000_UCODE_API_MAX, .ucode_api_max = IWL6000_UCODE_API_MAX,
.ucode_api_min = IWL6000_UCODE_API_MIN, .ucode_api_min = IWL6000_UCODE_API_MIN,
.sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
.valid_tx_ant = ANT_BC, .valid_tx_ant = ANT_BC,
.valid_rx_ant = ANT_BC, .valid_rx_ant = ANT_BC,
.eeprom_ver = EEPROM_6000_EEPROM_VERSION, .eeprom_ver = EEPROM_6000_EEPROM_VERSION,
@ -743,6 +750,7 @@ struct iwl_cfg iwl6000i_2agn_cfg = {
.base_params = &iwl6000_base_params, .base_params = &iwl6000_base_params,
.ht_params = &iwl6000_ht_params, .ht_params = &iwl6000_ht_params,
.pa_type = IWL_PA_INTERNAL, .pa_type = IWL_PA_INTERNAL,
.led_mode = IWL_LED_BLINK,
}; };
struct iwl_cfg iwl6000i_2abg_cfg = { struct iwl_cfg iwl6000i_2abg_cfg = {
@ -750,7 +758,6 @@ struct iwl_cfg iwl6000i_2abg_cfg = {
.fw_name_pre = IWL6000_FW_PRE, .fw_name_pre = IWL6000_FW_PRE,
.ucode_api_max = IWL6000_UCODE_API_MAX, .ucode_api_max = IWL6000_UCODE_API_MAX,
.ucode_api_min = IWL6000_UCODE_API_MIN, .ucode_api_min = IWL6000_UCODE_API_MIN,
.sku = IWL_SKU_A|IWL_SKU_G,
.valid_tx_ant = ANT_BC, .valid_tx_ant = ANT_BC,
.valid_rx_ant = ANT_BC, .valid_rx_ant = ANT_BC,
.eeprom_ver = EEPROM_6000_EEPROM_VERSION, .eeprom_ver = EEPROM_6000_EEPROM_VERSION,
@ -759,6 +766,7 @@ struct iwl_cfg iwl6000i_2abg_cfg = {
.mod_params = &iwlagn_mod_params, .mod_params = &iwlagn_mod_params,
.base_params = &iwl6000_base_params, .base_params = &iwl6000_base_params,
.pa_type = IWL_PA_INTERNAL, .pa_type = IWL_PA_INTERNAL,
.led_mode = IWL_LED_BLINK,
}; };
struct iwl_cfg iwl6000i_2bg_cfg = { struct iwl_cfg iwl6000i_2bg_cfg = {
@ -766,7 +774,6 @@ struct iwl_cfg iwl6000i_2bg_cfg = {
.fw_name_pre = IWL6000_FW_PRE, .fw_name_pre = IWL6000_FW_PRE,
.ucode_api_max = IWL6000_UCODE_API_MAX, .ucode_api_max = IWL6000_UCODE_API_MAX,
.ucode_api_min = IWL6000_UCODE_API_MIN, .ucode_api_min = IWL6000_UCODE_API_MIN,
.sku = IWL_SKU_G,
.valid_tx_ant = ANT_BC, .valid_tx_ant = ANT_BC,
.valid_rx_ant = ANT_BC, .valid_rx_ant = ANT_BC,
.eeprom_ver = EEPROM_6000_EEPROM_VERSION, .eeprom_ver = EEPROM_6000_EEPROM_VERSION,
@ -775,6 +782,7 @@ struct iwl_cfg iwl6000i_2bg_cfg = {
.mod_params = &iwlagn_mod_params, .mod_params = &iwlagn_mod_params,
.base_params = &iwl6000_base_params, .base_params = &iwl6000_base_params,
.pa_type = IWL_PA_INTERNAL, .pa_type = IWL_PA_INTERNAL,
.led_mode = IWL_LED_BLINK,
}; };
struct iwl_cfg iwl6050_2agn_cfg = { struct iwl_cfg iwl6050_2agn_cfg = {
@ -782,7 +790,6 @@ struct iwl_cfg iwl6050_2agn_cfg = {
.fw_name_pre = IWL6050_FW_PRE, .fw_name_pre = IWL6050_FW_PRE,
.ucode_api_max = IWL6050_UCODE_API_MAX, .ucode_api_max = IWL6050_UCODE_API_MAX,
.ucode_api_min = IWL6050_UCODE_API_MIN, .ucode_api_min = IWL6050_UCODE_API_MIN,
.sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
.valid_tx_ant = ANT_AB, .valid_tx_ant = ANT_AB,
.valid_rx_ant = ANT_AB, .valid_rx_ant = ANT_AB,
.ops = &iwl6050_ops, .ops = &iwl6050_ops,
@ -792,6 +799,7 @@ struct iwl_cfg iwl6050_2agn_cfg = {
.base_params = &iwl6050_base_params, .base_params = &iwl6050_base_params,
.ht_params = &iwl6000_ht_params, .ht_params = &iwl6000_ht_params,
.need_dc_calib = true, .need_dc_calib = true,
.led_mode = IWL_LED_BLINK,
}; };
struct iwl_cfg iwl6050g2_bgn_cfg = { struct iwl_cfg iwl6050g2_bgn_cfg = {
@ -799,7 +807,6 @@ struct iwl_cfg iwl6050g2_bgn_cfg = {
.fw_name_pre = IWL6050_FW_PRE, .fw_name_pre = IWL6050_FW_PRE,
.ucode_api_max = IWL6050_UCODE_API_MAX, .ucode_api_max = IWL6050_UCODE_API_MAX,
.ucode_api_min = IWL6050_UCODE_API_MIN, .ucode_api_min = IWL6050_UCODE_API_MIN,
.sku = IWL_SKU_G|IWL_SKU_N,
.valid_tx_ant = ANT_A, .valid_tx_ant = ANT_A,
.valid_rx_ant = ANT_AB, .valid_rx_ant = ANT_AB,
.eeprom_ver = EEPROM_6050G2_EEPROM_VERSION, .eeprom_ver = EEPROM_6050G2_EEPROM_VERSION,
@ -809,6 +816,7 @@ struct iwl_cfg iwl6050g2_bgn_cfg = {
.base_params = &iwl6050_base_params, .base_params = &iwl6050_base_params,
.ht_params = &iwl6000_ht_params, .ht_params = &iwl6000_ht_params,
.need_dc_calib = true, .need_dc_calib = true,
.led_mode = IWL_LED_RF_STATE,
}; };
struct iwl_cfg iwl6050_2abg_cfg = { struct iwl_cfg iwl6050_2abg_cfg = {
@ -816,7 +824,6 @@ struct iwl_cfg iwl6050_2abg_cfg = {
.fw_name_pre = IWL6050_FW_PRE, .fw_name_pre = IWL6050_FW_PRE,
.ucode_api_max = IWL6050_UCODE_API_MAX, .ucode_api_max = IWL6050_UCODE_API_MAX,
.ucode_api_min = IWL6050_UCODE_API_MIN, .ucode_api_min = IWL6050_UCODE_API_MIN,
.sku = IWL_SKU_A|IWL_SKU_G,
.valid_tx_ant = ANT_AB, .valid_tx_ant = ANT_AB,
.valid_rx_ant = ANT_AB, .valid_rx_ant = ANT_AB,
.eeprom_ver = EEPROM_6050_EEPROM_VERSION, .eeprom_ver = EEPROM_6050_EEPROM_VERSION,
@ -825,6 +832,7 @@ struct iwl_cfg iwl6050_2abg_cfg = {
.mod_params = &iwlagn_mod_params, .mod_params = &iwlagn_mod_params,
.base_params = &iwl6050_base_params, .base_params = &iwl6050_base_params,
.need_dc_calib = true, .need_dc_calib = true,
.led_mode = IWL_LED_BLINK,
}; };
struct iwl_cfg iwl6000_3agn_cfg = { struct iwl_cfg iwl6000_3agn_cfg = {
@ -832,7 +840,6 @@ struct iwl_cfg iwl6000_3agn_cfg = {
.fw_name_pre = IWL6000_FW_PRE, .fw_name_pre = IWL6000_FW_PRE,
.ucode_api_max = IWL6000_UCODE_API_MAX, .ucode_api_max = IWL6000_UCODE_API_MAX,
.ucode_api_min = IWL6000_UCODE_API_MIN, .ucode_api_min = IWL6000_UCODE_API_MIN,
.sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
.valid_tx_ant = ANT_ABC, .valid_tx_ant = ANT_ABC,
.valid_rx_ant = ANT_ABC, .valid_rx_ant = ANT_ABC,
.eeprom_ver = EEPROM_6000_EEPROM_VERSION, .eeprom_ver = EEPROM_6000_EEPROM_VERSION,
@ -842,6 +849,7 @@ struct iwl_cfg iwl6000_3agn_cfg = {
.base_params = &iwl6000_base_params, .base_params = &iwl6000_base_params,
.ht_params = &iwl6000_ht_params, .ht_params = &iwl6000_ht_params,
.need_dc_calib = true, .need_dc_calib = true,
.led_mode = IWL_LED_BLINK,
}; };
struct iwl_cfg iwl130_bgn_cfg = { struct iwl_cfg iwl130_bgn_cfg = {
@ -849,7 +857,6 @@ struct iwl_cfg iwl130_bgn_cfg = {
.fw_name_pre = IWL6000G2B_FW_PRE, .fw_name_pre = IWL6000G2B_FW_PRE,
.ucode_api_max = IWL6000G2_UCODE_API_MAX, .ucode_api_max = IWL6000G2_UCODE_API_MAX,
.ucode_api_min = IWL6000G2_UCODE_API_MIN, .ucode_api_min = IWL6000G2_UCODE_API_MIN,
.sku = IWL_SKU_G|IWL_SKU_N,
.valid_tx_ant = ANT_A, .valid_tx_ant = ANT_A,
.valid_rx_ant = ANT_A, .valid_rx_ant = ANT_A,
.eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,
@ -860,6 +867,8 @@ struct iwl_cfg iwl130_bgn_cfg = {
.bt_params = &iwl6000_bt_params, .bt_params = &iwl6000_bt_params,
.ht_params = &iwl6000_ht_params, .ht_params = &iwl6000_ht_params,
.need_dc_calib = true, .need_dc_calib = true,
.led_mode = IWL_LED_RF_STATE,
.adv_pm = true,
/* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */
.scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A,
}; };
@ -869,7 +878,6 @@ struct iwl_cfg iwl130_bg_cfg = {
.fw_name_pre = IWL6000G2B_FW_PRE, .fw_name_pre = IWL6000G2B_FW_PRE,
.ucode_api_max = IWL6000G2_UCODE_API_MAX, .ucode_api_max = IWL6000G2_UCODE_API_MAX,
.ucode_api_min = IWL6000G2_UCODE_API_MIN, .ucode_api_min = IWL6000G2_UCODE_API_MIN,
.sku = IWL_SKU_G,
.valid_tx_ant = ANT_A, .valid_tx_ant = ANT_A,
.valid_rx_ant = ANT_A, .valid_rx_ant = ANT_A,
.eeprom_ver = EEPROM_6000G2_EEPROM_VERSION, .eeprom_ver = EEPROM_6000G2_EEPROM_VERSION,
@ -879,6 +887,8 @@ struct iwl_cfg iwl130_bg_cfg = {
.base_params = &iwl6000_coex_base_params, .base_params = &iwl6000_coex_base_params,
.bt_params = &iwl6000_bt_params, .bt_params = &iwl6000_bt_params,
.need_dc_calib = true, .need_dc_calib = true,
.led_mode = IWL_LED_RF_STATE,
.adv_pm = true,
/* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */ /* Due to bluetooth, we transmit 2.4 GHz probes only on antenna A */
.scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A, .scan_tx_antennas[IEEE80211_BAND_2GHZ] = ANT_A,
}; };

View file

@ -248,6 +248,27 @@ err:
} }
int iwl_eeprom_check_sku(struct iwl_priv *priv)
{
u16 eeprom_sku;
eeprom_sku = iwl_eeprom_query16(priv, EEPROM_SKU_CAP);
priv->cfg->sku = ((eeprom_sku & EEPROM_SKU_CAP_BAND_SELECTION) >>
EEPROM_SKU_CAP_BAND_POS);
if (eeprom_sku & EEPROM_SKU_CAP_11N_ENABLE)
priv->cfg->sku |= IWL_SKU_N;
if (!priv->cfg->sku) {
IWL_ERR(priv, "Invalid device sku\n");
return -EINVAL;
}
IWL_INFO(priv, "Device SKU: 0X%x\n", priv->cfg->sku);
return 0;
}
void iwl_eeprom_get_mac(const struct iwl_priv *priv, u8 *mac) void iwl_eeprom_get_mac(const struct iwl_priv *priv, u8 *mac)
{ {
const u8 *addr = priv->cfg->ops->lib->eeprom_ops.query_addr(priv, const u8 *addr = priv->cfg->ops->lib->eeprom_ops.query_addr(priv,

View file

@ -307,6 +307,7 @@ static int iwlagn_set_pan_params(struct iwl_priv *priv)
if (ctx_bss->vif && ctx_pan->vif) { if (ctx_bss->vif && ctx_pan->vif) {
int bcnint = ctx_pan->vif->bss_conf.beacon_int; int bcnint = ctx_pan->vif->bss_conf.beacon_int;
int dtim = ctx_pan->vif->bss_conf.dtim_period ?: 1;
/* should be set, but seems unused?? */ /* should be set, but seems unused?? */
cmd.flags |= cpu_to_le16(IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE); cmd.flags |= cpu_to_le16(IWL_WIPAN_PARAMS_FLG_SLOTTED_MODE);
@ -329,10 +330,10 @@ static int iwlagn_set_pan_params(struct iwl_priv *priv)
if (test_bit(STATUS_SCAN_HW, &priv->status) || if (test_bit(STATUS_SCAN_HW, &priv->status) ||
(!ctx_bss->vif->bss_conf.idle && (!ctx_bss->vif->bss_conf.idle &&
!ctx_bss->vif->bss_conf.assoc)) { !ctx_bss->vif->bss_conf.assoc)) {
slot0 = bcnint * 3 - 20; slot0 = dtim * bcnint * 3 - 20;
slot1 = 20; slot1 = 20;
} else if (!ctx_pan->vif->bss_conf.idle && } else if (!ctx_pan->vif->bss_conf.idle &&
!ctx_pan->vif->bss_conf.assoc) { !ctx_pan->vif->bss_conf.assoc) {
slot1 = bcnint * 3 - 20; slot1 = bcnint * 3 - 20;
slot0 = 20; slot0 = 20;
} }

View file

@ -445,22 +445,17 @@ static void iwlagn_rx_reply_tx(struct iwl_priv *priv,
if (priv->mac80211_registered && if (priv->mac80211_registered &&
(iwl_queue_space(&txq->q) > txq->q.low_mark) && (iwl_queue_space(&txq->q) > txq->q.low_mark) &&
(agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) { (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA))
if (agg->state == IWL_AGG_OFF) iwl_wake_queue(priv, txq);
iwl_wake_queue(priv, txq_id);
else
iwl_wake_queue(priv, txq->swq_id);
}
} }
} else { } else {
BUG_ON(txq_id != txq->swq_id);
iwlagn_set_tx_status(priv, info, tx_resp, txq_id, false); iwlagn_set_tx_status(priv, info, tx_resp, txq_id, false);
freed = iwlagn_tx_queue_reclaim(priv, txq_id, index); freed = iwlagn_tx_queue_reclaim(priv, txq_id, index);
iwl_free_tfds_in_queue(priv, sta_id, tid, freed); iwl_free_tfds_in_queue(priv, sta_id, tid, freed);
if (priv->mac80211_registered && if (priv->mac80211_registered &&
(iwl_queue_space(&txq->q) > txq->q.low_mark)) (iwl_queue_space(&txq->q) > txq->q.low_mark))
iwl_wake_queue(priv, txq_id); iwl_wake_queue(priv, txq);
} }
iwlagn_txq_check_empty(priv, sta_id, tid, txq_id); iwlagn_txq_check_empty(priv, sta_id, tid, txq_id);
@ -1834,6 +1829,10 @@ void iwlagn_send_advance_bt_config(struct iwl_priv *priv)
} else { } else {
bt_cmd.flags = IWLAGN_BT_FLAG_COEX_MODE_3W << bt_cmd.flags = IWLAGN_BT_FLAG_COEX_MODE_3W <<
IWLAGN_BT_FLAG_COEX_MODE_SHIFT; IWLAGN_BT_FLAG_COEX_MODE_SHIFT;
if (priv->cfg->bt_params &&
priv->cfg->bt_params->bt_sco_disable)
bt_cmd.flags |= IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE;
if (priv->bt_ch_announce) if (priv->bt_ch_announce)
bt_cmd.flags |= IWLAGN_BT_FLAG_CHANNEL_INHIBITION; bt_cmd.flags |= IWLAGN_BT_FLAG_CHANNEL_INHIBITION;
IWL_DEBUG_INFO(priv, "BT coex flag: 0X%x\n", bt_cmd.flags); IWL_DEBUG_INFO(priv, "BT coex flag: 0X%x\n", bt_cmd.flags);
@ -2001,7 +2000,7 @@ static void iwlagn_set_kill_ack_msk(struct iwl_priv *priv,
struct iwl_bt_uart_msg *uart_msg) struct iwl_bt_uart_msg *uart_msg)
{ {
u8 kill_ack_msk; u8 kill_ack_msk;
__le32 bt_kill_ack_msg[2] = { static const __le32 bt_kill_ack_msg[2] = {
cpu_to_le32(0xFFFFFFF), cpu_to_le32(0xFFFFFC00) }; cpu_to_le32(0xFFFFFFF), cpu_to_le32(0xFFFFFC00) };
kill_ack_msk = (((BT_UART_MSG_FRAME3A2DP_MSK | kill_ack_msk = (((BT_UART_MSG_FRAME3A2DP_MSK |
@ -2025,7 +2024,6 @@ void iwlagn_bt_coex_profile_notif(struct iwl_priv *priv,
struct iwl_bt_coex_profile_notif *coex = &pkt->u.bt_coex_profile_notif; struct iwl_bt_coex_profile_notif *coex = &pkt->u.bt_coex_profile_notif;
struct iwlagn_bt_sco_cmd sco_cmd = { .flags = 0 }; struct iwlagn_bt_sco_cmd sco_cmd = { .flags = 0 };
struct iwl_bt_uart_msg *uart_msg = &coex->last_bt_uart_msg; struct iwl_bt_uart_msg *uart_msg = &coex->last_bt_uart_msg;
u8 last_traffic_load;
IWL_DEBUG_NOTIF(priv, "BT Coex notification:\n"); IWL_DEBUG_NOTIF(priv, "BT Coex notification:\n");
IWL_DEBUG_NOTIF(priv, " status: %d\n", coex->bt_status); IWL_DEBUG_NOTIF(priv, " status: %d\n", coex->bt_status);
@ -2034,11 +2032,10 @@ void iwlagn_bt_coex_profile_notif(struct iwl_priv *priv,
coex->bt_ci_compliance); coex->bt_ci_compliance);
iwlagn_print_uartmsg(priv, uart_msg); iwlagn_print_uartmsg(priv, uart_msg);
last_traffic_load = priv->notif_bt_traffic_load; priv->last_bt_traffic_load = priv->bt_traffic_load;
priv->notif_bt_traffic_load = coex->bt_traffic_load;
if (priv->iw_mode != NL80211_IFTYPE_ADHOC) { if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
if (priv->bt_status != coex->bt_status || if (priv->bt_status != coex->bt_status ||
last_traffic_load != coex->bt_traffic_load) { priv->last_bt_traffic_load != coex->bt_traffic_load) {
if (coex->bt_status) { if (coex->bt_status) {
/* BT on */ /* BT on */
if (!priv->bt_ch_announce) if (!priv->bt_ch_announce)
@ -2287,7 +2284,7 @@ static const char *get_csr_string(int cmd)
void iwl_dump_csr(struct iwl_priv *priv) void iwl_dump_csr(struct iwl_priv *priv)
{ {
int i; int i;
u32 csr_tbl[] = { static const u32 csr_tbl[] = {
CSR_HW_IF_CONFIG_REG, CSR_HW_IF_CONFIG_REG,
CSR_INT_COALESCING, CSR_INT_COALESCING,
CSR_INT, CSR_INT,
@ -2346,7 +2343,7 @@ int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
int pos = 0; int pos = 0;
size_t bufsz = 0; size_t bufsz = 0;
#endif #endif
u32 fh_tbl[] = { static const u32 fh_tbl[] = {
FH_RSCSR_CHNL0_STTS_WPTR_REG, FH_RSCSR_CHNL0_STTS_WPTR_REG,
FH_RSCSR_CHNL0_RBDCB_BASE_REG, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
FH_RSCSR_CHNL0_WPTR, FH_RSCSR_CHNL0_WPTR,

View file

@ -833,17 +833,23 @@ static void rs_bt_update_lq(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
struct iwl_lq_sta *lq_sta) struct iwl_lq_sta *lq_sta)
{ {
struct iwl_scale_tbl_info *tbl; struct iwl_scale_tbl_info *tbl;
bool full_concurrent; bool full_concurrent = priv->bt_full_concurrent;
unsigned long flags; unsigned long flags;
spin_lock_irqsave(&priv->lock, flags); if (priv->bt_ant_couple_ok) {
if (priv->bt_ci_compliance && priv->bt_ant_couple_ok) /*
full_concurrent = true; * Is there a need to switch between
else * full concurrency and 3-wire?
full_concurrent = false; */
spin_unlock_irqrestore(&priv->lock, flags); spin_lock_irqsave(&priv->lock, flags);
if (priv->bt_ci_compliance && priv->bt_ant_couple_ok)
if (priv->bt_full_concurrent != full_concurrent) { full_concurrent = true;
else
full_concurrent = false;
spin_unlock_irqrestore(&priv->lock, flags);
}
if ((priv->bt_traffic_load != priv->last_bt_traffic_load) ||
(priv->bt_full_concurrent != full_concurrent)) {
priv->bt_full_concurrent = full_concurrent; priv->bt_full_concurrent = full_concurrent;
/* Update uCode's rate table. */ /* Update uCode's rate table. */
@ -1040,8 +1046,7 @@ done:
if (sta && sta->supp_rates[sband->band]) if (sta && sta->supp_rates[sband->band])
rs_rate_scale_perform(priv, skb, sta, lq_sta); rs_rate_scale_perform(priv, skb, sta, lq_sta);
/* Is there a need to switch between full concurrency and 3-wire? */ if (priv->cfg->bt_params && priv->cfg->bt_params->advanced_bt_coexist)
if (priv->bt_ant_couple_ok)
rs_bt_update_lq(priv, ctx, lq_sta); rs_bt_update_lq(priv, ctx, lq_sta);
} }
@ -3010,10 +3015,7 @@ static void rs_fill_link_cmd(struct iwl_priv *priv,
*/ */
if (priv && priv->cfg->bt_params && if (priv && priv->cfg->bt_params &&
priv->cfg->bt_params->agg_time_limit && priv->cfg->bt_params->agg_time_limit &&
priv->cfg->bt_params->agg_time_limit >= priv->bt_traffic_load >= IWL_BT_COEX_TRAFFIC_LOAD_HIGH)
LINK_QUAL_AGG_TIME_LIMIT_MIN &&
priv->cfg->bt_params->agg_time_limit <=
LINK_QUAL_AGG_TIME_LIMIT_MAX)
lq_cmd->agg_params.agg_time_limit = lq_cmd->agg_params.agg_time_limit =
cpu_to_le16(priv->cfg->bt_params->agg_time_limit); cpu_to_le16(priv->cfg->bt_params->agg_time_limit);
} }

View file

@ -72,6 +72,34 @@ static int iwlagn_disable_pan(struct iwl_priv *priv,
return ret; return ret;
} }
static void iwlagn_update_qos(struct iwl_priv *priv,
struct iwl_rxon_context *ctx)
{
int ret;
if (!ctx->is_active)
return;
ctx->qos_data.def_qos_parm.qos_flags = 0;
if (ctx->qos_data.qos_active)
ctx->qos_data.def_qos_parm.qos_flags |=
QOS_PARAM_FLG_UPDATE_EDCA_MSK;
if (ctx->ht.enabled)
ctx->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
ctx->qos_data.qos_active,
ctx->qos_data.def_qos_parm.qos_flags);
ret = iwl_send_cmd_pdu(priv, ctx->qos_cmd,
sizeof(struct iwl_qosparam_cmd),
&ctx->qos_data.def_qos_parm);
if (ret)
IWL_ERR(priv, "Failed to update QoS\n");
}
static int iwlagn_update_beacon(struct iwl_priv *priv, static int iwlagn_update_beacon(struct iwl_priv *priv,
struct ieee80211_vif *vif) struct ieee80211_vif *vif)
{ {
@ -97,6 +125,7 @@ int iwlagn_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
/* cast away the const for active_rxon in this function */ /* cast away the const for active_rxon in this function */
struct iwl_rxon_cmd *active = (void *)&ctx->active; struct iwl_rxon_cmd *active = (void *)&ctx->active;
bool new_assoc = !!(ctx->staging.filter_flags & RXON_FILTER_ASSOC_MSK); bool new_assoc = !!(ctx->staging.filter_flags & RXON_FILTER_ASSOC_MSK);
bool old_assoc = !!(ctx->active.filter_flags & RXON_FILTER_ASSOC_MSK);
int ret; int ret;
lockdep_assert_held(&priv->mutex); lockdep_assert_held(&priv->mutex);
@ -176,25 +205,27 @@ int iwlagn_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
* AP station must be done after the BSSID is set to correctly * AP station must be done after the BSSID is set to correctly
* set up filters in the device. * set up filters in the device.
*/ */
if (ctx->ctxid == IWL_RXON_CTX_BSS) if ((old_assoc && new_assoc) || !new_assoc) {
ret = iwlagn_disable_bss(priv, ctx, &ctx->staging); if (ctx->ctxid == IWL_RXON_CTX_BSS)
else ret = iwlagn_disable_bss(priv, ctx, &ctx->staging);
ret = iwlagn_disable_pan(priv, ctx, &ctx->staging); else
if (ret) ret = iwlagn_disable_pan(priv, ctx, &ctx->staging);
return ret; if (ret)
return ret;
memcpy(active, &ctx->staging, sizeof(*active)); memcpy(active, &ctx->staging, sizeof(*active));
/* /*
* Un-assoc RXON clears the station table and WEP * Un-assoc RXON clears the station table and WEP
* keys, so we have to restore those afterwards. * keys, so we have to restore those afterwards.
*/ */
iwl_clear_ucode_stations(priv, ctx); iwl_clear_ucode_stations(priv, ctx);
iwl_restore_stations(priv, ctx); iwl_restore_stations(priv, ctx);
ret = iwl_restore_default_wep_keys(priv, ctx); ret = iwl_restore_default_wep_keys(priv, ctx);
if (ret) { if (ret) {
IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret); IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
return ret; return ret;
}
} }
/* RXON timing must be before associated RXON */ /* RXON timing must be before associated RXON */
@ -205,6 +236,9 @@ int iwlagn_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
} }
if (new_assoc) { if (new_assoc) {
/* QoS info may be cleared by previous un-assoc RXON */
iwlagn_update_qos(priv, ctx);
/* /*
* We'll run into this code path when beaconing is * We'll run into this code path when beaconing is
* enabled, but then we also need to send the beacon * enabled, but then we also need to send the beacon
@ -235,6 +269,8 @@ int iwlagn_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
} }
memcpy(active, &ctx->staging, sizeof(*active)); memcpy(active, &ctx->staging, sizeof(*active));
iwl_reprogram_ap_sta(priv, ctx);
/* IBSS beacon needs to be sent after setting assoc */ /* IBSS beacon needs to be sent after setting assoc */
if (ctx->vif && (ctx->vif->type == NL80211_IFTYPE_ADHOC)) if (ctx->vif && (ctx->vif->type == NL80211_IFTYPE_ADHOC))
if (iwlagn_update_beacon(priv, ctx->vif)) if (iwlagn_update_beacon(priv, ctx->vif))
@ -261,34 +297,6 @@ int iwlagn_commit_rxon(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
return 0; return 0;
} }
static void iwlagn_update_qos(struct iwl_priv *priv,
struct iwl_rxon_context *ctx)
{
int ret;
if (!ctx->is_active)
return;
ctx->qos_data.def_qos_parm.qos_flags = 0;
if (ctx->qos_data.qos_active)
ctx->qos_data.def_qos_parm.qos_flags |=
QOS_PARAM_FLG_UPDATE_EDCA_MSK;
if (ctx->ht.enabled)
ctx->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
ctx->qos_data.qos_active,
ctx->qos_data.def_qos_parm.qos_flags);
ret = iwl_send_cmd_pdu(priv, ctx->qos_cmd,
sizeof(struct iwl_qosparam_cmd),
&ctx->qos_data.def_qos_parm);
if (ret)
IWL_ERR(priv, "Failed to update QoS\n");
}
int iwlagn_mac_config(struct ieee80211_hw *hw, u32 changed) int iwlagn_mac_config(struct ieee80211_hw *hw, u32 changed)
{ {
struct iwl_priv *priv = hw->priv; struct iwl_priv *priv = hw->priv;
@ -507,6 +515,11 @@ void iwlagn_bss_info_changed(struct ieee80211_hw *hw,
mutex_lock(&priv->mutex); mutex_lock(&priv->mutex);
if (WARN_ON(!ctx->vif)) {
mutex_unlock(&priv->mutex);
return;
}
if (changes & BSS_CHANGED_BEACON_INT) if (changes & BSS_CHANGED_BEACON_INT)
force = true; force = true;

View file

@ -518,11 +518,11 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
struct iwl_cmd_meta *out_meta; struct iwl_cmd_meta *out_meta;
struct iwl_tx_cmd *tx_cmd; struct iwl_tx_cmd *tx_cmd;
struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS]; struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
int swq_id, txq_id; int txq_id;
dma_addr_t phys_addr; dma_addr_t phys_addr;
dma_addr_t txcmd_phys; dma_addr_t txcmd_phys;
dma_addr_t scratch_phys; dma_addr_t scratch_phys;
u16 len, len_org, firstlen, secondlen; u16 len, firstlen, secondlen;
u16 seq_number = 0; u16 seq_number = 0;
__le16 fc; __le16 fc;
u8 hdr_len; u8 hdr_len;
@ -620,7 +620,6 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
} }
txq = &priv->txq[txq_id]; txq = &priv->txq[txq_id];
swq_id = txq->swq_id;
q = &txq->q; q = &txq->q;
if (unlikely(iwl_queue_space(q) < q->high_mark)) { if (unlikely(iwl_queue_space(q) < q->high_mark)) {
@ -687,30 +686,23 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
*/ */
len = sizeof(struct iwl_tx_cmd) + len = sizeof(struct iwl_tx_cmd) +
sizeof(struct iwl_cmd_header) + hdr_len; sizeof(struct iwl_cmd_header) + hdr_len;
firstlen = (len + 3) & ~3;
len_org = len;
firstlen = len = (len + 3) & ~3;
if (len_org != len)
len_org = 1;
else
len_org = 0;
/* Tell NIC about any 2-byte padding after MAC header */ /* Tell NIC about any 2-byte padding after MAC header */
if (len_org) if (firstlen != len)
tx_cmd->tx_flags |= TX_CMD_FLG_MH_PAD_MSK; tx_cmd->tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
/* Physical address of this Tx command's header (not MAC header!), /* Physical address of this Tx command's header (not MAC header!),
* within command buffer array. */ * within command buffer array. */
txcmd_phys = pci_map_single(priv->pci_dev, txcmd_phys = pci_map_single(priv->pci_dev,
&out_cmd->hdr, len, &out_cmd->hdr, firstlen,
PCI_DMA_BIDIRECTIONAL); PCI_DMA_BIDIRECTIONAL);
dma_unmap_addr_set(out_meta, mapping, txcmd_phys); dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
dma_unmap_len_set(out_meta, len, len); dma_unmap_len_set(out_meta, len, firstlen);
/* Add buffer containing Tx command and MAC(!) header to TFD's /* Add buffer containing Tx command and MAC(!) header to TFD's
* first entry */ * first entry */
priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq, priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
txcmd_phys, len, 1, 0); txcmd_phys, firstlen, 1, 0);
if (!ieee80211_has_morefrags(hdr->frame_control)) { if (!ieee80211_has_morefrags(hdr->frame_control)) {
txq->need_update = 1; txq->need_update = 1;
@ -721,23 +713,21 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
/* Set up TFD's 2nd entry to point directly to remainder of skb, /* Set up TFD's 2nd entry to point directly to remainder of skb,
* if any (802.11 null frames have no payload). */ * if any (802.11 null frames have no payload). */
secondlen = len = skb->len - hdr_len; secondlen = skb->len - hdr_len;
if (len) { if (secondlen > 0) {
phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len, phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
len, PCI_DMA_TODEVICE); secondlen, PCI_DMA_TODEVICE);
priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq, priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
phys_addr, len, phys_addr, secondlen,
0, 0); 0, 0);
} }
scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) + scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
offsetof(struct iwl_tx_cmd, scratch); offsetof(struct iwl_tx_cmd, scratch);
len = sizeof(struct iwl_tx_cmd) +
sizeof(struct iwl_cmd_header) + hdr_len;
/* take back ownership of DMA buffer to enable update */ /* take back ownership of DMA buffer to enable update */
pci_dma_sync_single_for_cpu(priv->pci_dev, txcmd_phys, pci_dma_sync_single_for_cpu(priv->pci_dev, txcmd_phys,
len, PCI_DMA_BIDIRECTIONAL); firstlen, PCI_DMA_BIDIRECTIONAL);
tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys); tx_cmd->dram_lsb_ptr = cpu_to_le32(scratch_phys);
tx_cmd->dram_msb_ptr = iwl_get_dma_hi_addr(scratch_phys); tx_cmd->dram_msb_ptr = iwl_get_dma_hi_addr(scratch_phys);
@ -753,7 +743,7 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
le16_to_cpu(tx_cmd->len)); le16_to_cpu(tx_cmd->len));
pci_dma_sync_single_for_device(priv->pci_dev, txcmd_phys, pci_dma_sync_single_for_device(priv->pci_dev, txcmd_phys,
len, PCI_DMA_BIDIRECTIONAL); firstlen, PCI_DMA_BIDIRECTIONAL);
trace_iwlwifi_dev_tx(priv, trace_iwlwifi_dev_tx(priv,
&((struct iwl_tfd *)txq->tfds)[txq->q.write_ptr], &((struct iwl_tfd *)txq->tfds)[txq->q.write_ptr],
@ -784,7 +774,7 @@ int iwlagn_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
iwl_txq_update_write_ptr(priv, txq); iwl_txq_update_write_ptr(priv, txq);
spin_unlock_irqrestore(&priv->lock, flags); spin_unlock_irqrestore(&priv->lock, flags);
} else { } else {
iwl_stop_queue(priv, txq->swq_id); iwl_stop_queue(priv, txq);
} }
} }
@ -1013,7 +1003,7 @@ int iwlagn_tx_agg_start(struct iwl_priv *priv, struct ieee80211_vif *vif,
tid_data = &priv->stations[sta_id].tid[tid]; tid_data = &priv->stations[sta_id].tid[tid];
*ssn = SEQ_TO_SN(tid_data->seq_number); *ssn = SEQ_TO_SN(tid_data->seq_number);
tid_data->agg.txq_id = txq_id; tid_data->agg.txq_id = txq_id;
priv->txq[txq_id].swq_id = iwl_virtual_agg_queue_num(get_ac_from_tid(tid), txq_id); iwl_set_swq_id(&priv->txq[txq_id], get_ac_from_tid(tid), txq_id);
spin_unlock_irqrestore(&priv->sta_lock, flags); spin_unlock_irqrestore(&priv->sta_lock, flags);
ret = priv->cfg->ops->lib->txq_agg_enable(priv, txq_id, tx_fifo, ret = priv->cfg->ops->lib->txq_agg_enable(priv, txq_id, tx_fifo,
@ -1241,37 +1231,61 @@ static int iwlagn_tx_status_reply_compressed_ba(struct iwl_priv *priv,
if (sh < 0) /* tbw something is wrong with indices */ if (sh < 0) /* tbw something is wrong with indices */
sh += 0x100; sh += 0x100;
/* don't use 64-bit values for now */
bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
if (agg->frame_count > (64 - sh)) { if (agg->frame_count > (64 - sh)) {
IWL_DEBUG_TX_REPLY(priv, "more frames than bitmap size"); IWL_DEBUG_TX_REPLY(priv, "more frames than bitmap size");
return -1; return -1;
} }
if (!priv->cfg->base_params->no_agg_framecnt_info && ba_resp->txed) {
/*
* sent and ack information provided by uCode
* use it instead of figure out ourself
*/
if (ba_resp->txed_2_done > ba_resp->txed) {
IWL_DEBUG_TX_REPLY(priv,
"bogus sent(%d) and ack(%d) count\n",
ba_resp->txed, ba_resp->txed_2_done);
/*
* set txed_2_done = txed,
* so it won't impact rate scale
*/
ba_resp->txed = ba_resp->txed_2_done;
}
IWL_DEBUG_HT(priv, "agg frames sent:%d, acked:%d\n",
ba_resp->txed, ba_resp->txed_2_done);
} else {
/* don't use 64-bit values for now */
bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
/* check for success or failure according to the /* check for success or failure according to the
* transmitted bitmap and block-ack bitmap */ * transmitted bitmap and block-ack bitmap */
sent_bitmap = bitmap & agg->bitmap; sent_bitmap = bitmap & agg->bitmap;
/* For each frame attempted in aggregation, /* For each frame attempted in aggregation,
* update driver's record of tx frame's status. */ * update driver's record of tx frame's status. */
i = 0; i = 0;
while (sent_bitmap) { while (sent_bitmap) {
ack = sent_bitmap & 1ULL; ack = sent_bitmap & 1ULL;
successes += ack; successes += ack;
IWL_DEBUG_TX_REPLY(priv, "%s ON i=%d idx=%d raw=%d\n", IWL_DEBUG_TX_REPLY(priv, "%s ON i=%d idx=%d raw=%d\n",
ack ? "ACK" : "NACK", i, (agg->start_idx + i) & 0xff, ack ? "ACK" : "NACK", i,
agg->start_idx + i); (agg->start_idx + i) & 0xff,
sent_bitmap >>= 1; agg->start_idx + i);
++i; sent_bitmap >>= 1;
++i;
}
} }
info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb); info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb);
memset(&info->status, 0, sizeof(info->status)); memset(&info->status, 0, sizeof(info->status));
info->flags |= IEEE80211_TX_STAT_ACK; info->flags |= IEEE80211_TX_STAT_ACK;
info->flags |= IEEE80211_TX_STAT_AMPDU; info->flags |= IEEE80211_TX_STAT_AMPDU;
info->status.ampdu_ack_len = successes; if (!priv->cfg->base_params->no_agg_framecnt_info && ba_resp->txed) {
info->status.ampdu_len = agg->frame_count; info->status.ampdu_ack_len = ba_resp->txed_2_done;
info->status.ampdu_len = ba_resp->txed;
} else {
info->status.ampdu_ack_len = successes;
info->status.ampdu_len = agg->frame_count;
}
iwlagn_hwrate_to_tx_control(priv, agg->rate_n_flags, info); iwlagn_hwrate_to_tx_control(priv, agg->rate_n_flags, info);
IWL_DEBUG_TX_REPLY(priv, "Bitmap %llx\n", (unsigned long long)bitmap); IWL_DEBUG_TX_REPLY(priv, "Bitmap %llx\n", (unsigned long long)bitmap);
@ -1385,7 +1399,7 @@ void iwlagn_rx_reply_compressed_ba(struct iwl_priv *priv,
if ((iwl_queue_space(&txq->q) > txq->q.low_mark) && if ((iwl_queue_space(&txq->q) > txq->q.low_mark) &&
priv->mac80211_registered && priv->mac80211_registered &&
(agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)) (agg->state != IWL_EMPTYING_HW_QUEUE_DELBA))
iwl_wake_queue(priv, txq->swq_id); iwl_wake_queue(priv, txq);
iwlagn_txq_check_empty(priv, sta_id, tid, scd_flow); iwlagn_txq_check_empty(priv, sta_id, tid, scd_flow);
} }

View file

@ -40,30 +40,36 @@
#include "iwl-agn.h" #include "iwl-agn.h"
#include "iwl-agn-calib.h" #include "iwl-agn-calib.h"
static const s8 iwlagn_default_queue_to_tx_fifo[] = { #define IWL_AC_UNSET -1
IWL_TX_FIFO_VO,
IWL_TX_FIFO_VI, struct queue_to_fifo_ac {
IWL_TX_FIFO_BE, s8 fifo, ac;
IWL_TX_FIFO_BK,
IWLAGN_CMD_FIFO_NUM,
IWL_TX_FIFO_UNUSED,
IWL_TX_FIFO_UNUSED,
IWL_TX_FIFO_UNUSED,
IWL_TX_FIFO_UNUSED,
IWL_TX_FIFO_UNUSED,
}; };
static const s8 iwlagn_ipan_queue_to_tx_fifo[] = { static const struct queue_to_fifo_ac iwlagn_default_queue_to_tx_fifo[] = {
IWL_TX_FIFO_VO, { IWL_TX_FIFO_VO, 0, },
IWL_TX_FIFO_VI, { IWL_TX_FIFO_VI, 1, },
IWL_TX_FIFO_BE, { IWL_TX_FIFO_BE, 2, },
IWL_TX_FIFO_BK, { IWL_TX_FIFO_BK, 3, },
IWL_TX_FIFO_BK_IPAN, { IWLAGN_CMD_FIFO_NUM, IWL_AC_UNSET, },
IWL_TX_FIFO_BE_IPAN, { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
IWL_TX_FIFO_VI_IPAN, { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
IWL_TX_FIFO_VO_IPAN, { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
IWL_TX_FIFO_BE_IPAN, { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
IWLAGN_CMD_FIFO_NUM, { IWL_TX_FIFO_UNUSED, IWL_AC_UNSET, },
};
static const struct queue_to_fifo_ac iwlagn_ipan_queue_to_tx_fifo[] = {
{ IWL_TX_FIFO_VO, 0, },
{ IWL_TX_FIFO_VI, 1, },
{ IWL_TX_FIFO_BE, 2, },
{ IWL_TX_FIFO_BK, 3, },
{ IWL_TX_FIFO_BK_IPAN, 3, },
{ IWL_TX_FIFO_BE_IPAN, 2, },
{ IWL_TX_FIFO_VI_IPAN, 1, },
{ IWL_TX_FIFO_VO_IPAN, 0, },
{ IWL_TX_FIFO_BE_IPAN, 2, },
{ IWLAGN_CMD_FIFO_NUM, IWL_AC_UNSET, },
}; };
static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = { static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
@ -429,7 +435,7 @@ void iwlagn_send_bt_env(struct iwl_priv *priv, u8 action, u8 type)
int iwlagn_alive_notify(struct iwl_priv *priv) int iwlagn_alive_notify(struct iwl_priv *priv)
{ {
const s8 *queues; const struct queue_to_fifo_ac *queue_to_fifo;
u32 a; u32 a;
unsigned long flags; unsigned long flags;
int i, chan; int i, chan;
@ -492,9 +498,9 @@ int iwlagn_alive_notify(struct iwl_priv *priv)
/* map queues to FIFOs */ /* map queues to FIFOs */
if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS)) if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS))
queues = iwlagn_ipan_queue_to_tx_fifo; queue_to_fifo = iwlagn_ipan_queue_to_tx_fifo;
else else
queues = iwlagn_default_queue_to_tx_fifo; queue_to_fifo = iwlagn_default_queue_to_tx_fifo;
iwlagn_set_wr_ptrs(priv, priv->cmd_queue, 0); iwlagn_set_wr_ptrs(priv, priv->cmd_queue, 0);
@ -510,14 +516,17 @@ int iwlagn_alive_notify(struct iwl_priv *priv)
BUILD_BUG_ON(ARRAY_SIZE(iwlagn_ipan_queue_to_tx_fifo) != 10); BUILD_BUG_ON(ARRAY_SIZE(iwlagn_ipan_queue_to_tx_fifo) != 10);
for (i = 0; i < 10; i++) { for (i = 0; i < 10; i++) {
int ac = queues[i]; int fifo = queue_to_fifo[i].fifo;
int ac = queue_to_fifo[i].ac;
iwl_txq_ctx_activate(priv, i); iwl_txq_ctx_activate(priv, i);
if (ac == IWL_TX_FIFO_UNUSED) if (fifo == IWL_TX_FIFO_UNUSED)
continue; continue;
iwlagn_tx_queue_set_status(priv, &priv->txq[i], ac, 0); if (ac != IWL_AC_UNSET)
iwl_set_swq_id(&priv->txq[i], ac, i);
iwlagn_tx_queue_set_status(priv, &priv->txq[i], fifo, 0);
} }
spin_unlock_irqrestore(&priv->lock, flags); spin_unlock_irqrestore(&priv->lock, flags);

View file

@ -97,7 +97,8 @@ void iwl_update_chain_flags(struct iwl_priv *priv)
if (priv->cfg->ops->hcmd->set_rxon_chain) { if (priv->cfg->ops->hcmd->set_rxon_chain) {
for_each_context(priv, ctx) { for_each_context(priv, ctx) {
priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx); priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
iwlcore_commit_rxon(priv, ctx); if (ctx->active.rx_chain != ctx->staging.rx_chain)
iwlcore_commit_rxon(priv, ctx);
} }
} }
} }
@ -2716,6 +2717,8 @@ static void iwl_alive_start(struct iwl_priv *priv)
iwl_reset_run_time_calib(priv); iwl_reset_run_time_calib(priv);
set_bit(STATUS_READY, &priv->status);
/* Configure the adapter for unassociated operation */ /* Configure the adapter for unassociated operation */
iwlcore_commit_rxon(priv, ctx); iwlcore_commit_rxon(priv, ctx);
@ -2725,7 +2728,6 @@ static void iwl_alive_start(struct iwl_priv *priv)
iwl_leds_init(priv); iwl_leds_init(priv);
IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n"); IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
set_bit(STATUS_READY, &priv->status);
wake_up_interruptible(&priv->wait_command_queue); wake_up_interruptible(&priv->wait_command_queue);
iwl_power_update_mode(priv, true); iwl_power_update_mode(priv, true);
@ -3837,7 +3839,6 @@ static int iwl_init_drv(struct iwl_priv *priv)
priv->bt_on_thresh = BT_ON_THRESHOLD_DEF; priv->bt_on_thresh = BT_ON_THRESHOLD_DEF;
priv->bt_duration = BT_DURATION_LIMIT_DEF; priv->bt_duration = BT_DURATION_LIMIT_DEF;
priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF; priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF;
priv->dynamic_agg_thresh = BT_AGG_THRESHOLD_DEF;
} }
/* Set the tx_power_user_lmt to the lowest power level /* Set the tx_power_user_lmt to the lowest power level
@ -4135,6 +4136,10 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
if (err) if (err)
goto out_free_eeprom; goto out_free_eeprom;
err = iwl_eeprom_check_sku(priv);
if (err)
goto out_free_eeprom;
/* extract MAC Address */ /* extract MAC Address */
iwl_eeprom_get_mac(priv, priv->addresses[0].addr); iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr); IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);

View file

@ -2022,6 +2022,9 @@ struct iwl_compressed_ba_resp {
__le64 bitmap; __le64 bitmap;
__le16 scd_flow; __le16 scd_flow;
__le16 scd_ssn; __le16 scd_ssn;
/* following only for 5000 series and up */
u8 txed; /* number of frames sent */
u8 txed_2_done; /* number of frames acked */
} __packed; } __packed;
/* /*
@ -2407,9 +2410,9 @@ struct iwl_link_quality_cmd {
#define BT_FRAG_THRESHOLD_MAX 0 #define BT_FRAG_THRESHOLD_MAX 0
#define BT_FRAG_THRESHOLD_MIN 0 #define BT_FRAG_THRESHOLD_MIN 0
#define BT_AGG_THRESHOLD_DEF 0 #define BT_AGG_THRESHOLD_DEF 1200
#define BT_AGG_THRESHOLD_MAX 0 #define BT_AGG_THRESHOLD_MAX 8000
#define BT_AGG_THRESHOLD_MIN 0 #define BT_AGG_THRESHOLD_MIN 400
/* /*
* REPLY_BT_CONFIG = 0x9b (command, has simple generic response) * REPLY_BT_CONFIG = 0x9b (command, has simple generic response)
@ -2436,8 +2439,9 @@ struct iwl_bt_cmd {
#define IWLAGN_BT_FLAG_COEX_MODE_3W 2 #define IWLAGN_BT_FLAG_COEX_MODE_3W 2
#define IWLAGN_BT_FLAG_COEX_MODE_4W 3 #define IWLAGN_BT_FLAG_COEX_MODE_4W 3
#define IWLAGN_BT_FLAG_UCODE_DEFAULT BIT(6) #define IWLAGN_BT_FLAG_UCODE_DEFAULT BIT(6)
#define IWLAGN_BT_FLAG_NOCOEX_NOTIF BIT(7) /* Disable Sync PSPoll on SCO/eSCO */
#define IWLAGN_BT_FLAG_SYNC_2_BT_DISABLE BIT(7)
#define IWLAGN_BT_PRIO_BOOST_MAX 0xFF #define IWLAGN_BT_PRIO_BOOST_MAX 0xFF
#define IWLAGN_BT_PRIO_BOOST_MIN 0x00 #define IWLAGN_BT_PRIO_BOOST_MIN 0x00
@ -2447,8 +2451,8 @@ struct iwl_bt_cmd {
#define IWLAGN_BT3_T7_DEFAULT 1 #define IWLAGN_BT3_T7_DEFAULT 1
#define IWLAGN_BT_KILL_ACK_MASK_DEFAULT cpu_to_le32(0xffffffff) #define IWLAGN_BT_KILL_ACK_MASK_DEFAULT cpu_to_le32(0xffff0000)
#define IWLAGN_BT_KILL_CTS_MASK_DEFAULT cpu_to_le32(0xffffffff) #define IWLAGN_BT_KILL_CTS_MASK_DEFAULT cpu_to_le32(0xffff0000)
#define IWLAGN_BT3_PRIO_SAMPLE_DEFAULT 2 #define IWLAGN_BT3_PRIO_SAMPLE_DEFAULT 2
@ -2664,9 +2668,16 @@ struct iwl_spectrum_notification {
#define IWL_POWER_VEC_SIZE 5 #define IWL_POWER_VEC_SIZE 5
#define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le16(BIT(0)) #define IWL_POWER_DRIVER_ALLOW_SLEEP_MSK cpu_to_le16(BIT(0))
#define IWL_POWER_POWER_SAVE_ENA_MSK cpu_to_le16(BIT(0))
#define IWL_POWER_POWER_MANAGEMENT_ENA_MSK cpu_to_le16(BIT(1))
#define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le16(BIT(2)) #define IWL_POWER_SLEEP_OVER_DTIM_MSK cpu_to_le16(BIT(2))
#define IWL_POWER_PCI_PM_MSK cpu_to_le16(BIT(3)) #define IWL_POWER_PCI_PM_MSK cpu_to_le16(BIT(3))
#define IWL_POWER_FAST_PD cpu_to_le16(BIT(4)) #define IWL_POWER_FAST_PD cpu_to_le16(BIT(4))
#define IWL_POWER_BEACON_FILTERING cpu_to_le16(BIT(5))
#define IWL_POWER_SHADOW_REG_ENA cpu_to_le16(BIT(6))
#define IWL_POWER_CT_KILL_SET cpu_to_le16(BIT(7))
#define IWL_POWER_BT_SCO_ENA cpu_to_le16(BIT(8))
#define IWL_POWER_ADVANCE_PM_ENA_MSK cpu_to_le16(BIT(9))
struct iwl3945_powertable_cmd { struct iwl3945_powertable_cmd {
__le16 flags; __le16 flags;

View file

@ -1469,7 +1469,7 @@ static void iwl_teardown_interface(struct iwl_priv *priv,
* both values are the same and zero. * both values are the same and zero.
*/ */
if (vif->type == NL80211_IFTYPE_ADHOC) if (vif->type == NL80211_IFTYPE_ADHOC)
priv->bt_traffic_load = priv->notif_bt_traffic_load; priv->bt_traffic_load = priv->last_bt_traffic_load;
} }
void iwl_mac_remove_interface(struct ieee80211_hw *hw, void iwl_mac_remove_interface(struct ieee80211_hw *hw,

View file

@ -291,7 +291,9 @@ struct iwl_mod_params {
* @chain_noise_calib_by_driver: driver has the capability to perform * @chain_noise_calib_by_driver: driver has the capability to perform
* chain noise calibration operation * chain noise calibration operation
* @shadow_reg_enable: HW shadhow register bit * @shadow_reg_enable: HW shadhow register bit
*/ * @no_agg_framecnt_info: uCode do not provide aggregation frame count
* information
*/
struct iwl_base_params { struct iwl_base_params {
int eeprom_size; int eeprom_size;
int num_of_queues; /* def: HW dependent */ int num_of_queues; /* def: HW dependent */
@ -322,6 +324,7 @@ struct iwl_base_params {
const bool sensitivity_calib_by_driver; const bool sensitivity_calib_by_driver;
const bool chain_noise_calib_by_driver; const bool chain_noise_calib_by_driver;
const bool shadow_reg_enable; const bool shadow_reg_enable;
const bool no_agg_framecnt_info;
}; };
/* /*
* @advanced_bt_coexist: support advanced bt coexist * @advanced_bt_coexist: support advanced bt coexist
@ -331,6 +334,7 @@ struct iwl_base_params {
* @agg_time_limit: maximum number of uSec in aggregation * @agg_time_limit: maximum number of uSec in aggregation
* @ampdu_factor: Maximum A-MPDU length factor * @ampdu_factor: Maximum A-MPDU length factor
* @ampdu_density: Minimum A-MPDU spacing * @ampdu_density: Minimum A-MPDU spacing
* @bt_sco_disable: uCode should not response to BT in SCO/ESCO mode
*/ */
struct iwl_bt_params { struct iwl_bt_params {
bool advanced_bt_coexist; bool advanced_bt_coexist;
@ -340,6 +344,7 @@ struct iwl_bt_params {
u16 agg_time_limit; u16 agg_time_limit;
u8 ampdu_factor; u8 ampdu_factor;
u8 ampdu_density; u8 ampdu_density;
bool bt_sco_disable;
}; };
/* /*
* @use_rts_for_aggregation: use rts/cts protection for HT traffic * @use_rts_for_aggregation: use rts/cts protection for HT traffic
@ -360,6 +365,8 @@ struct iwl_ht_params {
* @need_dc_calib: need to perform init dc calibration * @need_dc_calib: need to perform init dc calibration
* @need_temp_offset_calib: need to perform temperature offset calibration * @need_temp_offset_calib: need to perform temperature offset calibration
* @scan_antennas: available antenna for scan operation * @scan_antennas: available antenna for scan operation
* @led_mode: 0=blinking, 1=On(RF On)/Off(RF Off)
* @adv_pm: advance power management
* *
* We enable the driver to be backward compatible wrt API version. The * We enable the driver to be backward compatible wrt API version. The
* driver specifies which APIs it supports (with @ucode_api_max being the * driver specifies which APIs it supports (with @ucode_api_max being the
@ -406,6 +413,8 @@ struct iwl_cfg {
const bool need_temp_offset_calib; /* if used set to true */ const bool need_temp_offset_calib; /* if used set to true */
u8 scan_rx_antennas[IEEE80211_NUM_BANDS]; u8 scan_rx_antennas[IEEE80211_NUM_BANDS];
u8 scan_tx_antennas[IEEE80211_NUM_BANDS]; u8 scan_tx_antennas[IEEE80211_NUM_BANDS];
enum iwl_led_mode led_mode;
const bool adv_pm;
}; };
/*************************** /***************************

View file

@ -992,11 +992,8 @@ static ssize_t iwl_dbgfs_tx_queue_read(struct file *file,
" swq_id=%#.2x (ac %d/hwq %d)\n", " swq_id=%#.2x (ac %d/hwq %d)\n",
cnt, q->read_ptr, q->write_ptr, cnt, q->read_ptr, q->write_ptr,
!!test_bit(cnt, priv->queue_stopped), !!test_bit(cnt, priv->queue_stopped),
txq->swq_id, txq->swq_id, txq->swq_id & 3,
txq->swq_id & 0x80 ? txq->swq_id & 3 : (txq->swq_id >> 2) & 0x1f);
txq->swq_id,
txq->swq_id & 0x80 ? (txq->swq_id >> 2) &
0x1f : txq->swq_id);
if (cnt >= 4) if (cnt >= 4)
continue; continue;
/* for the ACs, display the stop count too */ /* for the ACs, display the stop count too */
@ -1580,7 +1577,7 @@ static ssize_t iwl_dbgfs_bt_traffic_read(struct file *file,
priv->bt_full_concurrent ? "full concurrency" : "3-wire"); priv->bt_full_concurrent ? "full concurrency" : "3-wire");
pos += scnprintf(buf + pos, bufsz - pos, "BT status: %s, " pos += scnprintf(buf + pos, bufsz - pos, "BT status: %s, "
"last traffic notif: %d\n", "last traffic notif: %d\n",
priv->bt_status ? "On" : "Off", priv->notif_bt_traffic_load); priv->bt_status ? "On" : "Off", priv->last_bt_traffic_load);
pos += scnprintf(buf + pos, bufsz - pos, "ch_announcement: %d, " pos += scnprintf(buf + pos, bufsz - pos, "ch_announcement: %d, "
"sco_active: %d, kill_ack_mask: %x, " "sco_active: %d, kill_ack_mask: %x, "
"kill_cts_mask: %x\n", "kill_cts_mask: %x\n",

View file

@ -1471,7 +1471,7 @@ struct iwl_priv {
/* bt coex */ /* bt coex */
u8 bt_status; u8 bt_status;
u8 bt_traffic_load, notif_bt_traffic_load; u8 bt_traffic_load, last_bt_traffic_load;
bool bt_ch_announce; bool bt_ch_announce;
bool bt_sco_active; bool bt_sco_active;
bool bt_full_concurrent; bool bt_full_concurrent;
@ -1482,7 +1482,6 @@ struct iwl_priv {
u16 bt_on_thresh; u16 bt_on_thresh;
u16 bt_duration; u16 bt_duration;
u16 dynamic_frag_thresh; u16 dynamic_frag_thresh;
u16 dynamic_agg_thresh;
u8 bt_ci_compliance; u8 bt_ci_compliance;
struct work_struct bt_traffic_change_work; struct work_struct bt_traffic_change_work;

View file

@ -110,9 +110,18 @@ enum {
}; };
/* SKU Capabilities */ /* SKU Capabilities */
/* 3945 only */
#define EEPROM_SKU_CAP_SW_RF_KILL_ENABLE (1 << 0) #define EEPROM_SKU_CAP_SW_RF_KILL_ENABLE (1 << 0)
#define EEPROM_SKU_CAP_HW_RF_KILL_ENABLE (1 << 1) #define EEPROM_SKU_CAP_HW_RF_KILL_ENABLE (1 << 1)
/* 5000 and up */
#define EEPROM_SKU_CAP_BAND_POS (4)
#define EEPROM_SKU_CAP_BAND_SELECTION \
(3 << EEPROM_SKU_CAP_BAND_POS)
#define EEPROM_SKU_CAP_11N_ENABLE (1 << 6)
#define EEPROM_SKU_CAP_AMT_ENABLE (1 << 7)
#define EEPROM_SKU_CAP_IPAN_ENABLE (1 << 8)
/* *regulatory* channel data format in eeprom, one for each channel. /* *regulatory* channel data format in eeprom, one for each channel.
* There are separate entries for HT40 (40 MHz) vs. normal (20 MHz) channels. */ * There are separate entries for HT40 (40 MHz) vs. normal (20 MHz) channels. */
struct iwl_eeprom_channel { struct iwl_eeprom_channel {
@ -397,7 +406,7 @@ struct iwl_eeprom_calib_info {
#define EEPROM_BOARD_REVISION (2*0x35) /* 2 bytes */ #define EEPROM_BOARD_REVISION (2*0x35) /* 2 bytes */
#define EEPROM_BOARD_PBA_NUMBER (2*0x3B+1) /* 9 bytes */ #define EEPROM_BOARD_PBA_NUMBER (2*0x3B+1) /* 9 bytes */
#define EEPROM_VERSION (2*0x44) /* 2 bytes */ #define EEPROM_VERSION (2*0x44) /* 2 bytes */
#define EEPROM_SKU_CAP (2*0x45) /* 1 bytes */ #define EEPROM_SKU_CAP (2*0x45) /* 2 bytes */
#define EEPROM_OEM_MODE (2*0x46) /* 2 bytes */ #define EEPROM_OEM_MODE (2*0x46) /* 2 bytes */
#define EEPROM_WOWLAN_MODE (2*0x47) /* 2 bytes */ #define EEPROM_WOWLAN_MODE (2*0x47) /* 2 bytes */
#define EEPROM_RADIO_CONFIG (2*0x48) /* 2 bytes */ #define EEPROM_RADIO_CONFIG (2*0x48) /* 2 bytes */
@ -504,6 +513,7 @@ struct iwl_eeprom_ops {
int iwl_eeprom_init(struct iwl_priv *priv); int iwl_eeprom_init(struct iwl_priv *priv);
void iwl_eeprom_free(struct iwl_priv *priv); void iwl_eeprom_free(struct iwl_priv *priv);
int iwl_eeprom_check_version(struct iwl_priv *priv); int iwl_eeprom_check_version(struct iwl_priv *priv);
int iwl_eeprom_check_sku(struct iwl_priv *priv);
const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset); const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset);
int iwlcore_eeprom_verify_signature(struct iwl_priv *priv); int iwlcore_eeprom_verify_signature(struct iwl_priv *priv);
u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset); u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset);

View file

@ -44,15 +44,6 @@ static inline struct ieee80211_conf *ieee80211_get_hw_conf(
return &hw->conf; return &hw->conf;
} }
static inline unsigned long elapsed_jiffies(unsigned long start,
unsigned long end)
{
if (end >= start)
return end - start;
return end + (MAX_JIFFY_OFFSET - start) + 1;
}
/** /**
* iwl_queue_inc_wrap - increment queue index, wrap back to beginning * iwl_queue_inc_wrap - increment queue index, wrap back to beginning
* @index -- current index * @index -- current index
@ -104,42 +95,36 @@ static inline int iwl_alloc_fw_desc(struct pci_dev *pci_dev,
* | | | | | | | | * | | | | | | | |
* | | | | | | +-+-------- AC queue (0-3) * | | | | | | +-+-------- AC queue (0-3)
* | | | | | | * | | | | | |
* | +-+-+-+-+------------ HW A-MPDU queue * | +-+-+-+-+------------ HW queue ID
* | * |
* +---------------------- indicates agg queue * +---------------------- unused
*/ */
static inline u8 iwl_virtual_agg_queue_num(u8 ac, u8 hwq) static inline void iwl_set_swq_id(struct iwl_tx_queue *txq, u8 ac, u8 hwq)
{ {
BUG_ON(ac > 3); /* only have 2 bits */ BUG_ON(ac > 3); /* only have 2 bits */
BUG_ON(hwq > 31); /* only have 5 bits */ BUG_ON(hwq > 31); /* only use 5 bits */
return 0x80 | (hwq << 2) | ac; txq->swq_id = (hwq << 2) | ac;
} }
static inline void iwl_wake_queue(struct iwl_priv *priv, u8 queue) static inline void iwl_wake_queue(struct iwl_priv *priv,
struct iwl_tx_queue *txq)
{ {
u8 ac = queue; u8 queue = txq->swq_id;
u8 hwq = queue; u8 ac = queue & 3;
u8 hwq = (queue >> 2) & 0x1f;
if (queue & 0x80) {
ac = queue & 3;
hwq = (queue >> 2) & 0x1f;
}
if (test_and_clear_bit(hwq, priv->queue_stopped)) if (test_and_clear_bit(hwq, priv->queue_stopped))
if (atomic_dec_return(&priv->queue_stop_count[ac]) <= 0) if (atomic_dec_return(&priv->queue_stop_count[ac]) <= 0)
ieee80211_wake_queue(priv->hw, ac); ieee80211_wake_queue(priv->hw, ac);
} }
static inline void iwl_stop_queue(struct iwl_priv *priv, u8 queue) static inline void iwl_stop_queue(struct iwl_priv *priv,
struct iwl_tx_queue *txq)
{ {
u8 ac = queue; u8 queue = txq->swq_id;
u8 hwq = queue; u8 ac = queue & 3;
u8 hwq = (queue >> 2) & 0x1f;
if (queue & 0x80) {
ac = queue & 3;
hwq = (queue >> 2) & 0x1f;
}
if (!test_and_set_bit(hwq, priv->queue_stopped)) if (!test_and_set_bit(hwq, priv->queue_stopped))
if (atomic_inc_return(&priv->queue_stop_count[ac]) > 0) if (atomic_inc_return(&priv->queue_stop_count[ac]) > 0)

View file

@ -45,9 +45,8 @@
/* default: IWL_LED_BLINK(0) using blinking index table */ /* default: IWL_LED_BLINK(0) using blinking index table */
static int led_mode; static int led_mode;
module_param(led_mode, int, S_IRUGO); module_param(led_mode, int, S_IRUGO);
MODULE_PARM_DESC(led_mode, "led mode: 0=blinking, 1=On(RF On)/Off(RF Off), " MODULE_PARM_DESC(led_mode, "led mode: 0=system default, "
"(default 0)"); "1=On(RF On)/Off(RF Off), 2=blinking");
static const struct { static const struct {
u16 tpt; /* Mb/s */ u16 tpt; /* Mb/s */
@ -128,7 +127,7 @@ EXPORT_SYMBOL(iwl_led_start);
int iwl_led_associate(struct iwl_priv *priv) int iwl_led_associate(struct iwl_priv *priv)
{ {
IWL_DEBUG_LED(priv, "Associated\n"); IWL_DEBUG_LED(priv, "Associated\n");
if (led_mode == IWL_LED_BLINK) if (priv->cfg->led_mode == IWL_LED_BLINK)
priv->allow_blinking = 1; priv->allow_blinking = 1;
priv->last_blink_time = jiffies; priv->last_blink_time = jiffies;
@ -223,5 +222,8 @@ void iwl_leds_init(struct iwl_priv *priv)
priv->last_blink_rate = 0; priv->last_blink_rate = 0;
priv->last_blink_time = 0; priv->last_blink_time = 0;
priv->allow_blinking = 0; priv->allow_blinking = 0;
if (led_mode != IWL_LED_DEFAULT &&
led_mode != priv->cfg->led_mode)
priv->cfg->led_mode = led_mode;
} }
EXPORT_SYMBOL(iwl_leds_init); EXPORT_SYMBOL(iwl_leds_init);

View file

@ -47,14 +47,16 @@ enum led_type {
/* /*
* LED mode * LED mode
* IWL_LED_BLINK: adjust led blink rate based on blink table * IWL_LED_DEFAULT: use system default
* IWL_LED_RF_STATE: turn LED on/off based on RF state * IWL_LED_RF_STATE: turn LED on/off based on RF state
* LED ON = RF ON * LED ON = RF ON
* LED OFF = RF OFF * LED OFF = RF OFF
* IWL_LED_BLINK: adjust led blink rate based on blink table
*/ */
enum iwl_led_mode { enum iwl_led_mode {
IWL_LED_BLINK, IWL_LED_DEFAULT,
IWL_LED_RF_STATE, IWL_LED_RF_STATE,
IWL_LED_BLINK,
}; };
void iwl_leds_init(struct iwl_priv *priv); void iwl_leds_init(struct iwl_priv *priv);

View file

@ -75,6 +75,10 @@ struct iwl_power_vec_entry {
#define NOSLP cpu_to_le16(0), 0, 0 #define NOSLP cpu_to_le16(0), 0, 0
#define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0 #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
#define ASLP (IWL_POWER_POWER_SAVE_ENA_MSK | \
IWL_POWER_POWER_MANAGEMENT_ENA_MSK | \
IWL_POWER_ADVANCE_PM_ENA_MSK)
#define ASLP_TOUT(T) cpu_to_le32(T)
#define TU_TO_USEC 1024 #define TU_TO_USEC 1024
#define SLP_TOUT(T) cpu_to_le32((T) * TU_TO_USEC) #define SLP_TOUT(T) cpu_to_le32((T) * TU_TO_USEC)
#define SLP_VEC(X0, X1, X2, X3, X4) {cpu_to_le32(X0), \ #define SLP_VEC(X0, X1, X2, X3, X4) {cpu_to_le32(X0), \
@ -114,6 +118,52 @@ static const struct iwl_power_vec_entry range_2[IWL_POWER_NUM] = {
{{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0} {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
}; };
/* advance power management */
/* DTIM 0 - 2 */
static const struct iwl_power_vec_entry apm_range_0[IWL_POWER_NUM] = {
{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
SLP_VEC(1, 2, 6, 8, 0xFF), ASLP_TOUT(2)}, 2}
};
/* for DTIM period IWL_DTIM_RANGE_0_MAX + 1 through IWL_DTIM_RANGE_1_MAX */
/* DTIM 3 - 10 */
static const struct iwl_power_vec_entry apm_range_1[IWL_POWER_NUM] = {
{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
SLP_VEC(1, 2, 6, 8, 0xFF), 0}, 2}
};
/* for DTIM period > IWL_DTIM_RANGE_1_MAX */
/* DTIM 11 - */
static const struct iwl_power_vec_entry apm_range_2[IWL_POWER_NUM] = {
{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
SLP_VEC(1, 2, 4, 6, 0xFF), 0}, 0},
{{ASLP, 0, 0, ASLP_TOUT(50), ASLP_TOUT(50),
SLP_VEC(1, 2, 6, 8, 0xFF), ASLP_TOUT(2)}, 2}
};
static void iwl_static_sleep_cmd(struct iwl_priv *priv, static void iwl_static_sleep_cmd(struct iwl_priv *priv,
struct iwl_powertable_cmd *cmd, struct iwl_powertable_cmd *cmd,
enum iwl_power_level lvl, int period) enum iwl_power_level lvl, int period)
@ -124,11 +174,19 @@ static void iwl_static_sleep_cmd(struct iwl_priv *priv,
u8 skip; u8 skip;
u32 slp_itrvl; u32 slp_itrvl;
table = range_2; if (priv->cfg->adv_pm) {
if (period <= IWL_DTIM_RANGE_1_MAX) table = apm_range_2;
table = range_1; if (period <= IWL_DTIM_RANGE_1_MAX)
if (period <= IWL_DTIM_RANGE_0_MAX) table = apm_range_1;
table = range_0; if (period <= IWL_DTIM_RANGE_0_MAX)
table = apm_range_0;
} else {
table = range_2;
if (period <= IWL_DTIM_RANGE_1_MAX)
table = range_1;
if (period <= IWL_DTIM_RANGE_0_MAX)
table = range_0;
}
BUG_ON(lvl < 0 || lvl >= IWL_POWER_NUM); BUG_ON(lvl < 0 || lvl >= IWL_POWER_NUM);
@ -163,6 +221,20 @@ static void iwl_static_sleep_cmd(struct iwl_priv *priv,
else else
cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK; cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
if (priv->cfg->base_params->shadow_reg_enable)
cmd->flags |= IWL_POWER_SHADOW_REG_ENA;
else
cmd->flags &= ~IWL_POWER_SHADOW_REG_ENA;
if (priv->cfg->bt_params &&
priv->cfg->bt_params->advanced_bt_coexist) {
if (!priv->cfg->bt_params->bt_sco_disable)
cmd->flags |= IWL_POWER_BT_SCO_ENA;
else
cmd->flags &= ~IWL_POWER_BT_SCO_ENA;
}
slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]); slp_itrvl = le32_to_cpu(cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1]);
if (slp_itrvl > IWL_CONN_MAX_LISTEN_INTERVAL) if (slp_itrvl > IWL_CONN_MAX_LISTEN_INTERVAL)
cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1] =
@ -236,6 +308,19 @@ static void iwl_power_fill_sleep_cmd(struct iwl_priv *priv,
if (priv->power_data.pci_pm) if (priv->power_data.pci_pm)
cmd->flags |= IWL_POWER_PCI_PM_MSK; cmd->flags |= IWL_POWER_PCI_PM_MSK;
if (priv->cfg->base_params->shadow_reg_enable)
cmd->flags |= IWL_POWER_SHADOW_REG_ENA;
else
cmd->flags &= ~IWL_POWER_SHADOW_REG_ENA;
if (priv->cfg->bt_params &&
priv->cfg->bt_params->advanced_bt_coexist) {
if (!priv->cfg->bt_params->bt_sco_disable)
cmd->flags |= IWL_POWER_BT_SCO_ENA;
else
cmd->flags &= ~IWL_POWER_BT_SCO_ENA;
}
cmd->rx_data_timeout = cpu_to_le32(1000 * dynps_ms); cmd->rx_data_timeout = cpu_to_le32(1000 * dynps_ms);
cmd->tx_data_timeout = cpu_to_le32(1000 * dynps_ms); cmd->tx_data_timeout = cpu_to_le32(1000 * dynps_ms);

View file

@ -252,8 +252,7 @@ static void iwl_rx_scan_complete_notif(struct iwl_priv *priv,
IWL_DEBUG_SCAN(priv, "Scan on %sGHz took %dms\n", IWL_DEBUG_SCAN(priv, "Scan on %sGHz took %dms\n",
(priv->scan_band == IEEE80211_BAND_2GHZ) ? "2.4" : "5.2", (priv->scan_band == IEEE80211_BAND_2GHZ) ? "2.4" : "5.2",
jiffies_to_msecs(elapsed_jiffies jiffies_to_msecs(jiffies - priv->scan_start));
(priv->scan_start, jiffies)));
queue_work(priv->workqueue, &priv->scan_completed); queue_work(priv->workqueue, &priv->scan_completed);

View file

@ -400,7 +400,8 @@ static void iwl_sta_ucode_deactivate(struct iwl_priv *priv, u8 sta_id)
} }
static int iwl_send_remove_station(struct iwl_priv *priv, static int iwl_send_remove_station(struct iwl_priv *priv,
const u8 *addr, int sta_id) const u8 *addr, int sta_id,
bool temporary)
{ {
struct iwl_rx_packet *pkt; struct iwl_rx_packet *pkt;
int ret; int ret;
@ -436,9 +437,11 @@ static int iwl_send_remove_station(struct iwl_priv *priv,
if (!ret) { if (!ret) {
switch (pkt->u.rem_sta.status) { switch (pkt->u.rem_sta.status) {
case REM_STA_SUCCESS_MSK: case REM_STA_SUCCESS_MSK:
spin_lock_irqsave(&priv->sta_lock, flags_spin); if (!temporary) {
iwl_sta_ucode_deactivate(priv, sta_id); spin_lock_irqsave(&priv->sta_lock, flags_spin);
spin_unlock_irqrestore(&priv->sta_lock, flags_spin); iwl_sta_ucode_deactivate(priv, sta_id);
spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
}
IWL_DEBUG_ASSOC(priv, "REPLY_REMOVE_STA PASSED\n"); IWL_DEBUG_ASSOC(priv, "REPLY_REMOVE_STA PASSED\n");
break; break;
default: default:
@ -505,7 +508,7 @@ int iwl_remove_station(struct iwl_priv *priv, const u8 sta_id,
spin_unlock_irqrestore(&priv->sta_lock, flags); spin_unlock_irqrestore(&priv->sta_lock, flags);
return iwl_send_remove_station(priv, addr, sta_id); return iwl_send_remove_station(priv, addr, sta_id, false);
out_err: out_err:
spin_unlock_irqrestore(&priv->sta_lock, flags); spin_unlock_irqrestore(&priv->sta_lock, flags);
return -EINVAL; return -EINVAL;
@ -624,6 +627,44 @@ void iwl_restore_stations(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
} }
EXPORT_SYMBOL(iwl_restore_stations); EXPORT_SYMBOL(iwl_restore_stations);
void iwl_reprogram_ap_sta(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
{
unsigned long flags;
int sta_id = ctx->ap_sta_id;
int ret;
struct iwl_addsta_cmd sta_cmd;
struct iwl_link_quality_cmd lq;
bool active;
spin_lock_irqsave(&priv->sta_lock, flags);
if (!(priv->stations[sta_id].used & IWL_STA_DRIVER_ACTIVE)) {
spin_unlock_irqrestore(&priv->sta_lock, flags);
return;
}
memcpy(&sta_cmd, &priv->stations[sta_id].sta, sizeof(sta_cmd));
sta_cmd.mode = 0;
memcpy(&lq, priv->stations[sta_id].lq, sizeof(lq));
active = priv->stations[sta_id].used & IWL_STA_UCODE_ACTIVE;
spin_unlock_irqrestore(&priv->sta_lock, flags);
if (active) {
ret = iwl_send_remove_station(
priv, priv->stations[sta_id].sta.sta.addr,
sta_id, true);
if (ret)
IWL_ERR(priv, "failed to remove STA %pM (%d)\n",
priv->stations[sta_id].sta.sta.addr, ret);
}
ret = iwl_send_add_sta(priv, &sta_cmd, CMD_SYNC);
if (ret)
IWL_ERR(priv, "failed to re-add STA %pM (%d)\n",
priv->stations[sta_id].sta.sta.addr, ret);
iwl_send_lq_cmd(priv, ctx, &lq, CMD_SYNC, true);
}
EXPORT_SYMBOL(iwl_reprogram_ap_sta);
int iwl_get_free_ucode_key_index(struct iwl_priv *priv) int iwl_get_free_ucode_key_index(struct iwl_priv *priv)
{ {
int i; int i;

View file

@ -63,6 +63,7 @@ u8 iwl_prep_station(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
int iwl_send_lq_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx, int iwl_send_lq_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
struct iwl_link_quality_cmd *lq, u8 flags, bool init); struct iwl_link_quality_cmd *lq, u8 flags, bool init);
void iwl_reprogram_ap_sta(struct iwl_priv *priv, struct iwl_rxon_context *ctx);
/** /**
* iwl_clear_driver_stations - clear knowledge of all stations from driver * iwl_clear_driver_stations - clear knowledge of all stations from driver

View file

@ -359,13 +359,12 @@ int iwl_tx_queue_init(struct iwl_priv *priv, struct iwl_tx_queue *txq,
txq->need_update = 0; txq->need_update = 0;
/* /*
* Aggregation TX queues will get their ID when aggregation begins; * For the default queues 0-3, set up the swq_id
* they overwrite the setting done here. The command FIFO doesn't * already -- all others need to get one later
* need an swq_id so don't set one to catch errors, all others can * (if they need one at all).
* be set up to the identity mapping.
*/ */
if (txq_id != priv->cmd_queue) if (txq_id < 4)
txq->swq_id = txq_id; iwl_set_swq_id(txq, txq_id, txq_id);
/* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
* iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */ * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */

View file

@ -475,7 +475,7 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
dma_addr_t phys_addr; dma_addr_t phys_addr;
dma_addr_t txcmd_phys; dma_addr_t txcmd_phys;
int txq_id = skb_get_queue_mapping(skb); int txq_id = skb_get_queue_mapping(skb);
u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */ u16 len, idx, hdr_len;
u8 id; u8 id;
u8 unicast; u8 unicast;
u8 sta_id; u8 sta_id;
@ -612,15 +612,8 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
*/ */
len = sizeof(struct iwl3945_tx_cmd) + len = sizeof(struct iwl3945_tx_cmd) +
sizeof(struct iwl_cmd_header) + hdr_len; sizeof(struct iwl_cmd_header) + hdr_len;
len_org = len;
len = (len + 3) & ~3; len = (len + 3) & ~3;
if (len_org != len)
len_org = 1;
else
len_org = 0;
/* Physical address of this Tx command's header (not MAC header!), /* Physical address of this Tx command's header (not MAC header!),
* within command buffer array. */ * within command buffer array. */
txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr, txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
@ -662,7 +655,7 @@ static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
spin_unlock_irqrestore(&priv->lock, flags); spin_unlock_irqrestore(&priv->lock, flags);
} }
iwl_stop_queue(priv, skb_get_queue_mapping(skb)); iwl_stop_queue(priv, txq);
} }
return 0; return 0;

View file

@ -908,7 +908,7 @@ int iwm_scan_ssids(struct iwm_priv *iwm, struct cfg80211_ssid *ssids,
return ret; return ret;
} }
iwm->scan_id = iwm->scan_id++ % IWM_SCAN_ID_MAX; iwm->scan_id = (iwm->scan_id + 1) % IWM_SCAN_ID_MAX;
return 0; return 0;
} }

View file

@ -9,8 +9,6 @@
#include <linux/sched.h> #include <linux/sched.h>
#include <linux/wait.h> #include <linux/wait.h>
#include <linux/slab.h> #include <linux/slab.h>
#include <linux/sched.h>
#include <linux/wait.h>
#include <linux/ieee80211.h> #include <linux/ieee80211.h>
#include <net/cfg80211.h> #include <net/cfg80211.h>
#include <asm/unaligned.h> #include <asm/unaligned.h>
@ -2062,7 +2060,7 @@ static void lbs_cfg_set_regulatory_hint(struct lbs_private *priv)
}; };
/* Section 5.17.2 */ /* Section 5.17.2 */
static struct region_code_mapping regmap[] = { static const struct region_code_mapping regmap[] = {
{"US ", 0x10}, /* US FCC */ {"US ", 0x10}, /* US FCC */
{"CA ", 0x20}, /* Canada */ {"CA ", 0x20}, /* Canada */
{"EU ", 0x30}, /* ETSI */ {"EU ", 0x30}, /* ETSI */

View file

@ -177,6 +177,14 @@ int lbs_host_sleep_cfg(struct lbs_private *priv, uint32_t criteria,
struct cmd_ds_host_sleep cmd_config; struct cmd_ds_host_sleep cmd_config;
int ret; int ret;
/*
* Certain firmware versions do not support EHS_REMOVE_WAKEUP command
* and the card will return a failure. Since we need to be
* able to reset the mask, in those cases we set a 0 mask instead.
*/
if (criteria == EHS_REMOVE_WAKEUP && !priv->ehs_remove_supported)
criteria = 0;
cmd_config.hdr.size = cpu_to_le16(sizeof(cmd_config)); cmd_config.hdr.size = cpu_to_le16(sizeof(cmd_config));
cmd_config.criteria = cpu_to_le32(criteria); cmd_config.criteria = cpu_to_le32(criteria);
cmd_config.gpio = priv->wol_gpio; cmd_config.gpio = priv->wol_gpio;

View file

@ -138,6 +138,7 @@ struct lbs_private {
uint32_t wol_criteria; uint32_t wol_criteria;
uint8_t wol_gpio; uint8_t wol_gpio;
uint8_t wol_gap; uint8_t wol_gap;
bool ehs_remove_supported;
/* Transmitting */ /* Transmitting */
int tx_pending_len; /* -1 while building packet */ int tx_pending_len; /* -1 while building packet */

View file

@ -345,6 +345,13 @@ static int if_usb_probe(struct usb_interface *intf,
if (device_create_file(&priv->dev->dev, &dev_attr_lbs_flash_boot2)) if (device_create_file(&priv->dev->dev, &dev_attr_lbs_flash_boot2))
lbs_pr_err("cannot register lbs_flash_boot2 attribute\n"); lbs_pr_err("cannot register lbs_flash_boot2 attribute\n");
/*
* EHS_REMOVE_WAKEUP is not supported on all versions of the firmware.
*/
priv->wol_criteria = EHS_REMOVE_WAKEUP;
if (lbs_host_sleep_cfg(priv, priv->wol_criteria, NULL))
priv->ehs_remove_supported = false;
return 0; return 0;
err_start_card: err_start_card:
@ -1090,12 +1097,6 @@ static int if_usb_suspend(struct usb_interface *intf, pm_message_t message)
if (priv->psstate != PS_STATE_FULL_POWER) if (priv->psstate != PS_STATE_FULL_POWER)
return -1; return -1;
if (priv->wol_criteria == EHS_REMOVE_WAKEUP) {
lbs_pr_info("Suspend attempt without "
"configuring wake params!\n");
return -ENOSYS;
}
ret = lbs_suspend(priv); ret = lbs_suspend(priv);
if (ret) if (ret)
goto out; goto out;

View file

@ -851,9 +851,10 @@ struct lbs_private *lbs_add_card(void *card, struct device *dmdev)
priv->work_thread = create_singlethread_workqueue("lbs_worker"); priv->work_thread = create_singlethread_workqueue("lbs_worker");
INIT_WORK(&priv->mcast_work, lbs_set_mcast_worker); INIT_WORK(&priv->mcast_work, lbs_set_mcast_worker);
priv->wol_criteria = 0xffffffff; priv->wol_criteria = EHS_REMOVE_WAKEUP;
priv->wol_gpio = 0xff; priv->wol_gpio = 0xff;
priv->wol_gap = 20; priv->wol_gap = 20;
priv->ehs_remove_supported = true;
goto done; goto done;

View file

@ -55,7 +55,9 @@ int lbs_process_rxed_packet(struct lbs_private *priv, struct sk_buff *skb)
struct rxpd *p_rx_pd; struct rxpd *p_rx_pd;
int hdrchop; int hdrchop;
struct ethhdr *p_ethhdr; struct ethhdr *p_ethhdr;
const u8 rfc1042_eth_hdr[] = { 0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00 }; static const u8 rfc1042_eth_hdr[] = {
0xaa, 0xaa, 0x03, 0x00, 0x00, 0x00
};
lbs_deb_enter(LBS_DEB_RX); lbs_deb_enter(LBS_DEB_RX);

File diff suppressed because it is too large Load diff

View file

@ -2286,8 +2286,8 @@ static void untranslate(ray_dev_t *local, struct sk_buff *skb, int len)
struct ethhdr *peth; struct ethhdr *peth;
UCHAR srcaddr[ADDRLEN]; UCHAR srcaddr[ADDRLEN];
UCHAR destaddr[ADDRLEN]; UCHAR destaddr[ADDRLEN];
static UCHAR org_bridge[3] = { 0, 0, 0xf8 }; static const UCHAR org_bridge[3] = { 0, 0, 0xf8 };
static UCHAR org_1042[3] = { 0, 0, 0 }; static const UCHAR org_1042[3] = { 0, 0, 0 };
memcpy(destaddr, ieee80211_get_DA(pmac), ADDRLEN); memcpy(destaddr, ieee80211_get_DA(pmac), ADDRLEN);
memcpy(srcaddr, ieee80211_get_SA(pmac), ADDRLEN); memcpy(srcaddr, ieee80211_get_SA(pmac), ADDRLEN);

View file

@ -156,6 +156,12 @@ MODULE_PARM_DESC(workaround_interval,
#define RNDIS_STATUS_ADAPTER_NOT_OPEN cpu_to_le32(0xc0010012) #define RNDIS_STATUS_ADAPTER_NOT_OPEN cpu_to_le32(0xc0010012)
/* Known device types */
#define RNDIS_UNKNOWN 0
#define RNDIS_BCM4320A 1
#define RNDIS_BCM4320B 2
/* NDIS data structures. Taken from wpa_supplicant driver_ndis.c /* NDIS data structures. Taken from wpa_supplicant driver_ndis.c
* slightly modified for datatype endianess, etc * slightly modified for datatype endianess, etc
*/ */
@ -478,6 +484,7 @@ struct rndis_wlan_private {
struct ieee80211_rate rates[ARRAY_SIZE(rndis_rates)]; struct ieee80211_rate rates[ARRAY_SIZE(rndis_rates)];
u32 cipher_suites[ARRAY_SIZE(rndis_cipher_suites)]; u32 cipher_suites[ARRAY_SIZE(rndis_cipher_suites)];
int device_type;
int caps; int caps;
int multicast_size; int multicast_size;
@ -810,7 +817,8 @@ exit_unlock:
return ret; return ret;
} }
static int rndis_set_oid(struct usbnet *dev, __le32 oid, void *data, int len) static int rndis_set_oid(struct usbnet *dev, __le32 oid, const void *data,
int len)
{ {
struct rndis_wlan_private *priv = get_rndis_wlan_priv(dev); struct rndis_wlan_private *priv = get_rndis_wlan_priv(dev);
union { union {
@ -994,7 +1002,18 @@ static int level_to_qual(int level)
*/ */
static int set_infra_mode(struct usbnet *usbdev, int mode); static int set_infra_mode(struct usbnet *usbdev, int mode);
static void restore_keys(struct usbnet *usbdev); static void restore_keys(struct usbnet *usbdev);
static int rndis_check_bssid_list(struct usbnet *usbdev); static int rndis_check_bssid_list(struct usbnet *usbdev, u8 *match_bssid,
bool *matched);
static int rndis_start_bssid_list_scan(struct usbnet *usbdev)
{
__le32 tmp;
/* Note: OID_802_11_BSSID_LIST_SCAN clears internal BSS list. */
tmp = cpu_to_le32(1);
return rndis_set_oid(usbdev, OID_802_11_BSSID_LIST_SCAN, &tmp,
sizeof(tmp));
}
static int set_essid(struct usbnet *usbdev, struct ndis_80211_ssid *ssid) static int set_essid(struct usbnet *usbdev, struct ndis_80211_ssid *ssid)
{ {
@ -1015,7 +1034,7 @@ static int set_essid(struct usbnet *usbdev, struct ndis_80211_ssid *ssid)
return ret; return ret;
} }
static int set_bssid(struct usbnet *usbdev, u8 bssid[ETH_ALEN]) static int set_bssid(struct usbnet *usbdev, const u8 *bssid)
{ {
int ret; int ret;
@ -1031,7 +1050,9 @@ static int set_bssid(struct usbnet *usbdev, u8 bssid[ETH_ALEN])
static int clear_bssid(struct usbnet *usbdev) static int clear_bssid(struct usbnet *usbdev)
{ {
u8 broadcast_mac[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; static const u8 broadcast_mac[ETH_ALEN] = {
0xff, 0xff, 0xff, 0xff, 0xff, 0xff
};
return set_bssid(usbdev, broadcast_mac); return set_bssid(usbdev, broadcast_mac);
} }
@ -1904,14 +1925,14 @@ static int rndis_scan(struct wiphy *wiphy, struct net_device *dev,
struct usbnet *usbdev = netdev_priv(dev); struct usbnet *usbdev = netdev_priv(dev);
struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev); struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev);
int ret; int ret;
__le32 tmp; int delay = SCAN_DELAY_JIFFIES;
netdev_dbg(usbdev->net, "cfg80211.scan\n"); netdev_dbg(usbdev->net, "cfg80211.scan\n");
/* Get current bssid list from device before new scan, as new scan /* Get current bssid list from device before new scan, as new scan
* clears internal bssid list. * clears internal bssid list.
*/ */
rndis_check_bssid_list(usbdev); rndis_check_bssid_list(usbdev, NULL, NULL);
if (!request) if (!request)
return -EINVAL; return -EINVAL;
@ -1921,13 +1942,13 @@ static int rndis_scan(struct wiphy *wiphy, struct net_device *dev,
priv->scan_request = request; priv->scan_request = request;
tmp = cpu_to_le32(1); ret = rndis_start_bssid_list_scan(usbdev);
ret = rndis_set_oid(usbdev, OID_802_11_BSSID_LIST_SCAN, &tmp,
sizeof(tmp));
if (ret == 0) { if (ret == 0) {
if (priv->device_type == RNDIS_BCM4320A)
delay = HZ;
/* Wait before retrieving scan results from device */ /* Wait before retrieving scan results from device */
queue_delayed_work(priv->workqueue, &priv->scan_work, queue_delayed_work(priv->workqueue, &priv->scan_work, delay);
SCAN_DELAY_JIFFIES);
} }
return ret; return ret;
@ -1981,7 +2002,8 @@ static struct cfg80211_bss *rndis_bss_info_update(struct usbnet *usbdev,
GFP_KERNEL); GFP_KERNEL);
} }
static int rndis_check_bssid_list(struct usbnet *usbdev) static int rndis_check_bssid_list(struct usbnet *usbdev, u8 *match_bssid,
bool *matched)
{ {
void *buf = NULL; void *buf = NULL;
struct ndis_80211_bssid_list_ex *bssid_list; struct ndis_80211_bssid_list_ex *bssid_list;
@ -2017,7 +2039,11 @@ resize_buf:
count, len); count, len);
while (count && ((void *)bssid + bssid_len) <= (buf + len)) { while (count && ((void *)bssid + bssid_len) <= (buf + len)) {
rndis_bss_info_update(usbdev, bssid); if (rndis_bss_info_update(usbdev, bssid) && match_bssid &&
matched) {
if (compare_ether_addr(bssid->mac, match_bssid))
*matched = true;
}
bssid = (void *)bssid + bssid_len; bssid = (void *)bssid + bssid_len;
bssid_len = le32_to_cpu(bssid->length); bssid_len = le32_to_cpu(bssid->length);
@ -2041,7 +2067,7 @@ static void rndis_get_scan_results(struct work_struct *work)
if (!priv->scan_request) if (!priv->scan_request)
return; return;
ret = rndis_check_bssid_list(usbdev); ret = rndis_check_bssid_list(usbdev, NULL, NULL);
cfg80211_scan_done(priv->scan_request, ret < 0); cfg80211_scan_done(priv->scan_request, ret < 0);
@ -2495,6 +2521,91 @@ static int rndis_flush_pmksa(struct wiphy *wiphy, struct net_device *netdev)
return rndis_set_oid(usbdev, OID_802_11_PMKID, &pmkid, sizeof(pmkid)); return rndis_set_oid(usbdev, OID_802_11_PMKID, &pmkid, sizeof(pmkid));
} }
static void rndis_wlan_craft_connected_bss(struct usbnet *usbdev, u8 *bssid,
struct ndis_80211_assoc_info *info)
{
struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev);
struct ieee80211_channel *channel;
struct ndis_80211_conf config;
struct ndis_80211_ssid ssid;
s32 signal;
u64 timestamp;
u16 capability;
u16 beacon_interval;
__le32 rssi;
u8 ie_buf[34];
int len, ret, ie_len;
/* Get signal quality, in case of error use rssi=0 and ignore error. */
len = sizeof(rssi);
rssi = 0;
ret = rndis_query_oid(usbdev, OID_802_11_RSSI, &rssi, &len);
signal = level_to_qual(le32_to_cpu(rssi));
netdev_dbg(usbdev->net, "%s(): OID_802_11_RSSI -> %d, "
"rssi:%d, qual: %d\n", __func__, ret, le32_to_cpu(rssi),
level_to_qual(le32_to_cpu(rssi)));
/* Get AP capabilities */
if (info) {
capability = le16_to_cpu(info->resp_ie.capa);
} else {
/* Set atleast ESS/IBSS capability */
capability = (priv->infra_mode == NDIS_80211_INFRA_INFRA) ?
WLAN_CAPABILITY_ESS : WLAN_CAPABILITY_IBSS;
}
/* Get channel and beacon interval */
len = sizeof(config);
ret = rndis_query_oid(usbdev, OID_802_11_CONFIGURATION, &config, &len);
netdev_dbg(usbdev->net, "%s(): OID_802_11_CONFIGURATION -> %d\n",
__func__, ret);
if (ret >= 0) {
beacon_interval = le16_to_cpu(config.beacon_period);
channel = ieee80211_get_channel(priv->wdev.wiphy,
KHZ_TO_MHZ(le32_to_cpu(config.ds_config)));
if (!channel) {
netdev_warn(usbdev->net, "%s(): could not get channel."
"\n", __func__);
return;
}
} else {
netdev_warn(usbdev->net, "%s(): could not get configuration.\n",
__func__);
return;
}
/* Get SSID, in case of error, use zero length SSID and ignore error. */
len = sizeof(ssid);
memset(&ssid, 0, sizeof(ssid));
ret = rndis_query_oid(usbdev, OID_802_11_SSID, &ssid, &len);
netdev_dbg(usbdev->net, "%s(): OID_802_11_SSID -> %d, len: %d, ssid: "
"'%.32s'\n", __func__, ret,
le32_to_cpu(ssid.length), ssid.essid);
if (le32_to_cpu(ssid.length) > 32)
ssid.length = cpu_to_le32(32);
ie_buf[0] = WLAN_EID_SSID;
ie_buf[1] = le32_to_cpu(ssid.length);
memcpy(&ie_buf[2], ssid.essid, le32_to_cpu(ssid.length));
ie_len = le32_to_cpu(ssid.length) + 2;
/* no tsf */
timestamp = 0;
netdev_dbg(usbdev->net, "%s(): channel:%d(freq), bssid:[%pM], tsf:%d, "
"capa:%x, beacon int:%d, resp_ie(len:%d, essid:'%.32s'), "
"signal:%d\n", __func__, (channel ? channel->center_freq : -1),
bssid, (u32)timestamp, capability, beacon_interval, ie_len,
ssid.essid, signal);
cfg80211_inform_bss(priv->wdev.wiphy, channel, bssid,
timestamp, capability, beacon_interval, ie_buf, ie_len,
signal, GFP_KERNEL);
}
/* /*
* workers, indication handlers, device poller * workers, indication handlers, device poller
*/ */
@ -2507,6 +2618,7 @@ static void rndis_wlan_do_link_up_work(struct usbnet *usbdev)
u8 *req_ie, *resp_ie; u8 *req_ie, *resp_ie;
int ret, offset; int ret, offset;
bool roamed = false; bool roamed = false;
bool match_bss;
if (priv->infra_mode == NDIS_80211_INFRA_INFRA && priv->connected) { if (priv->infra_mode == NDIS_80211_INFRA_INFRA && priv->connected) {
/* received media connect indication while connected, either /* received media connect indication while connected, either
@ -2558,6 +2670,13 @@ static void rndis_wlan_do_link_up_work(struct usbnet *usbdev)
resp_ie_len = resp_ie_len =
CONTROL_BUFFER_SIZE - offset; CONTROL_BUFFER_SIZE - offset;
} }
} else {
/* Since rndis_wlan_craft_connected_bss() might use info
* later and expects info to contain valid data if
* non-null, free info and set NULL here.
*/
kfree(info);
info = NULL;
} }
} else if (WARN_ON(priv->infra_mode != NDIS_80211_INFRA_ADHOC)) } else if (WARN_ON(priv->infra_mode != NDIS_80211_INFRA_ADHOC))
return; return;
@ -2569,13 +2688,26 @@ static void rndis_wlan_do_link_up_work(struct usbnet *usbdev)
netdev_dbg(usbdev->net, "link up work: [%pM]%s\n", netdev_dbg(usbdev->net, "link up work: [%pM]%s\n",
bssid, roamed ? " roamed" : ""); bssid, roamed ? " roamed" : "");
/* Internal bss list in device always contains at least the currently /* Internal bss list in device should contain at least the currently
* connected bss and we can get it to cfg80211 with * connected bss and we can get it to cfg80211 with
* rndis_check_bssid_list(). * rndis_check_bssid_list().
* NOTE: This is true for Broadcom chip, but not mentioned in RNDIS *
* spec. * NDIS spec says: "If the device is associated, but the associated
* BSSID is not in its BSSID scan list, then the driver must add an
* entry for the BSSID at the end of the data that it returns in
* response to query of OID_802_11_BSSID_LIST."
*
* NOTE: Seems to be true for BCM4320b variant, but not BCM4320a.
*/ */
rndis_check_bssid_list(usbdev); match_bss = false;
rndis_check_bssid_list(usbdev, bssid, &match_bss);
if (!is_zero_ether_addr(bssid) && !match_bss) {
/* Couldn't get bss from device, we need to manually craft bss
* for cfg80211.
*/
rndis_wlan_craft_connected_bss(usbdev, bssid, info);
}
if (priv->infra_mode == NDIS_80211_INFRA_INFRA) { if (priv->infra_mode == NDIS_80211_INFRA_INFRA) {
if (!roamed) if (!roamed)
@ -2934,8 +3066,21 @@ static void rndis_device_poller(struct work_struct *work)
* also polls device with rndis_command() and catches for media link * also polls device with rndis_command() and catches for media link
* indications. * indications.
*/ */
if (!is_associated(usbdev)) if (!is_associated(usbdev)) {
/* Workaround bad scanning in BCM4320a devices with active
* background scanning when not associated.
*/
if (priv->device_type == RNDIS_BCM4320A && priv->radio_on &&
!priv->scan_request) {
/* Get previous scan results */
rndis_check_bssid_list(usbdev, NULL, NULL);
/* Initiate new scan */
rndis_start_bssid_list_scan(usbdev);
}
goto end; goto end;
}
len = sizeof(rssi); len = sizeof(rssi);
ret = rndis_query_oid(usbdev, OID_802_11_RSSI, &rssi, &len); ret = rndis_query_oid(usbdev, OID_802_11_RSSI, &rssi, &len);
@ -2992,10 +3137,12 @@ end:
/* /*
* driver/device initialization * driver/device initialization
*/ */
static void rndis_copy_module_params(struct usbnet *usbdev) static void rndis_copy_module_params(struct usbnet *usbdev, int device_type)
{ {
struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev); struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev);
priv->device_type = device_type;
priv->param_country[0] = modparam_country[0]; priv->param_country[0] = modparam_country[0];
priv->param_country[1] = modparam_country[1]; priv->param_country[1] = modparam_country[1];
priv->param_country[2] = 0; priv->param_country[2] = 0;
@ -3038,12 +3185,25 @@ static void rndis_copy_module_params(struct usbnet *usbdev)
priv->param_workaround_interval = modparam_workaround_interval; priv->param_workaround_interval = modparam_workaround_interval;
} }
static int unknown_early_init(struct usbnet *usbdev)
{
/* copy module parameters for unknown so that iwconfig reports txpower
* and workaround parameter is copied to private structure correctly.
*/
rndis_copy_module_params(usbdev, RNDIS_UNKNOWN);
/* This is unknown device, so do not try set configuration parameters.
*/
return 0;
}
static int bcm4320a_early_init(struct usbnet *usbdev) static int bcm4320a_early_init(struct usbnet *usbdev)
{ {
/* copy module parameters for bcm4320a so that iwconfig reports txpower /* copy module parameters for bcm4320a so that iwconfig reports txpower
* and workaround parameter is copied to private structure correctly. * and workaround parameter is copied to private structure correctly.
*/ */
rndis_copy_module_params(usbdev); rndis_copy_module_params(usbdev, RNDIS_BCM4320A);
/* bcm4320a doesn't handle configuration parameters well. Try /* bcm4320a doesn't handle configuration parameters well. Try
* set any and you get partially zeroed mac and broken device. * set any and you get partially zeroed mac and broken device.
@ -3057,7 +3217,7 @@ static int bcm4320b_early_init(struct usbnet *usbdev)
struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev); struct rndis_wlan_private *priv = get_rndis_wlan_priv(usbdev);
char buf[8]; char buf[8];
rndis_copy_module_params(usbdev); rndis_copy_module_params(usbdev, RNDIS_BCM4320B);
/* Early initialization settings, setting these won't have effect /* Early initialization settings, setting these won't have effect
* if called after generic_rndis_bind(). * if called after generic_rndis_bind().
@ -3320,7 +3480,7 @@ static const struct driver_info rndis_wlan_info = {
.tx_fixup = rndis_tx_fixup, .tx_fixup = rndis_tx_fixup,
.reset = rndis_wlan_reset, .reset = rndis_wlan_reset,
.stop = rndis_wlan_stop, .stop = rndis_wlan_stop,
.early_init = bcm4320a_early_init, .early_init = unknown_early_init,
.indication = rndis_wlan_indication, .indication = rndis_wlan_indication,
}; };

View file

@ -53,51 +53,41 @@ config RT61PCI
When compiled as a module, this driver will be called rt61pci. When compiled as a module, this driver will be called rt61pci.
config RT2800PCI_PCI
boolean
depends on PCI
default y
config RT2800PCI_SOC
boolean
depends on RALINK_RT288X || RALINK_RT305X
default y
config RT2800PCI config RT2800PCI
tristate "Ralink rt28xx/rt30xx/rt35xx (PCI/PCIe/PCMCIA) support (EXPERIMENTAL)" tristate "Ralink rt27xx/rt28xx/rt30xx (PCI/PCIe/PCMCIA) support"
depends on (RT2800PCI_PCI || RT2800PCI_SOC) && EXPERIMENTAL depends on PCI || RALINK_RT288X || RALINK_RT305X
select RT2800_LIB select RT2800_LIB
select RT2X00_LIB_PCI if RT2800PCI_PCI select RT2X00_LIB_PCI if PCI
select RT2X00_LIB_SOC if RT2800PCI_SOC select RT2X00_LIB_SOC if RALINK_RT288X || RALINK_RT305X
select RT2X00_LIB_HT select RT2X00_LIB_HT
select RT2X00_LIB_FIRMWARE select RT2X00_LIB_FIRMWARE
select RT2X00_LIB_CRYPTO select RT2X00_LIB_CRYPTO
select CRC_CCITT select CRC_CCITT
select EEPROM_93CX6 select EEPROM_93CX6
---help--- ---help---
This adds support for rt2800/rt3000/rt3500 wireless chipset family. This adds support for rt27xx/rt28xx/rt30xx wireless chipset family.
Supported chips: RT2760, RT2790, RT2860, RT2880, RT2890 & RT3052 Supported chips: RT2760, RT2790, RT2860, RT2880, RT2890, RT3052,
RT3090, RT3091 & RT3092
This driver is non-functional at the moment and is intended for
developers.
When compiled as a module, this driver will be called "rt2800pci.ko". When compiled as a module, this driver will be called "rt2800pci.ko".
if RT2800PCI if RT2800PCI
config RT2800PCI_RT30XX config RT2800PCI_RT33XX
bool "rt2800pci - Include support for rt30xx (PCI/PCIe/PCMCIA) devices" bool "rt2800pci - Include support for rt33xx devices (EXPERIMENTAL)"
default y depends on EXPERIMENTAL
default n
---help--- ---help---
This adds support for rt30xx wireless chipset family to the This adds support for rt33xx wireless chipset family to the
rt2800pci driver. rt2800pci driver.
Supported chips: RT3090, RT3091 & RT3092 Supported chips: RT3390
Support for these devices is non-functional at the moment and is Support for these devices is non-functional at the moment and is
intended for testers and developers. intended for testers and developers.
config RT2800PCI_RT35XX config RT2800PCI_RT35XX
bool "rt2800pci - Include support for rt35xx (PCI/PCIe/PCMCIA) devices" bool "rt2800pci - Include support for rt35xx devices (EXPERIMENTAL)"
depends on EXPERIMENTAL
default n default n
---help--- ---help---
This adds support for rt35xx wireless chipset family to the This adds support for rt35xx wireless chipset family to the
@ -134,8 +124,8 @@ config RT73USB
When compiled as a module, this driver will be called rt73usb. When compiled as a module, this driver will be called rt73usb.
config RT2800USB config RT2800USB
tristate "Ralink rt2800 (USB) support (EXPERIMENTAL)" tristate "Ralink rt27xx/rt28xx/rt30xx (USB) support"
depends on USB && EXPERIMENTAL depends on USB
select RT2800_LIB select RT2800_LIB
select RT2X00_LIB_USB select RT2X00_LIB_USB
select RT2X00_LIB_HT select RT2X00_LIB_HT
@ -143,30 +133,28 @@ config RT2800USB
select RT2X00_LIB_CRYPTO select RT2X00_LIB_CRYPTO
select CRC_CCITT select CRC_CCITT
---help--- ---help---
This adds experimental support for rt2800 wireless chipset family. This adds support for rt27xx/rt28xx/rt30xx wireless chipset family.
Supported chips: RT2770, RT2870 & RT3070. Supported chips: RT2770, RT2870 & RT3070, RT3071 & RT3072
Known issues:
- support for RT2870 chips doesn't work with 802.11n APs yet
- support for RT3070 chips is non-functional at the moment
When compiled as a module, this driver will be called "rt2800usb.ko". When compiled as a module, this driver will be called "rt2800usb.ko".
if RT2800USB if RT2800USB
config RT2800USB_RT30XX config RT2800USB_RT33XX
bool "rt2800usb - Include support for rt30xx (USB) devices" bool "rt2800usb - Include support for rt33xx devices (EXPERIMENTAL)"
default y depends on EXPERIMENTAL
default n
---help--- ---help---
This adds support for rt30xx wireless chipset family to the This adds support for rt33xx wireless chipset family to the
rt2800usb driver. rt2800usb driver.
Supported chips: RT3070, RT3071 & RT3072 Supported chips: RT3370
Support for these devices is non-functional at the moment and is Support for these devices is non-functional at the moment and is
intended for testers and developers. intended for testers and developers.
config RT2800USB_RT35XX config RT2800USB_RT35XX
bool "rt2800usb - Include support for rt35xx (USB) devices" bool "rt2800usb - Include support for rt35xx devices (EXPERIMENTAL)"
depends on EXPERIMENTAL
default n default n
---help--- ---help---
This adds support for rt35xx wireless chipset family to the This adds support for rt35xx wireless chipset family to the
@ -180,9 +168,9 @@ config RT2800USB_UNKNOWN
bool "rt2800usb - Include support for unknown (USB) devices" bool "rt2800usb - Include support for unknown (USB) devices"
default n default n
---help--- ---help---
This adds support for rt2800 family devices that are known to This adds support for rt2800usb devices that are known to
have a rt2800 family chipset, but for which the exact chipset have a rt28xx family compatible chipset, but for which the exact
is unknown. chipset is unknown.
Support status for these devices is unknown, and enabling these Support status for these devices is unknown, and enabling these
devices may or may not work. devices may or may not work.

View file

@ -47,6 +47,7 @@
* RF3021 2.4G 1T2R * RF3021 2.4G 1T2R
* RF3022 2.4G 2T2R * RF3022 2.4G 2T2R
* RF3052 2.4G 2T2R * RF3052 2.4G 2T2R
* RF3320 2.4G 1T1R
*/ */
#define RF2820 0x0001 #define RF2820 0x0001
#define RF2850 0x0002 #define RF2850 0x0002

View file

@ -1544,7 +1544,8 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
rt2x00_rf(rt2x00dev, RF3020) || rt2x00_rf(rt2x00dev, RF3020) ||
rt2x00_rf(rt2x00dev, RF3021) || rt2x00_rf(rt2x00dev, RF3021) ||
rt2x00_rf(rt2x00dev, RF3022) || rt2x00_rf(rt2x00dev, RF3022) ||
rt2x00_rf(rt2x00dev, RF3052)) rt2x00_rf(rt2x00dev, RF3052) ||
rt2x00_rf(rt2x00dev, RF3320))
rt2800_config_channel_rf3xxx(rt2x00dev, conf, rf, info); rt2800_config_channel_rf3xxx(rt2x00dev, conf, rf, info);
else else
rt2800_config_channel_rf2xxx(rt2x00dev, conf, rf, info); rt2800_config_channel_rf2xxx(rt2x00dev, conf, rf, info);
@ -2165,7 +2166,7 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
SHARED_KEY_MODE_ENTRY(i), 0); SHARED_KEY_MODE_ENTRY(i), 0);
for (i = 0; i < 256; i++) { for (i = 0; i < 256; i++) {
u32 wcid[2] = { 0xffffffff, 0x00ffffff }; static const u32 wcid[2] = { 0xffffffff, 0x00ffffff };
rt2800_register_multiwrite(rt2x00dev, MAC_WCID_ENTRY(i), rt2800_register_multiwrite(rt2x00dev, MAC_WCID_ENTRY(i),
wcid, sizeof(wcid)); wcid, sizeof(wcid));
@ -3012,7 +3013,8 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
!rt2x00_rf(rt2x00dev, RF2020) && !rt2x00_rf(rt2x00dev, RF2020) &&
!rt2x00_rf(rt2x00dev, RF3021) && !rt2x00_rf(rt2x00dev, RF3021) &&
!rt2x00_rf(rt2x00dev, RF3022) && !rt2x00_rf(rt2x00dev, RF3022) &&
!rt2x00_rf(rt2x00dev, RF3052)) { !rt2x00_rf(rt2x00dev, RF3052) &&
!rt2x00_rf(rt2x00dev, RF3320)) {
ERROR(rt2x00dev, "Invalid RF chipset detected.\n"); ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
return -ENODEV; return -ENODEV;
} }
@ -3276,7 +3278,8 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
} else if (rt2x00_rf(rt2x00dev, RF3020) || } else if (rt2x00_rf(rt2x00dev, RF3020) ||
rt2x00_rf(rt2x00dev, RF2020) || rt2x00_rf(rt2x00dev, RF2020) ||
rt2x00_rf(rt2x00dev, RF3021) || rt2x00_rf(rt2x00dev, RF3021) ||
rt2x00_rf(rt2x00dev, RF3022)) { rt2x00_rf(rt2x00dev, RF3022) ||
rt2x00_rf(rt2x00dev, RF3320)) {
spec->num_channels = 14; spec->num_channels = 14;
spec->channels = rf_vals_3x; spec->channels = rf_vals_3x;
} else if (rt2x00_rf(rt2x00dev, RF3052)) { } else if (rt2x00_rf(rt2x00dev, RF3052)) {

View file

@ -84,20 +84,22 @@ static void rt2800pci_mcu_status(struct rt2x00_dev *rt2x00dev, const u8 token)
rt2800_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0); rt2800_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0);
} }
#ifdef CONFIG_RT2800PCI_SOC #if defined(CONFIG_RALINK_RT288X) || defined(CONFIG_RALINK_RT305X)
static void rt2800pci_read_eeprom_soc(struct rt2x00_dev *rt2x00dev) static void rt2800pci_read_eeprom_soc(struct rt2x00_dev *rt2x00dev)
{ {
u32 *base_addr = (u32 *) KSEG1ADDR(0x1F040000); /* XXX for RT3052 */ void __iomem *base_addr = ioremap(0x1F040000, EEPROM_SIZE);
memcpy_fromio(rt2x00dev->eeprom, base_addr, EEPROM_SIZE); memcpy_fromio(rt2x00dev->eeprom, base_addr, EEPROM_SIZE);
iounmap(base_addr);
} }
#else #else
static inline void rt2800pci_read_eeprom_soc(struct rt2x00_dev *rt2x00dev) static inline void rt2800pci_read_eeprom_soc(struct rt2x00_dev *rt2x00dev)
{ {
} }
#endif /* CONFIG_RT2800PCI_SOC */ #endif /* CONFIG_RALINK_RT288X || CONFIG_RALINK_RT305X */
#ifdef CONFIG_RT2800PCI_PCI #ifdef CONFIG_PCI
static void rt2800pci_eepromregister_read(struct eeprom_93cx6 *eeprom) static void rt2800pci_eepromregister_read(struct eeprom_93cx6 *eeprom)
{ {
struct rt2x00_dev *rt2x00dev = eeprom->data; struct rt2x00_dev *rt2x00dev = eeprom->data;
@ -181,7 +183,7 @@ static inline int rt2800pci_efuse_detect(struct rt2x00_dev *rt2x00dev)
static inline void rt2800pci_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev) static inline void rt2800pci_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev)
{ {
} }
#endif /* CONFIG_RT2800PCI_PCI */ #endif /* CONFIG_PCI */
/* /*
* Firmware functions * Firmware functions
@ -1031,12 +1033,15 @@ static const struct rt2x00_ops rt2800pci_ops = {
/* /*
* RT2800pci module information. * RT2800pci module information.
*/ */
#ifdef CONFIG_RT2800PCI_PCI #ifdef CONFIG_PCI
static DEFINE_PCI_DEVICE_TABLE(rt2800pci_device_table) = { static DEFINE_PCI_DEVICE_TABLE(rt2800pci_device_table) = {
{ PCI_DEVICE(0x1814, 0x0601), PCI_DEVICE_DATA(&rt2800pci_ops) }, { PCI_DEVICE(0x1814, 0x0601), PCI_DEVICE_DATA(&rt2800pci_ops) },
{ PCI_DEVICE(0x1814, 0x0681), PCI_DEVICE_DATA(&rt2800pci_ops) }, { PCI_DEVICE(0x1814, 0x0681), PCI_DEVICE_DATA(&rt2800pci_ops) },
{ PCI_DEVICE(0x1814, 0x0701), PCI_DEVICE_DATA(&rt2800pci_ops) }, { PCI_DEVICE(0x1814, 0x0701), PCI_DEVICE_DATA(&rt2800pci_ops) },
{ PCI_DEVICE(0x1814, 0x0781), PCI_DEVICE_DATA(&rt2800pci_ops) }, { PCI_DEVICE(0x1814, 0x0781), PCI_DEVICE_DATA(&rt2800pci_ops) },
{ PCI_DEVICE(0x1814, 0x3090), PCI_DEVICE_DATA(&rt2800pci_ops) },
{ PCI_DEVICE(0x1814, 0x3091), PCI_DEVICE_DATA(&rt2800pci_ops) },
{ PCI_DEVICE(0x1814, 0x3092), PCI_DEVICE_DATA(&rt2800pci_ops) },
{ PCI_DEVICE(0x1432, 0x7708), PCI_DEVICE_DATA(&rt2800pci_ops) }, { PCI_DEVICE(0x1432, 0x7708), PCI_DEVICE_DATA(&rt2800pci_ops) },
{ PCI_DEVICE(0x1432, 0x7727), PCI_DEVICE_DATA(&rt2800pci_ops) }, { PCI_DEVICE(0x1432, 0x7727), PCI_DEVICE_DATA(&rt2800pci_ops) },
{ PCI_DEVICE(0x1432, 0x7728), PCI_DEVICE_DATA(&rt2800pci_ops) }, { PCI_DEVICE(0x1432, 0x7728), PCI_DEVICE_DATA(&rt2800pci_ops) },
@ -1044,12 +1049,10 @@ static DEFINE_PCI_DEVICE_TABLE(rt2800pci_device_table) = {
{ PCI_DEVICE(0x1432, 0x7748), PCI_DEVICE_DATA(&rt2800pci_ops) }, { PCI_DEVICE(0x1432, 0x7748), PCI_DEVICE_DATA(&rt2800pci_ops) },
{ PCI_DEVICE(0x1432, 0x7758), PCI_DEVICE_DATA(&rt2800pci_ops) }, { PCI_DEVICE(0x1432, 0x7758), PCI_DEVICE_DATA(&rt2800pci_ops) },
{ PCI_DEVICE(0x1432, 0x7768), PCI_DEVICE_DATA(&rt2800pci_ops) }, { PCI_DEVICE(0x1432, 0x7768), PCI_DEVICE_DATA(&rt2800pci_ops) },
{ PCI_DEVICE(0x1a3b, 0x1059), PCI_DEVICE_DATA(&rt2800pci_ops) },
#ifdef CONFIG_RT2800PCI_RT30XX
{ PCI_DEVICE(0x1814, 0x3090), PCI_DEVICE_DATA(&rt2800pci_ops) },
{ PCI_DEVICE(0x1814, 0x3091), PCI_DEVICE_DATA(&rt2800pci_ops) },
{ PCI_DEVICE(0x1814, 0x3092), PCI_DEVICE_DATA(&rt2800pci_ops) },
{ PCI_DEVICE(0x1462, 0x891a), PCI_DEVICE_DATA(&rt2800pci_ops) }, { PCI_DEVICE(0x1462, 0x891a), PCI_DEVICE_DATA(&rt2800pci_ops) },
{ PCI_DEVICE(0x1a3b, 0x1059), PCI_DEVICE_DATA(&rt2800pci_ops) },
#ifdef CONFIG_RT2800PCI_RT33XX
{ PCI_DEVICE(0x1814, 0x3390), PCI_DEVICE_DATA(&rt2800pci_ops) },
#endif #endif
#ifdef CONFIG_RT2800PCI_RT35XX #ifdef CONFIG_RT2800PCI_RT35XX
{ PCI_DEVICE(0x1814, 0x3060), PCI_DEVICE_DATA(&rt2800pci_ops) }, { PCI_DEVICE(0x1814, 0x3060), PCI_DEVICE_DATA(&rt2800pci_ops) },
@ -1060,19 +1063,19 @@ static DEFINE_PCI_DEVICE_TABLE(rt2800pci_device_table) = {
#endif #endif
{ 0, } { 0, }
}; };
#endif /* CONFIG_RT2800PCI_PCI */ #endif /* CONFIG_PCI */
MODULE_AUTHOR(DRV_PROJECT); MODULE_AUTHOR(DRV_PROJECT);
MODULE_VERSION(DRV_VERSION); MODULE_VERSION(DRV_VERSION);
MODULE_DESCRIPTION("Ralink RT2800 PCI & PCMCIA Wireless LAN driver."); MODULE_DESCRIPTION("Ralink RT2800 PCI & PCMCIA Wireless LAN driver.");
MODULE_SUPPORTED_DEVICE("Ralink RT2860 PCI & PCMCIA chipset based cards"); MODULE_SUPPORTED_DEVICE("Ralink RT2860 PCI & PCMCIA chipset based cards");
#ifdef CONFIG_RT2800PCI_PCI #ifdef CONFIG_PCI
MODULE_FIRMWARE(FIRMWARE_RT2860); MODULE_FIRMWARE(FIRMWARE_RT2860);
MODULE_DEVICE_TABLE(pci, rt2800pci_device_table); MODULE_DEVICE_TABLE(pci, rt2800pci_device_table);
#endif /* CONFIG_RT2800PCI_PCI */ #endif /* CONFIG_PCI */
MODULE_LICENSE("GPL"); MODULE_LICENSE("GPL");
#ifdef CONFIG_RT2800PCI_SOC #if defined(CONFIG_RALINK_RT288X) || defined(CONFIG_RALINK_RT305X)
static int rt2800soc_probe(struct platform_device *pdev) static int rt2800soc_probe(struct platform_device *pdev)
{ {
return rt2x00soc_probe(pdev, &rt2800pci_ops); return rt2x00soc_probe(pdev, &rt2800pci_ops);
@ -1089,9 +1092,9 @@ static struct platform_driver rt2800soc_driver = {
.suspend = rt2x00soc_suspend, .suspend = rt2x00soc_suspend,
.resume = rt2x00soc_resume, .resume = rt2x00soc_resume,
}; };
#endif /* CONFIG_RT2800PCI_SOC */ #endif /* CONFIG_RALINK_RT288X || CONFIG_RALINK_RT305X */
#ifdef CONFIG_RT2800PCI_PCI #ifdef CONFIG_PCI
static struct pci_driver rt2800pci_driver = { static struct pci_driver rt2800pci_driver = {
.name = KBUILD_MODNAME, .name = KBUILD_MODNAME,
.id_table = rt2800pci_device_table, .id_table = rt2800pci_device_table,
@ -1100,21 +1103,21 @@ static struct pci_driver rt2800pci_driver = {
.suspend = rt2x00pci_suspend, .suspend = rt2x00pci_suspend,
.resume = rt2x00pci_resume, .resume = rt2x00pci_resume,
}; };
#endif /* CONFIG_RT2800PCI_PCI */ #endif /* CONFIG_PCI */
static int __init rt2800pci_init(void) static int __init rt2800pci_init(void)
{ {
int ret = 0; int ret = 0;
#ifdef CONFIG_RT2800PCI_SOC #if defined(CONFIG_RALINK_RT288X) || defined(CONFIG_RALINK_RT305X)
ret = platform_driver_register(&rt2800soc_driver); ret = platform_driver_register(&rt2800soc_driver);
if (ret) if (ret)
return ret; return ret;
#endif #endif
#ifdef CONFIG_RT2800PCI_PCI #ifdef CONFIG_PCI
ret = pci_register_driver(&rt2800pci_driver); ret = pci_register_driver(&rt2800pci_driver);
if (ret) { if (ret) {
#ifdef CONFIG_RT2800PCI_SOC #if defined(CONFIG_RALINK_RT288X) || defined(CONFIG_RALINK_RT305X)
platform_driver_unregister(&rt2800soc_driver); platform_driver_unregister(&rt2800soc_driver);
#endif #endif
return ret; return ret;
@ -1126,10 +1129,10 @@ static int __init rt2800pci_init(void)
static void __exit rt2800pci_exit(void) static void __exit rt2800pci_exit(void)
{ {
#ifdef CONFIG_RT2800PCI_PCI #ifdef CONFIG_PCI
pci_unregister_driver(&rt2800pci_driver); pci_unregister_driver(&rt2800pci_driver);
#endif #endif
#ifdef CONFIG_RT2800PCI_SOC #if defined(CONFIG_RALINK_RT288X) || defined(CONFIG_RALINK_RT305X)
platform_driver_unregister(&rt2800soc_driver); platform_driver_unregister(&rt2800soc_driver);
#endif #endif
} }

View file

@ -307,8 +307,14 @@ static void rt2800usb_write_tx_desc(struct queue_entry *entry,
* Initialize TXINFO descriptor * Initialize TXINFO descriptor
*/ */
rt2x00_desc_read(txi, 0, &word); rt2x00_desc_read(txi, 0, &word);
/*
* The size of TXINFO_W0_USB_DMA_TX_PKT_LEN is
* TXWI + 802.11 header + L2 pad + payload + pad,
* so need to decrease size of TXINFO and USB end pad.
*/
rt2x00_set_field32(&word, TXINFO_W0_USB_DMA_TX_PKT_LEN, rt2x00_set_field32(&word, TXINFO_W0_USB_DMA_TX_PKT_LEN,
entry->skb->len - TXINFO_DESC_SIZE); entry->skb->len - TXINFO_DESC_SIZE - 4);
rt2x00_set_field32(&word, TXINFO_W0_WIV, rt2x00_set_field32(&word, TXINFO_W0_WIV,
!test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc->flags)); !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc->flags));
rt2x00_set_field32(&word, TXINFO_W0_QSEL, 2); rt2x00_set_field32(&word, TXINFO_W0_QSEL, 2);
@ -326,22 +332,29 @@ static void rt2800usb_write_tx_desc(struct queue_entry *entry,
skbdesc->desc_len = TXINFO_DESC_SIZE + TXWI_DESC_SIZE; skbdesc->desc_len = TXINFO_DESC_SIZE + TXWI_DESC_SIZE;
} }
static void rt2800usb_write_tx_data(struct queue_entry *entry,
struct txentry_desc *txdesc)
{
u8 padding_len;
/*
* pad(1~3 bytes) is added after each 802.11 payload.
* USB end pad(4 bytes) is added at each USB bulk out packet end.
* TX frame format is :
* | TXINFO | TXWI | 802.11 header | L2 pad | payload | pad | USB end pad |
* |<------------- tx_pkt_len ------------->|
*/
rt2800_write_tx_data(entry, txdesc);
padding_len = roundup(entry->skb->len + 4, 4) - entry->skb->len;
memset(skb_put(entry->skb, padding_len), 0, padding_len);
}
/* /*
* TX data initialization * TX data initialization
*/ */
static int rt2800usb_get_tx_data_len(struct queue_entry *entry) static int rt2800usb_get_tx_data_len(struct queue_entry *entry)
{ {
int length; return entry->skb->len;
/*
* The length _must_ include 4 bytes padding,
* it should always be multiple of 4,
* but it must _not_ be a multiple of the USB packet size.
*/
length = roundup(entry->skb->len + 4, 4);
length += (4 * !(length % entry->queue->usb_maxpacket));
return length;
} }
/* /*
@ -579,7 +592,7 @@ static const struct rt2x00lib_ops rt2800usb_rt2x00_ops = {
.link_tuner = rt2800_link_tuner, .link_tuner = rt2800_link_tuner,
.watchdog = rt2800usb_watchdog, .watchdog = rt2800usb_watchdog,
.write_tx_desc = rt2800usb_write_tx_desc, .write_tx_desc = rt2800usb_write_tx_desc,
.write_tx_data = rt2800_write_tx_data, .write_tx_data = rt2800usb_write_tx_data,
.write_beacon = rt2800_write_beacon, .write_beacon = rt2800_write_beacon,
.get_tx_data_len = rt2800usb_get_tx_data_len, .get_tx_data_len = rt2800usb_get_tx_data_len,
.kick_tx_queue = rt2x00usb_kick_tx_queue, .kick_tx_queue = rt2x00usb_kick_tx_queue,
@ -641,11 +654,19 @@ static struct usb_device_id rt2800usb_device_table[] = {
/* Abocom */ /* Abocom */
{ USB_DEVICE(0x07b8, 0x2870), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x07b8, 0x2870), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x07b8, 0x2770), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x07b8, 0x2770), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x07b8, 0x3070), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x07b8, 0x3071), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x07b8, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x1482, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x1482, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) },
/* AirTies */
{ USB_DEVICE(0x1eda, 0x2310), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Allwin */ /* Allwin */
{ USB_DEVICE(0x8516, 0x2070), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x8516, 0x2070), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x8516, 0x2770), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x8516, 0x2770), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x8516, 0x2870), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x8516, 0x2870), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x8516, 0x3070), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x8516, 0x3071), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x8516, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Amit */ /* Amit */
{ USB_DEVICE(0x15c5, 0x0008), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x15c5, 0x0008), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Askey */ /* Askey */
@ -654,8 +675,13 @@ static struct usb_device_id rt2800usb_device_table[] = {
{ USB_DEVICE(0x0b05, 0x1731), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0b05, 0x1731), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0b05, 0x1732), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0b05, 0x1732), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0b05, 0x1742), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0b05, 0x1742), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0b05, 0x1784), USB_DEVICE_DATA(&rt2800usb_ops) },
/* AzureWave */ /* AzureWave */
{ USB_DEVICE(0x13d3, 0x3247), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x13d3, 0x3247), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x13d3, 0x3273), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x13d3, 0x3305), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x13d3, 0x3307), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x13d3, 0x3321), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Belkin */ /* Belkin */
{ USB_DEVICE(0x050d, 0x8053), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x050d, 0x8053), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x050d, 0x805c), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x050d, 0x805c), USB_DEVICE_DATA(&rt2800usb_ops) },
@ -666,6 +692,7 @@ static struct usb_device_id rt2800usb_device_table[] = {
{ USB_DEVICE(0x14b2, 0x3c06), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x14b2, 0x3c06), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x14b2, 0x3c07), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x14b2, 0x3c07), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x14b2, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x14b2, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x14b2, 0x3c12), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x14b2, 0x3c23), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x14b2, 0x3c23), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x14b2, 0x3c25), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x14b2, 0x3c25), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x14b2, 0x3c27), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x14b2, 0x3c27), USB_DEVICE_DATA(&rt2800usb_ops) },
@ -674,17 +701,36 @@ static struct usb_device_id rt2800usb_device_table[] = {
{ USB_DEVICE(0x07aa, 0x002f), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x07aa, 0x002f), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x07aa, 0x003c), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x07aa, 0x003c), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x07aa, 0x003f), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x07aa, 0x003f), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x18c5, 0x0012), USB_DEVICE_DATA(&rt2800usb_ops) },
/* D-Link */ /* D-Link */
{ USB_DEVICE(0x07d1, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x07d1, 0x3c09), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x07d1, 0x3c0a), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x07d1, 0x3c0d), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x07d1, 0x3c0e), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x07d1, 0x3c0f), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x07d1, 0x3c11), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x07d1, 0x3c11), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x07d1, 0x3c16), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Draytek */
{ USB_DEVICE(0x07fa, 0x7712), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Edimax */ /* Edimax */
{ USB_DEVICE(0x7392, 0x7711), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x7392, 0x7717), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x7392, 0x7717), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x7392, 0x7718), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x7392, 0x7718), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Encore */
{ USB_DEVICE(0x203d, 0x1480), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x203d, 0x14a9), USB_DEVICE_DATA(&rt2800usb_ops) },
/* EnGenius */ /* EnGenius */
{ USB_DEVICE(0x1740, 0x9701), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x1740, 0x9701), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x1740, 0x9702), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x1740, 0x9702), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x1740, 0x9703), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x1740, 0x9705), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x1740, 0x9706), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x1740, 0x9707), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x1740, 0x9708), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x1740, 0x9709), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Gigabyte */ /* Gigabyte */
{ USB_DEVICE(0x1044, 0x800b), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x1044, 0x800b), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x1044, 0x800d), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Hawking */ /* Hawking */
{ USB_DEVICE(0x0e66, 0x0001), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0e66, 0x0001), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0e66, 0x0003), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0e66, 0x0003), USB_DEVICE_DATA(&rt2800usb_ops) },
@ -693,6 +739,10 @@ static struct usb_device_id rt2800usb_device_table[] = {
{ USB_DEVICE(0x0e66, 0x0013), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0e66, 0x0013), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0e66, 0x0017), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0e66, 0x0017), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0e66, 0x0018), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0e66, 0x0018), USB_DEVICE_DATA(&rt2800usb_ops) },
/* I-O DATA */
{ USB_DEVICE(0x04bb, 0x0945), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x04bb, 0x0947), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x04bb, 0x0948), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Linksys */ /* Linksys */
{ USB_DEVICE(0x1737, 0x0070), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x1737, 0x0070), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x1737, 0x0071), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x1737, 0x0071), USB_DEVICE_DATA(&rt2800usb_ops) },
@ -700,107 +750,16 @@ static struct usb_device_id rt2800usb_device_table[] = {
{ USB_DEVICE(0x0789, 0x0162), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0789, 0x0162), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0789, 0x0163), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0789, 0x0163), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0789, 0x0164), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0789, 0x0164), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0789, 0x0166), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Motorola */ /* Motorola */
{ USB_DEVICE(0x100d, 0x9031), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x100d, 0x9031), USB_DEVICE_DATA(&rt2800usb_ops) },
/* MSI */ /* MSI */
{ USB_DEVICE(0x0db0, 0x6899), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Philips */
{ USB_DEVICE(0x0471, 0x200f), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Planex */
{ USB_DEVICE(0x2019, 0xed06), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Ralink */
{ USB_DEVICE(0x148f, 0x2770), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x148f, 0x2870), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Samsung */
{ USB_DEVICE(0x04e8, 0x2018), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Siemens */
{ USB_DEVICE(0x129b, 0x1828), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Sitecom */
{ USB_DEVICE(0x0df6, 0x0017), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0df6, 0x002b), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0df6, 0x002c), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0df6, 0x002d), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0df6, 0x0039), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0df6, 0x003b), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0df6, 0x003d), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0df6, 0x003f), USB_DEVICE_DATA(&rt2800usb_ops) },
/* SMC */
{ USB_DEVICE(0x083a, 0x6618), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x083a, 0x7512), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x083a, 0x7522), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x083a, 0x8522), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x083a, 0xa618), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x083a, 0xb522), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Sparklan */
{ USB_DEVICE(0x15a9, 0x0006), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Sweex */
{ USB_DEVICE(0x177f, 0x0302), USB_DEVICE_DATA(&rt2800usb_ops) },
/* U-Media*/
{ USB_DEVICE(0x157e, 0x300e), USB_DEVICE_DATA(&rt2800usb_ops) },
/* ZCOM */
{ USB_DEVICE(0x0cde, 0x0022), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0cde, 0x0025), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Zinwell */
{ USB_DEVICE(0x5a57, 0x0280), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x5a57, 0x0282), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Zyxel */
{ USB_DEVICE(0x0586, 0x3416), USB_DEVICE_DATA(&rt2800usb_ops) },
#ifdef CONFIG_RT2800USB_RT30XX
/* Abocom */
{ USB_DEVICE(0x07b8, 0x3070), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x07b8, 0x3071), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x07b8, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) },
/* AirTies */
{ USB_DEVICE(0x1eda, 0x2310), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Allwin */
{ USB_DEVICE(0x8516, 0x3070), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x8516, 0x3071), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x8516, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) },
/* ASUS */
{ USB_DEVICE(0x0b05, 0x1784), USB_DEVICE_DATA(&rt2800usb_ops) },
/* AzureWave */
{ USB_DEVICE(0x13d3, 0x3273), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x13d3, 0x3305), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x13d3, 0x3307), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x13d3, 0x3321), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Conceptronic */
{ USB_DEVICE(0x14b2, 0x3c12), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Corega */
{ USB_DEVICE(0x18c5, 0x0012), USB_DEVICE_DATA(&rt2800usb_ops) },
/* D-Link */
{ USB_DEVICE(0x07d1, 0x3c0a), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x07d1, 0x3c0d), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x07d1, 0x3c0e), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x07d1, 0x3c0f), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x07d1, 0x3c16), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Draytek */
{ USB_DEVICE(0x07fa, 0x7712), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Edimax */
{ USB_DEVICE(0x7392, 0x7711), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Encore */
{ USB_DEVICE(0x203d, 0x1480), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x203d, 0x14a9), USB_DEVICE_DATA(&rt2800usb_ops) },
/* EnGenius */
{ USB_DEVICE(0x1740, 0x9703), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x1740, 0x9705), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x1740, 0x9706), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x1740, 0x9707), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x1740, 0x9708), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x1740, 0x9709), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Gigabyte */
{ USB_DEVICE(0x1044, 0x800d), USB_DEVICE_DATA(&rt2800usb_ops) },
/* I-O DATA */
{ USB_DEVICE(0x04bb, 0x0945), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x04bb, 0x0947), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x04bb, 0x0948), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Logitec */
{ USB_DEVICE(0x0789, 0x0166), USB_DEVICE_DATA(&rt2800usb_ops) },
/* MSI */
{ USB_DEVICE(0x0db0, 0x3820), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0db0, 0x3820), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0db0, 0x3821), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0db0, 0x3821), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0db0, 0x3822), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0db0, 0x3822), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0db0, 0x3870), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0db0, 0x3870), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0db0, 0x3871), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0db0, 0x3871), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0db0, 0x6899), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0db0, 0x821a), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0db0, 0x821a), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0db0, 0x822a), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0db0, 0x822a), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0db0, 0x822b), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0db0, 0x822b), USB_DEVICE_DATA(&rt2800usb_ops) },
@ -815,29 +774,71 @@ static struct usb_device_id rt2800usb_device_table[] = {
/* Pegatron */ /* Pegatron */
{ USB_DEVICE(0x1d4d, 0x000c), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x1d4d, 0x000c), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x1d4d, 0x000e), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x1d4d, 0x000e), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Philips */
{ USB_DEVICE(0x0471, 0x200f), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Planex */ /* Planex */
{ USB_DEVICE(0x2019, 0xab25), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x2019, 0xab25), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x2019, 0xed06), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Quanta */ /* Quanta */
{ USB_DEVICE(0x1a32, 0x0304), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x1a32, 0x0304), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Ralink */ /* Ralink */
{ USB_DEVICE(0x148f, 0x2070), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x148f, 0x2070), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x148f, 0x2770), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x148f, 0x2870), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x148f, 0x3070), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x148f, 0x3070), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x148f, 0x3071), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x148f, 0x3071), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x148f, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x148f, 0x3072), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Samsung */
{ USB_DEVICE(0x04e8, 0x2018), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Siemens */
{ USB_DEVICE(0x129b, 0x1828), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Sitecom */ /* Sitecom */
{ USB_DEVICE(0x0df6, 0x0017), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0df6, 0x002b), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0df6, 0x002c), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0df6, 0x002d), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0df6, 0x0039), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0df6, 0x003b), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0df6, 0x003d), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0df6, 0x003e), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0df6, 0x003e), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0df6, 0x003f), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0df6, 0x0040), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0df6, 0x0040), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0df6, 0x0042), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0df6, 0x0042), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0df6, 0x0047), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0df6, 0x0047), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0df6, 0x0048), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0df6, 0x0048), USB_DEVICE_DATA(&rt2800usb_ops) },
/* SMC */ /* SMC */
{ USB_DEVICE(0x083a, 0x6618), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x083a, 0x7511), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x083a, 0x7511), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x083a, 0x7512), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x083a, 0x7522), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x083a, 0x8522), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x083a, 0xa618), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x083a, 0xa701), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x083a, 0xa701), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x083a, 0xa702), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x083a, 0xa702), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x083a, 0xa703), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x083a, 0xa703), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x083a, 0xb522), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Sparklan */
{ USB_DEVICE(0x15a9, 0x0006), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Sweex */
{ USB_DEVICE(0x177f, 0x0302), USB_DEVICE_DATA(&rt2800usb_ops) },
/* U-Media*/
{ USB_DEVICE(0x157e, 0x300e), USB_DEVICE_DATA(&rt2800usb_ops) },
/* ZCOM */
{ USB_DEVICE(0x0cde, 0x0022), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0cde, 0x0025), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Zinwell */ /* Zinwell */
{ USB_DEVICE(0x5a57, 0x0280), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x5a57, 0x0282), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x5a57, 0x0283), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x5a57, 0x0283), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x5a57, 0x5257), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x5a57, 0x5257), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Zyxel */
{ USB_DEVICE(0x0586, 0x3416), USB_DEVICE_DATA(&rt2800usb_ops) },
#ifdef CONFIG_RT2800USB_RT33XX
/* Ralink */
{ USB_DEVICE(0x148f, 0x3370), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x148f, 0x8070), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Sitecom */
{ USB_DEVICE(0x0df6, 0x0050), USB_DEVICE_DATA(&rt2800usb_ops) },
#endif #endif
#ifdef CONFIG_RT2800USB_RT35XX #ifdef CONFIG_RT2800USB_RT35XX
/* Allwin */ /* Allwin */
@ -851,12 +852,9 @@ static struct usb_device_id rt2800usb_device_table[] = {
/* I-O DATA */ /* I-O DATA */
{ USB_DEVICE(0x04bb, 0x0944), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x04bb, 0x0944), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Ralink */ /* Ralink */
{ USB_DEVICE(0x148f, 0x3370), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x148f, 0x3572), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x148f, 0x3572), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x148f, 0x8070), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Sitecom */ /* Sitecom */
{ USB_DEVICE(0x0df6, 0x0041), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x0df6, 0x0041), USB_DEVICE_DATA(&rt2800usb_ops) },
{ USB_DEVICE(0x0df6, 0x0050), USB_DEVICE_DATA(&rt2800usb_ops) },
/* Zinwell */ /* Zinwell */
{ USB_DEVICE(0x5a57, 0x0284), USB_DEVICE_DATA(&rt2800usb_ops) }, { USB_DEVICE(0x5a57, 0x0284), USB_DEVICE_DATA(&rt2800usb_ops) },
#endif #endif

View file

@ -915,7 +915,7 @@ struct rt2x00_dev {
* in those cases REGISTER_BUSY_COUNT attempts should be * in those cases REGISTER_BUSY_COUNT attempts should be
* taken with a REGISTER_BUSY_DELAY interval. * taken with a REGISTER_BUSY_DELAY interval.
*/ */
#define REGISTER_BUSY_COUNT 5 #define REGISTER_BUSY_COUNT 100
#define REGISTER_BUSY_DELAY 100 #define REGISTER_BUSY_DELAY 100
/* /*

View file

@ -250,10 +250,9 @@ void rt2x00lib_txdone(struct queue_entry *entry,
struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb); struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb); struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
enum data_queue_qid qid = skb_get_queue_mapping(entry->skb); enum data_queue_qid qid = skb_get_queue_mapping(entry->skb);
unsigned int header_length = ieee80211_get_hdrlen_from_skb(entry->skb); unsigned int header_length, i;
u8 rate_idx, rate_flags, retry_rates; u8 rate_idx, rate_flags, retry_rates;
u8 skbdesc_flags = skbdesc->flags; u8 skbdesc_flags = skbdesc->flags;
unsigned int i;
bool success; bool success;
/* /*
@ -271,6 +270,11 @@ void rt2x00lib_txdone(struct queue_entry *entry,
*/ */
skbdesc->flags &= ~SKBDESC_DESC_IN_SKB; skbdesc->flags &= ~SKBDESC_DESC_IN_SKB;
/*
* Determine the length of 802.11 header.
*/
header_length = ieee80211_get_hdrlen_from_skb(entry->skb);
/* /*
* Remove L2 padding which was added during * Remove L2 padding which was added during
*/ */

View file

@ -204,8 +204,10 @@ void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int header_length)
if (!l2pad) if (!l2pad)
return; return;
memmove(skb->data + l2pad, skb->data, header_length); memmove(skb->data + header_length, skb->data + header_length + l2pad,
skb_pull(skb, l2pad); skb->len - header_length - l2pad);
skb_trim(skb, skb->len - l2pad);
} }
static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry, static void rt2x00queue_create_tx_descriptor_seq(struct queue_entry *entry,

View file

@ -40,6 +40,8 @@ static void rt2x00soc_free_reg(struct rt2x00_dev *rt2x00dev)
kfree(rt2x00dev->eeprom); kfree(rt2x00dev->eeprom);
rt2x00dev->eeprom = NULL; rt2x00dev->eeprom = NULL;
iounmap(rt2x00dev->csr.base);
} }
static int rt2x00soc_alloc_reg(struct rt2x00_dev *rt2x00dev) static int rt2x00soc_alloc_reg(struct rt2x00_dev *rt2x00dev)
@ -51,9 +53,9 @@ static int rt2x00soc_alloc_reg(struct rt2x00_dev *rt2x00dev)
if (!res) if (!res)
return -ENODEV; return -ENODEV;
rt2x00dev->csr.base = (void __iomem *)KSEG1ADDR(res->start); rt2x00dev->csr.base = ioremap(res->start, resource_size(res));
if (!rt2x00dev->csr.base) if (!rt2x00dev->csr.base)
goto exit; return -ENOMEM;
rt2x00dev->eeprom = kzalloc(rt2x00dev->ops->eeprom_size, GFP_KERNEL); rt2x00dev->eeprom = kzalloc(rt2x00dev->ops->eeprom_size, GFP_KERNEL);
if (!rt2x00dev->eeprom) if (!rt2x00dev->eeprom)

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