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net/mlx5: Add PCIe outbound stalls counters infrastructure

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Add capability bit in MCAM register and counters to MPCNT register.

Signed-off-by: Gal Pressman <galp@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
This commit is contained in:
Gal Pressman 2017-06-15 18:29:23 +03:00 committed by Saeed Mahameed
parent eb234ee9d5
commit 5405fa26c2
1 changed files with 14 additions and 3 deletions
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17
include/linux/mlx5/mlx5_ifc.h
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@ -1854,7 +1854,17 @@ struct mlx5_ifc_pcie_perf_cntrs_grp_data_layout_bits {
u8 crc_error_tlp[0x20]; u8 crc_error_tlp[0x20];
u8 reserved_at_140[0x680]; u8 reserved_at_140[0x40];
u8 outbound_stalled_reads[0x20];
u8 outbound_stalled_writes[0x20];
u8 outbound_stalled_reads_events[0x20];
u8 outbound_stalled_writes_events[0x20];
u8 reserved_at_200[0x5c0];
}; };
struct mlx5_ifc_cmd_inter_comp_event_bits { struct mlx5_ifc_cmd_inter_comp_event_bits {
@ -7744,8 +7754,9 @@ struct mlx5_ifc_pcam_reg_bits {
}; };
struct mlx5_ifc_mcam_enhanced_features_bits { struct mlx5_ifc_mcam_enhanced_features_bits {
u8 reserved_at_0[0x7d]; u8 reserved_at_0[0x7b];
u8 pcie_outbound_stalled[0x1];
u8 reserved_at_7c[0x1];
u8 mtpps_enh_out_per_adj[0x1]; u8 mtpps_enh_out_per_adj[0x1];
u8 mtpps_fs[0x1]; u8 mtpps_fs[0x1];
u8 pcie_performance_group[0x1]; u8 pcie_performance_group[0x1];