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ASoC: sgtl5000: add delay before first I2C access

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To quote from section 1.3.1 of the data sheet:
	The SGTL5000 has an internal reset that is deasserted
	8 SYS_MCLK cycles after all power rails have been brought
	up. After this time, communication can start

	...
	1.0us represents 8 SYS_MCLK cycles at the minimum 8.0 MHz SYS_MCLK.

Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
Cc: stable@vger.kernel.org
This commit is contained in:
Eric Nelson 2015-01-30 14:07:55 -07:00 committed by Mark Brown
parent 9ee802ec5b
commit 58cc9c9a17
1 changed files with 3 additions and 0 deletions
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3
sound/soc/codecs/sgtl5000.c
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@ -1462,6 +1462,9 @@ static int sgtl5000_i2c_probe(struct i2c_client *client,
if (ret)
return ret;
/* Need 8 clocks before I2C accesses */
udelay(1);
/* read chip information */
ret = regmap_read(sgtl5000->regmap, SGTL5000_CHIP_ID, &reg);
if (ret)