mvebu fixes-non-critical for v3.12
- dove - fix section mismatch (all callers are already _init, so it's just a space issue) -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.20 (GNU/Linux) iQEcBAABAgAGBQJR8WKEAAoJEAi3KVZQDZAee5EH+wfCyJExLJIEl4WvqOAL/Nme w5WGU4NONKb4nP8OTzuN0iR1+IHU6M3kiunn44iW5DzL7Eh6xP/EtW/f43SpjXTN slIeEfgLSsZkLt4lTlDjja/K4cB61LbZ/T/SyeY4VnoIHAUr/Z0hR4OyuDqWRIai wMZ6X54oNz+EKXG2mXxDBysPmxywoZU8dLQfOgjYgunSk2g8D5EU03fhfLZwHRQt cn5EEmNpjalDD4j2X04hyI5iZcH1OguaElYj5YuyYqf+8prTuNNoJ7g2eaW2Fy61 bHgx0N38rY0mhmTgVVSS6y7n0zlSlC2nl0BrjDKBAs9ekYq2NAXO9AohveOuYj0= =kbQG -----END PGP SIGNATURE----- Merge tag 'fixes-non-3.12' of git://git.infradead.org/linux-mvebu into next/fixes-non-critical From Jason Cooper: mvebu fixes-non-critical for v3.12 - dove - fix section mismatch (all callers are already _init, so it's just a space issue) * tag 'fixes-non-3.12' of git://git.infradead.org/linux-mvebu: ARM: dove: fix missing __init section of dove_mpp_gpio_mode + Linux 3.11-rc2 Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
6a33fc8cac
663 changed files with 3603 additions and 93853 deletions
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@ -267,7 +267,7 @@ Q: If i have some kernel code that needs to be aware of CPU arrival and
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A: This is what you would need in your kernel code to receive notifications.
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A: This is what you would need in your kernel code to receive notifications.
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#include <linux/cpu.h>
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#include <linux/cpu.h>
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static int __cpuinit foobar_cpu_callback(struct notifier_block *nfb,
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static int foobar_cpu_callback(struct notifier_block *nfb,
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unsigned long action, void *hcpu)
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unsigned long action, void *hcpu)
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{
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{
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unsigned int cpu = (unsigned long)hcpu;
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unsigned int cpu = (unsigned long)hcpu;
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@ -285,7 +285,7 @@ A: This is what you would need in your kernel code to receive notifications.
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return NOTIFY_OK;
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return NOTIFY_OK;
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}
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}
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static struct notifier_block __cpuinitdata foobar_cpu_notifer =
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static struct notifier_block foobar_cpu_notifer =
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{
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{
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.notifier_call = foobar_cpu_callback,
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.notifier_call = foobar_cpu_callback,
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};
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};
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2
Makefile
2
Makefile
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@ -1,7 +1,7 @@
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VERSION = 3
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VERSION = 3
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PATCHLEVEL = 11
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PATCHLEVEL = 11
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SUBLEVEL = 0
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SUBLEVEL = 0
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EXTRAVERSION = -rc1
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EXTRAVERSION = -rc2
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NAME = Linux for Workgroups
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NAME = Linux for Workgroups
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# *DOCUMENTATION*
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# *DOCUMENTATION*
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@ -116,7 +116,7 @@ wait_boot_cpu_to_stop(int cpuid)
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/*
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/*
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* Where secondaries begin a life of C.
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* Where secondaries begin a life of C.
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*/
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*/
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void __cpuinit
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void
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smp_callin(void)
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smp_callin(void)
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{
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{
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int cpuid = hard_smp_processor_id();
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int cpuid = hard_smp_processor_id();
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@ -194,7 +194,7 @@ wait_for_txrdy (unsigned long cpumask)
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* Send a message to a secondary's console. "START" is one such
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* Send a message to a secondary's console. "START" is one such
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* interesting message. ;-)
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* interesting message. ;-)
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*/
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*/
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static void __cpuinit
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static void
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send_secondary_console_msg(char *str, int cpuid)
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send_secondary_console_msg(char *str, int cpuid)
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{
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{
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struct percpu_struct *cpu;
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struct percpu_struct *cpu;
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@ -285,7 +285,7 @@ recv_secondary_console_msg(void)
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/*
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/*
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* Convince the console to have a secondary cpu begin execution.
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* Convince the console to have a secondary cpu begin execution.
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*/
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*/
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static int __cpuinit
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static int
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secondary_cpu_start(int cpuid, struct task_struct *idle)
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secondary_cpu_start(int cpuid, struct task_struct *idle)
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{
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{
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struct percpu_struct *cpu;
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struct percpu_struct *cpu;
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@ -356,7 +356,7 @@ secondary_cpu_start(int cpuid, struct task_struct *idle)
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/*
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/*
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* Bring one cpu online.
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* Bring one cpu online.
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*/
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*/
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static int __cpuinit
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static int
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smp_boot_one_cpu(int cpuid, struct task_struct *idle)
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smp_boot_one_cpu(int cpuid, struct task_struct *idle)
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{
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{
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unsigned long timeout;
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unsigned long timeout;
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@ -472,7 +472,7 @@ smp_prepare_boot_cpu(void)
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{
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{
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}
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}
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int __cpuinit
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int
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__cpu_up(unsigned int cpu, struct task_struct *tidle)
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__cpu_up(unsigned int cpu, struct task_struct *tidle)
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{
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{
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smp_boot_one_cpu(cpu, tidle);
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smp_boot_one_cpu(cpu, tidle);
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@ -32,7 +32,7 @@
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static int opDEC_fix;
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static int opDEC_fix;
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static void __cpuinit
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static void
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opDEC_check(void)
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opDEC_check(void)
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{
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{
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__asm__ __volatile__ (
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__asm__ __volatile__ (
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@ -1059,7 +1059,7 @@ give_sigbus:
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return;
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return;
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}
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}
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void __cpuinit
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void
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trap_init(void)
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trap_init(void)
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{
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{
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/* Tell PAL-code what global pointer we want in the kernel. */
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/* Tell PAL-code what global pointer we want in the kernel. */
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|
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@ -19,7 +19,7 @@
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#include <asm/smp.h>
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#include <asm/smp.h>
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#include <asm/smp_plat.h>
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#include <asm/smp_plat.h>
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|
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static int __cpuinit mcpm_boot_secondary(unsigned int cpu, struct task_struct *idle)
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static int mcpm_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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{
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unsigned int mpidr, pcpu, pcluster, ret;
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unsigned int mpidr, pcpu, pcluster, ret;
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extern void secondary_startup(void);
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extern void secondary_startup(void);
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@ -40,7 +40,7 @@ static int __cpuinit mcpm_boot_secondary(unsigned int cpu, struct task_struct *i
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return 0;
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return 0;
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}
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}
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static void __cpuinit mcpm_secondary_init(unsigned int cpu)
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static void mcpm_secondary_init(unsigned int cpu)
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{
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{
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mcpm_cpu_powered_up();
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mcpm_cpu_powered_up();
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}
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}
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@ -89,7 +89,7 @@ static inline u64 arch_counter_get_cntvct(void)
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return cval;
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return cval;
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}
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}
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static inline void __cpuinit arch_counter_set_user_access(void)
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static inline void arch_counter_set_user_access(void)
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{
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{
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u32 cntkctl;
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u32 cntkctl;
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|
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@ -149,7 +149,6 @@ ENDPROC(lookup_processor_type)
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* r5 = proc_info pointer in physical address space
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* r5 = proc_info pointer in physical address space
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* r9 = cpuid (preserved)
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* r9 = cpuid (preserved)
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*/
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*/
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__CPUINIT
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__lookup_processor_type:
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__lookup_processor_type:
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adr r3, __lookup_processor_type_data
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adr r3, __lookup_processor_type_data
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ldmia r3, {r4 - r6}
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ldmia r3, {r4 - r6}
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@ -87,7 +87,6 @@ ENTRY(stext)
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ENDPROC(stext)
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ENDPROC(stext)
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#ifdef CONFIG_SMP
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#ifdef CONFIG_SMP
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__CPUINIT
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ENTRY(secondary_startup)
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ENTRY(secondary_startup)
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/*
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/*
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* Common entry point for secondary CPUs.
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* Common entry point for secondary CPUs.
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|
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@ -343,7 +343,6 @@ __turn_mmu_on_loc:
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.long __turn_mmu_on_end
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.long __turn_mmu_on_end
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|
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#if defined(CONFIG_SMP)
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#if defined(CONFIG_SMP)
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__CPUINIT
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ENTRY(secondary_startup)
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ENTRY(secondary_startup)
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/*
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/*
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* Common entry point for secondary CPUs.
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* Common entry point for secondary CPUs.
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@ -1020,7 +1020,7 @@ out_mdbgen:
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cpumask_or(&debug_err_mask, &debug_err_mask, cpumask_of(cpu));
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cpumask_or(&debug_err_mask, &debug_err_mask, cpumask_of(cpu));
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}
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}
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static int __cpuinit dbg_reset_notify(struct notifier_block *self,
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static int dbg_reset_notify(struct notifier_block *self,
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unsigned long action, void *cpu)
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unsigned long action, void *cpu)
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{
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{
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if ((action & ~CPU_TASKS_FROZEN) == CPU_ONLINE)
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if ((action & ~CPU_TASKS_FROZEN) == CPU_ONLINE)
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@ -1029,7 +1029,7 @@ static int __cpuinit dbg_reset_notify(struct notifier_block *self,
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return NOTIFY_OK;
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return NOTIFY_OK;
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}
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}
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static struct notifier_block __cpuinitdata dbg_reset_nb = {
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static struct notifier_block dbg_reset_nb = {
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.notifier_call = dbg_reset_notify,
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.notifier_call = dbg_reset_notify,
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};
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};
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@ -157,8 +157,8 @@ static void cpu_pmu_init(struct arm_pmu *cpu_pmu)
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* UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
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* UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
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* junk values out of them.
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* junk values out of them.
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*/
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*/
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static int __cpuinit cpu_pmu_notify(struct notifier_block *b,
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static int cpu_pmu_notify(struct notifier_block *b, unsigned long action,
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unsigned long action, void *hcpu)
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void *hcpu)
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{
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{
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if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
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if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
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return NOTIFY_DONE;
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return NOTIFY_DONE;
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@ -171,7 +171,7 @@ static int __cpuinit cpu_pmu_notify(struct notifier_block *b,
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return NOTIFY_OK;
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return NOTIFY_OK;
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}
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}
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static struct notifier_block __cpuinitdata cpu_pmu_hotplug_notifier = {
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static struct notifier_block cpu_pmu_hotplug_notifier = {
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.notifier_call = cpu_pmu_notify,
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.notifier_call = cpu_pmu_notify,
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};
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};
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|
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@ -46,8 +46,7 @@
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|
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extern void secondary_startup(void);
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extern void secondary_startup(void);
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|
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static int __cpuinit psci_boot_secondary(unsigned int cpu,
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static int psci_boot_secondary(unsigned int cpu, struct task_struct *idle)
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struct task_struct *idle)
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{
|
{
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if (psci_ops.cpu_on)
|
if (psci_ops.cpu_on)
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return psci_ops.cpu_on(cpu_logical_map(cpu),
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return psci_ops.cpu_on(cpu_logical_map(cpu),
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|
|
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@ -58,7 +58,7 @@ struct secondary_data secondary_data;
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* control for which core is the next to come out of the secondary
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* control for which core is the next to come out of the secondary
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* boot "holding pen"
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* boot "holding pen"
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*/
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*/
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volatile int __cpuinitdata pen_release = -1;
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volatile int pen_release = -1;
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|
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enum ipi_msg_type {
|
enum ipi_msg_type {
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IPI_WAKEUP,
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IPI_WAKEUP,
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|
@ -86,7 +86,7 @@ static unsigned long get_arch_pgd(pgd_t *pgd)
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return pgdir >> ARCH_PGD_SHIFT;
|
return pgdir >> ARCH_PGD_SHIFT;
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}
|
}
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|
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int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)
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int __cpu_up(unsigned int cpu, struct task_struct *idle)
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{
|
{
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int ret;
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int ret;
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|
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|
@ -138,7 +138,7 @@ void __init smp_init_cpus(void)
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smp_ops.smp_init_cpus();
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smp_ops.smp_init_cpus();
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}
|
}
|
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|
|
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int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
|
int boot_secondary(unsigned int cpu, struct task_struct *idle)
|
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{
|
{
|
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if (smp_ops.smp_boot_secondary)
|
if (smp_ops.smp_boot_secondary)
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return smp_ops.smp_boot_secondary(cpu, idle);
|
return smp_ops.smp_boot_secondary(cpu, idle);
|
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|
@ -170,7 +170,7 @@ static int platform_cpu_disable(unsigned int cpu)
|
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/*
|
/*
|
||||||
* __cpu_disable runs on the processor to be shutdown.
|
* __cpu_disable runs on the processor to be shutdown.
|
||||||
*/
|
*/
|
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int __cpuinit __cpu_disable(void)
|
int __cpu_disable(void)
|
||||||
{
|
{
|
||||||
unsigned int cpu = smp_processor_id();
|
unsigned int cpu = smp_processor_id();
|
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int ret;
|
int ret;
|
||||||
|
@ -216,7 +216,7 @@ static DECLARE_COMPLETION(cpu_died);
|
||||||
* called on the thread which is asking for a CPU to be shutdown -
|
* called on the thread which is asking for a CPU to be shutdown -
|
||||||
* waits until shutdown has completed, or it is timed out.
|
* waits until shutdown has completed, or it is timed out.
|
||||||
*/
|
*/
|
||||||
void __cpuinit __cpu_die(unsigned int cpu)
|
void __cpu_die(unsigned int cpu)
|
||||||
{
|
{
|
||||||
if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
|
if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
|
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pr_err("CPU%u: cpu didn't die\n", cpu);
|
pr_err("CPU%u: cpu didn't die\n", cpu);
|
||||||
|
@ -306,7 +306,7 @@ void __ref cpu_die(void)
|
||||||
* Called by both boot and secondaries to move global data into
|
* Called by both boot and secondaries to move global data into
|
||||||
* per-processor storage.
|
* per-processor storage.
|
||||||
*/
|
*/
|
||||||
static void __cpuinit smp_store_cpu_info(unsigned int cpuid)
|
static void smp_store_cpu_info(unsigned int cpuid)
|
||||||
{
|
{
|
||||||
struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
|
struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
|
||||||
|
|
||||||
|
@ -322,7 +322,7 @@ static void percpu_timer_setup(void);
|
||||||
* This is the secondary CPU boot entry. We're using this CPUs
|
* This is the secondary CPU boot entry. We're using this CPUs
|
||||||
* idle thread stack, but a set of temporary page tables.
|
* idle thread stack, but a set of temporary page tables.
|
||||||
*/
|
*/
|
||||||
asmlinkage void __cpuinit secondary_start_kernel(void)
|
asmlinkage void secondary_start_kernel(void)
|
||||||
{
|
{
|
||||||
struct mm_struct *mm = &init_mm;
|
struct mm_struct *mm = &init_mm;
|
||||||
unsigned int cpu;
|
unsigned int cpu;
|
||||||
|
@ -521,7 +521,7 @@ static void broadcast_timer_set_mode(enum clock_event_mode mode,
|
||||||
{
|
{
|
||||||
}
|
}
|
||||||
|
|
||||||
static void __cpuinit broadcast_timer_setup(struct clock_event_device *evt)
|
static void broadcast_timer_setup(struct clock_event_device *evt)
|
||||||
{
|
{
|
||||||
evt->name = "dummy_timer";
|
evt->name = "dummy_timer";
|
||||||
evt->features = CLOCK_EVT_FEAT_ONESHOT |
|
evt->features = CLOCK_EVT_FEAT_ONESHOT |
|
||||||
|
@ -550,7 +550,7 @@ int local_timer_register(struct local_timer_ops *ops)
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
static void __cpuinit percpu_timer_setup(void)
|
static void percpu_timer_setup(void)
|
||||||
{
|
{
|
||||||
unsigned int cpu = smp_processor_id();
|
unsigned int cpu = smp_processor_id();
|
||||||
struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu);
|
struct clock_event_device *evt = &per_cpu(percpu_clockevent, cpu);
|
||||||
|
|
|
@ -187,7 +187,7 @@ core_initcall(twd_cpufreq_init);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
static void __cpuinit twd_calibrate_rate(void)
|
static void twd_calibrate_rate(void)
|
||||||
{
|
{
|
||||||
unsigned long count;
|
unsigned long count;
|
||||||
u64 waitjiffies;
|
u64 waitjiffies;
|
||||||
|
@ -265,7 +265,7 @@ static void twd_get_clock(struct device_node *np)
|
||||||
/*
|
/*
|
||||||
* Setup the local clock events for a CPU.
|
* Setup the local clock events for a CPU.
|
||||||
*/
|
*/
|
||||||
static int __cpuinit twd_timer_setup(struct clock_event_device *clk)
|
static int twd_timer_setup(struct clock_event_device *clk)
|
||||||
{
|
{
|
||||||
struct clock_event_device **this_cpu_clk;
|
struct clock_event_device **this_cpu_clk;
|
||||||
int cpu = smp_processor_id();
|
int cpu = smp_processor_id();
|
||||||
|
@ -308,7 +308,7 @@ static int __cpuinit twd_timer_setup(struct clock_event_device *clk)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct local_timer_ops twd_lt_ops __cpuinitdata = {
|
static struct local_timer_ops twd_lt_ops = {
|
||||||
.setup = twd_timer_setup,
|
.setup = twd_timer_setup,
|
||||||
.stop = twd_timer_stop,
|
.stop = twd_timer_stop,
|
||||||
};
|
};
|
||||||
|
|
|
@ -86,7 +86,7 @@ void __init register_current_timer_delay(const struct delay_timer *timer)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
unsigned long __cpuinit calibrate_delay_is_known(void)
|
unsigned long calibrate_delay_is_known(void)
|
||||||
{
|
{
|
||||||
delay_calibrated = true;
|
delay_calibrated = true;
|
||||||
return lpj_fine;
|
return lpj_fine;
|
||||||
|
|
|
@ -47,7 +47,7 @@ static const struct dove_mpp_grp dove_mpp_grp[] = {
|
||||||
|
|
||||||
/* Enable gpio for a range of pins. mode should be a combination of
|
/* Enable gpio for a range of pins. mode should be a combination of
|
||||||
GPIO_OUTPUT_OK | GPIO_INPUT_OK */
|
GPIO_OUTPUT_OK | GPIO_INPUT_OK */
|
||||||
static void dove_mpp_gpio_mode(int start, int end, int gpio_mode)
|
static void __init dove_mpp_gpio_mode(int start, int end, int gpio_mode)
|
||||||
{
|
{
|
||||||
int i;
|
int i;
|
||||||
|
|
||||||
|
|
|
@ -13,8 +13,6 @@
|
||||||
#include <linux/linkage.h>
|
#include <linux/linkage.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* exynos4 specific entry point for secondary CPUs. This provides
|
* exynos4 specific entry point for secondary CPUs. This provides
|
||||||
* a "holding pen" into which all secondary cores are held until we're
|
* a "holding pen" into which all secondary cores are held until we're
|
||||||
|
|
|
@ -75,7 +75,7 @@ static void __iomem *scu_base_addr(void)
|
||||||
|
|
||||||
static DEFINE_SPINLOCK(boot_lock);
|
static DEFINE_SPINLOCK(boot_lock);
|
||||||
|
|
||||||
static void __cpuinit exynos_secondary_init(unsigned int cpu)
|
static void exynos_secondary_init(unsigned int cpu)
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
* let the primary processor know we're out of the
|
* let the primary processor know we're out of the
|
||||||
|
@ -90,7 +90,7 @@ static void __cpuinit exynos_secondary_init(unsigned int cpu)
|
||||||
spin_unlock(&boot_lock);
|
spin_unlock(&boot_lock);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __cpuinit exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||||
{
|
{
|
||||||
unsigned long timeout;
|
unsigned long timeout;
|
||||||
unsigned long phys_cpu = cpu_logical_map(cpu);
|
unsigned long phys_cpu = cpu_logical_map(cpu);
|
||||||
|
|
|
@ -24,7 +24,7 @@
|
||||||
|
|
||||||
extern void secondary_startup(void);
|
extern void secondary_startup(void);
|
||||||
|
|
||||||
static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
static int highbank_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||||
{
|
{
|
||||||
highbank_set_cpu_jump(cpu, secondary_startup);
|
highbank_set_cpu_jump(cpu, secondary_startup);
|
||||||
arch_send_wakeup_ipi_mask(cpumask_of(cpu));
|
arch_send_wakeup_ipi_mask(cpumask_of(cpu));
|
||||||
|
|
|
@ -53,7 +53,7 @@ void imx_scu_standby_enable(void)
|
||||||
writel_relaxed(val, scu_base);
|
writel_relaxed(val, scu_base);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __cpuinit imx_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
static int imx_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||||
{
|
{
|
||||||
imx_set_cpu_jump(cpu, v7_secondary_startup);
|
imx_set_cpu_jump(cpu, v7_secondary_startup);
|
||||||
imx_enable_cpu(cpu, true);
|
imx_enable_cpu(cpu, true);
|
||||||
|
|
|
@ -21,7 +21,7 @@
|
||||||
|
|
||||||
#include "keystone.h"
|
#include "keystone.h"
|
||||||
|
|
||||||
static int __cpuinit keystone_smp_boot_secondary(unsigned int cpu,
|
static int keystone_smp_boot_secondary(unsigned int cpu,
|
||||||
struct task_struct *idle)
|
struct task_struct *idle)
|
||||||
{
|
{
|
||||||
unsigned long start = virt_to_phys(&secondary_startup);
|
unsigned long start = virt_to_phys(&secondary_startup);
|
||||||
|
|
|
@ -11,8 +11,6 @@
|
||||||
#include <linux/linkage.h>
|
#include <linux/linkage.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* MSM specific entry point for secondary CPUs. This provides
|
* MSM specific entry point for secondary CPUs. This provides
|
||||||
* a "holding pen" into which all secondary cores are held until we're
|
* a "holding pen" into which all secondary cores are held until we're
|
||||||
|
|
|
@ -38,7 +38,7 @@ static inline int get_core_count(void)
|
||||||
return ((read_cpuid_id() >> 4) & 3) + 1;
|
return ((read_cpuid_id() >> 4) & 3) + 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void __cpuinit msm_secondary_init(unsigned int cpu)
|
static void msm_secondary_init(unsigned int cpu)
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
* let the primary processor know we're out of the
|
* let the primary processor know we're out of the
|
||||||
|
@ -54,7 +54,7 @@ static void __cpuinit msm_secondary_init(unsigned int cpu)
|
||||||
spin_unlock(&boot_lock);
|
spin_unlock(&boot_lock);
|
||||||
}
|
}
|
||||||
|
|
||||||
static __cpuinit void prepare_cold_cpu(unsigned int cpu)
|
static void prepare_cold_cpu(unsigned int cpu)
|
||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup),
|
ret = scm_set_boot_addr(virt_to_phys(msm_secondary_startup),
|
||||||
|
@ -73,7 +73,7 @@ static __cpuinit void prepare_cold_cpu(unsigned int cpu)
|
||||||
"address\n");
|
"address\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __cpuinit msm_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
static int msm_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||||
{
|
{
|
||||||
unsigned long timeout;
|
unsigned long timeout;
|
||||||
static int cold_boot_done;
|
static int cold_boot_done;
|
||||||
|
|
|
@ -139,7 +139,7 @@ static struct clocksource msm_clocksource = {
|
||||||
};
|
};
|
||||||
|
|
||||||
#ifdef CONFIG_LOCAL_TIMERS
|
#ifdef CONFIG_LOCAL_TIMERS
|
||||||
static int __cpuinit msm_local_timer_setup(struct clock_event_device *evt)
|
static int msm_local_timer_setup(struct clock_event_device *evt)
|
||||||
{
|
{
|
||||||
/* Use existing clock_event for cpu 0 */
|
/* Use existing clock_event for cpu 0 */
|
||||||
if (!smp_processor_id())
|
if (!smp_processor_id())
|
||||||
|
@ -164,7 +164,7 @@ static void msm_local_timer_stop(struct clock_event_device *evt)
|
||||||
disable_percpu_irq(evt->irq);
|
disable_percpu_irq(evt->irq);
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct local_timer_ops msm_local_timer_ops __cpuinitdata = {
|
static struct local_timer_ops msm_local_timer_ops = {
|
||||||
.setup = msm_local_timer_setup,
|
.setup = msm_local_timer_setup,
|
||||||
.stop = msm_local_timer_stop,
|
.stop = msm_local_timer_stop,
|
||||||
};
|
};
|
||||||
|
|
|
@ -28,7 +28,7 @@
|
||||||
#include <asm/cacheflush.h>
|
#include <asm/cacheflush.h>
|
||||||
#include "armada-370-xp.h"
|
#include "armada-370-xp.h"
|
||||||
|
|
||||||
unsigned long __cpuinitdata coherency_phys_base;
|
unsigned long coherency_phys_base;
|
||||||
static void __iomem *coherency_base;
|
static void __iomem *coherency_base;
|
||||||
static void __iomem *coherency_cpu_base;
|
static void __iomem *coherency_cpu_base;
|
||||||
|
|
||||||
|
|
|
@ -21,8 +21,6 @@
|
||||||
#include <linux/linkage.h>
|
#include <linux/linkage.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Armada XP specific entry point for secondary CPUs.
|
* Armada XP specific entry point for secondary CPUs.
|
||||||
* We add the CPU to the coherency fabric and then jump to secondary
|
* We add the CPU to the coherency fabric and then jump to secondary
|
||||||
|
|
|
@ -71,13 +71,12 @@ void __init set_secondary_cpus_clock(void)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static void __cpuinit armada_xp_secondary_init(unsigned int cpu)
|
static void armada_xp_secondary_init(unsigned int cpu)
|
||||||
{
|
{
|
||||||
armada_xp_mpic_smp_cpu_init();
|
armada_xp_mpic_smp_cpu_init();
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __cpuinit armada_xp_boot_secondary(unsigned int cpu,
|
static int armada_xp_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||||
struct task_struct *idle)
|
|
||||||
{
|
{
|
||||||
pr_info("Booting CPU %d\n", cpu);
|
pr_info("Booting CPU %d\n", cpu);
|
||||||
|
|
||||||
|
|
|
@ -20,8 +20,6 @@
|
||||||
|
|
||||||
#include "omap44xx.h"
|
#include "omap44xx.h"
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
/* Physical address needed since MMU not enabled yet on secondary core */
|
/* Physical address needed since MMU not enabled yet on secondary core */
|
||||||
#define AUX_CORE_BOOT0_PA 0x48281800
|
#define AUX_CORE_BOOT0_PA 0x48281800
|
||||||
|
|
||||||
|
|
|
@ -291,7 +291,7 @@ int omap4_enter_lowpower(unsigned int cpu, unsigned int power_state)
|
||||||
* @cpu : CPU ID
|
* @cpu : CPU ID
|
||||||
* @power_state: CPU low power state.
|
* @power_state: CPU low power state.
|
||||||
*/
|
*/
|
||||||
int __cpuinit omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
|
int omap4_hotplug_cpu(unsigned int cpu, unsigned int power_state)
|
||||||
{
|
{
|
||||||
struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu);
|
struct omap4_cpu_pm_info *pm_info = &per_cpu(omap4_pm_info, cpu);
|
||||||
unsigned int cpu_state = 0;
|
unsigned int cpu_state = 0;
|
||||||
|
|
|
@ -51,7 +51,7 @@ void __iomem *omap4_get_scu_base(void)
|
||||||
return scu_base;
|
return scu_base;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void __cpuinit omap4_secondary_init(unsigned int cpu)
|
static void omap4_secondary_init(unsigned int cpu)
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
* Configure ACTRL and enable NS SMP bit access on CPU1 on HS device.
|
* Configure ACTRL and enable NS SMP bit access on CPU1 on HS device.
|
||||||
|
@ -72,7 +72,7 @@ static void __cpuinit omap4_secondary_init(unsigned int cpu)
|
||||||
spin_unlock(&boot_lock);
|
spin_unlock(&boot_lock);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __cpuinit omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
static int omap4_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||||
{
|
{
|
||||||
static struct clockdomain *cpu1_clkdm;
|
static struct clockdomain *cpu1_clkdm;
|
||||||
static bool booted;
|
static bool booted;
|
||||||
|
|
|
@ -323,7 +323,7 @@ static void irq_save_secure_context(void)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef CONFIG_HOTPLUG_CPU
|
#ifdef CONFIG_HOTPLUG_CPU
|
||||||
static int __cpuinit irq_cpu_hotplug_notify(struct notifier_block *self,
|
static int irq_cpu_hotplug_notify(struct notifier_block *self,
|
||||||
unsigned long action, void *hcpu)
|
unsigned long action, void *hcpu)
|
||||||
{
|
{
|
||||||
unsigned int cpu = (unsigned int)hcpu;
|
unsigned int cpu = (unsigned int)hcpu;
|
||||||
|
|
|
@ -9,8 +9,6 @@
|
||||||
#include <linux/linkage.h>
|
#include <linux/linkage.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* SIRFSOC specific entry point for secondary CPUs. This provides
|
* SIRFSOC specific entry point for secondary CPUs. This provides
|
||||||
* a "holding pen" into which all secondary cores are held until we're
|
* a "holding pen" into which all secondary cores are held until we're
|
||||||
|
|
|
@ -44,7 +44,7 @@ void __init sirfsoc_map_scu(void)
|
||||||
scu_base = (void __iomem *)SIRFSOC_VA(base);
|
scu_base = (void __iomem *)SIRFSOC_VA(base);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void __cpuinit sirfsoc_secondary_init(unsigned int cpu)
|
static void sirfsoc_secondary_init(unsigned int cpu)
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
* let the primary processor know we're out of the
|
* let the primary processor know we're out of the
|
||||||
|
@ -65,7 +65,7 @@ static struct of_device_id rsc_ids[] = {
|
||||||
{},
|
{},
|
||||||
};
|
};
|
||||||
|
|
||||||
static int __cpuinit sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
static int sirfsoc_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||||
{
|
{
|
||||||
unsigned long timeout;
|
unsigned long timeout;
|
||||||
struct device_node *np;
|
struct device_node *np;
|
||||||
|
|
|
@ -208,7 +208,7 @@ config S3C24XX_GPIO_EXTRA128
|
||||||
|
|
||||||
config S3C24XX_PLL
|
config S3C24XX_PLL
|
||||||
bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
|
bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
|
||||||
depends on ARM_S3C24XX
|
depends on ARM_S3C24XX_CPUFREQ
|
||||||
help
|
help
|
||||||
Compile in support for changing the PLL frequency from the
|
Compile in support for changing the PLL frequency from the
|
||||||
S3C24XX series CPUfreq driver. The PLL takes time to settle
|
S3C24XX series CPUfreq driver. The PLL takes time to settle
|
||||||
|
|
|
@ -23,7 +23,6 @@
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <asm/memory.h>
|
#include <asm/memory.h>
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
/*
|
/*
|
||||||
* Boot code for secondary CPUs.
|
* Boot code for secondary CPUs.
|
||||||
*
|
*
|
||||||
|
|
|
@ -14,8 +14,6 @@
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
#include <asm/memory.h>
|
#include <asm/memory.h>
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
ENTRY(shmobile_invalidate_start)
|
ENTRY(shmobile_invalidate_start)
|
||||||
bl v7_invalidate_l1
|
bl v7_invalidate_l1
|
||||||
b secondary_startup
|
b secondary_startup
|
||||||
|
|
|
@ -30,7 +30,7 @@
|
||||||
|
|
||||||
#define EMEV2_SCU_BASE 0x1e000000
|
#define EMEV2_SCU_BASE 0x1e000000
|
||||||
|
|
||||||
static int __cpuinit emev2_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
static int emev2_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||||
{
|
{
|
||||||
arch_send_wakeup_ipi_mask(cpumask_of(cpu_logical_map(cpu)));
|
arch_send_wakeup_ipi_mask(cpumask_of(cpu_logical_map(cpu)));
|
||||||
return 0;
|
return 0;
|
||||||
|
|
|
@ -81,7 +81,7 @@ static int r8a7779_platform_cpu_kill(unsigned int cpu)
|
||||||
return ret ? ret : 1;
|
return ret ? ret : 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __cpuinit r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||||
{
|
{
|
||||||
struct r8a7779_pm_ch *ch = NULL;
|
struct r8a7779_pm_ch *ch = NULL;
|
||||||
int ret = -EIO;
|
int ret = -EIO;
|
||||||
|
|
|
@ -48,7 +48,7 @@ void __init sh73a0_register_twd(void)
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
static int __cpuinit sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
static int sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||||
{
|
{
|
||||||
cpu = cpu_logical_map(cpu);
|
cpu = cpu_logical_map(cpu);
|
||||||
|
|
||||||
|
|
|
@ -10,7 +10,6 @@
|
||||||
#include <linux/linkage.h>
|
#include <linux/linkage.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
.arch armv7-a
|
.arch armv7-a
|
||||||
|
|
||||||
ENTRY(secondary_trampoline)
|
ENTRY(secondary_trampoline)
|
||||||
|
|
|
@ -29,7 +29,7 @@
|
||||||
|
|
||||||
#include "core.h"
|
#include "core.h"
|
||||||
|
|
||||||
static int __cpuinit socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||||
{
|
{
|
||||||
int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
|
int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
|
||||||
|
|
||||||
|
|
|
@ -37,7 +37,7 @@ void __init spear13xx_l2x0_init(void);
|
||||||
void spear_restart(enum reboot_mode, const char *);
|
void spear_restart(enum reboot_mode, const char *);
|
||||||
|
|
||||||
void spear13xx_secondary_startup(void);
|
void spear13xx_secondary_startup(void);
|
||||||
void __cpuinit spear13xx_cpu_die(unsigned int cpu);
|
void spear13xx_cpu_die(unsigned int cpu);
|
||||||
|
|
||||||
extern struct smp_operations spear13xx_smp_ops;
|
extern struct smp_operations spear13xx_smp_ops;
|
||||||
|
|
||||||
|
|
|
@ -24,7 +24,7 @@ static DEFINE_SPINLOCK(boot_lock);
|
||||||
|
|
||||||
static void __iomem *scu_base = IOMEM(VA_SCU_BASE);
|
static void __iomem *scu_base = IOMEM(VA_SCU_BASE);
|
||||||
|
|
||||||
static void __cpuinit spear13xx_secondary_init(unsigned int cpu)
|
static void spear13xx_secondary_init(unsigned int cpu)
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
* let the primary processor know we're out of the
|
* let the primary processor know we're out of the
|
||||||
|
@ -40,7 +40,7 @@ static void __cpuinit spear13xx_secondary_init(unsigned int cpu)
|
||||||
spin_unlock(&boot_lock);
|
spin_unlock(&boot_lock);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __cpuinit spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
static int spear13xx_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||||
{
|
{
|
||||||
unsigned long timeout;
|
unsigned long timeout;
|
||||||
|
|
||||||
|
|
|
@ -27,7 +27,7 @@
|
||||||
|
|
||||||
#include "smp.h"
|
#include "smp.h"
|
||||||
|
|
||||||
static void __cpuinit write_pen_release(int val)
|
static void write_pen_release(int val)
|
||||||
{
|
{
|
||||||
pen_release = val;
|
pen_release = val;
|
||||||
smp_wmb();
|
smp_wmb();
|
||||||
|
@ -37,7 +37,7 @@ static void __cpuinit write_pen_release(int val)
|
||||||
|
|
||||||
static DEFINE_SPINLOCK(boot_lock);
|
static DEFINE_SPINLOCK(boot_lock);
|
||||||
|
|
||||||
void __cpuinit sti_secondary_init(unsigned int cpu)
|
void sti_secondary_init(unsigned int cpu)
|
||||||
{
|
{
|
||||||
trace_hardirqs_off();
|
trace_hardirqs_off();
|
||||||
|
|
||||||
|
@ -54,7 +54,7 @@ void __cpuinit sti_secondary_init(unsigned int cpu)
|
||||||
spin_unlock(&boot_lock);
|
spin_unlock(&boot_lock);
|
||||||
}
|
}
|
||||||
|
|
||||||
int __cpuinit sti_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
int sti_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||||
{
|
{
|
||||||
unsigned long timeout;
|
unsigned long timeout;
|
||||||
|
|
||||||
|
|
|
@ -35,7 +35,7 @@
|
||||||
|
|
||||||
static cpumask_t tegra_cpu_init_mask;
|
static cpumask_t tegra_cpu_init_mask;
|
||||||
|
|
||||||
static void __cpuinit tegra_secondary_init(unsigned int cpu)
|
static void tegra_secondary_init(unsigned int cpu)
|
||||||
{
|
{
|
||||||
cpumask_set_cpu(cpu, &tegra_cpu_init_mask);
|
cpumask_set_cpu(cpu, &tegra_cpu_init_mask);
|
||||||
}
|
}
|
||||||
|
@ -167,7 +167,7 @@ static int tegra114_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __cpuinit tegra_boot_secondary(unsigned int cpu,
|
static int tegra_boot_secondary(unsigned int cpu,
|
||||||
struct task_struct *idle)
|
struct task_struct *idle)
|
||||||
{
|
{
|
||||||
if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && tegra_chip_id == TEGRA20)
|
if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC) && tegra_chip_id == TEGRA20)
|
||||||
|
|
|
@ -191,7 +191,7 @@ static const char *lp_state[TEGRA_MAX_SUSPEND_MODE] = {
|
||||||
[TEGRA_SUSPEND_LP0] = "LP0",
|
[TEGRA_SUSPEND_LP0] = "LP0",
|
||||||
};
|
};
|
||||||
|
|
||||||
static int __cpuinit tegra_suspend_enter(suspend_state_t state)
|
static int tegra_suspend_enter(suspend_state_t state)
|
||||||
{
|
{
|
||||||
enum tegra_suspend_mode mode = tegra_pmc_get_suspend_mode();
|
enum tegra_suspend_mode mode = tegra_pmc_get_suspend_mode();
|
||||||
|
|
||||||
|
|
|
@ -54,7 +54,7 @@ static void __iomem *scu_base_addr(void)
|
||||||
|
|
||||||
static DEFINE_SPINLOCK(boot_lock);
|
static DEFINE_SPINLOCK(boot_lock);
|
||||||
|
|
||||||
static void __cpuinit ux500_secondary_init(unsigned int cpu)
|
static void ux500_secondary_init(unsigned int cpu)
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
* let the primary processor know we're out of the
|
* let the primary processor know we're out of the
|
||||||
|
@ -69,7 +69,7 @@ static void __cpuinit ux500_secondary_init(unsigned int cpu)
|
||||||
spin_unlock(&boot_lock);
|
spin_unlock(&boot_lock);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __cpuinit ux500_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
static int ux500_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||||
{
|
{
|
||||||
unsigned long timeout;
|
unsigned long timeout;
|
||||||
|
|
||||||
|
|
|
@ -27,7 +27,7 @@ extern void secondary_startup(void);
|
||||||
extern char zynq_secondary_trampoline;
|
extern char zynq_secondary_trampoline;
|
||||||
extern char zynq_secondary_trampoline_jump;
|
extern char zynq_secondary_trampoline_jump;
|
||||||
extern char zynq_secondary_trampoline_end;
|
extern char zynq_secondary_trampoline_end;
|
||||||
extern int __cpuinit zynq_cpun_start(u32 address, int cpu);
|
extern int zynq_cpun_start(u32 address, int cpu);
|
||||||
extern struct smp_operations zynq_smp_ops __initdata;
|
extern struct smp_operations zynq_smp_ops __initdata;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
|
@ -9,8 +9,6 @@
|
||||||
#include <linux/linkage.h>
|
#include <linux/linkage.h>
|
||||||
#include <linux/init.h>
|
#include <linux/init.h>
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
ENTRY(zynq_secondary_trampoline)
|
ENTRY(zynq_secondary_trampoline)
|
||||||
ldr r0, [pc]
|
ldr r0, [pc]
|
||||||
bx r0
|
bx r0
|
||||||
|
|
|
@ -30,11 +30,11 @@
|
||||||
/*
|
/*
|
||||||
* Store number of cores in the system
|
* Store number of cores in the system
|
||||||
* Because of scu_get_core_count() must be in __init section and can't
|
* Because of scu_get_core_count() must be in __init section and can't
|
||||||
* be called from zynq_cpun_start() because it is in __cpuinit section.
|
* be called from zynq_cpun_start() because it is not in __init section.
|
||||||
*/
|
*/
|
||||||
static int ncores;
|
static int ncores;
|
||||||
|
|
||||||
int __cpuinit zynq_cpun_start(u32 address, int cpu)
|
int zynq_cpun_start(u32 address, int cpu)
|
||||||
{
|
{
|
||||||
u32 trampoline_code_size = &zynq_secondary_trampoline_end -
|
u32 trampoline_code_size = &zynq_secondary_trampoline_end -
|
||||||
&zynq_secondary_trampoline;
|
&zynq_secondary_trampoline;
|
||||||
|
@ -92,7 +92,7 @@ int __cpuinit zynq_cpun_start(u32 address, int cpu)
|
||||||
}
|
}
|
||||||
EXPORT_SYMBOL(zynq_cpun_start);
|
EXPORT_SYMBOL(zynq_cpun_start);
|
||||||
|
|
||||||
static int __cpuinit zynq_boot_secondary(unsigned int cpu,
|
static int zynq_boot_secondary(unsigned int cpu,
|
||||||
struct task_struct *idle)
|
struct task_struct *idle)
|
||||||
{
|
{
|
||||||
return zynq_cpun_start(virt_to_phys(secondary_startup), cpu);
|
return zynq_cpun_start(virt_to_phys(secondary_startup), cpu);
|
||||||
|
|
|
@ -443,8 +443,6 @@ ENTRY(cpu_arm1020_set_pte_ext)
|
||||||
#endif /* CONFIG_MMU */
|
#endif /* CONFIG_MMU */
|
||||||
mov pc, lr
|
mov pc, lr
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
.type __arm1020_setup, #function
|
.type __arm1020_setup, #function
|
||||||
__arm1020_setup:
|
__arm1020_setup:
|
||||||
mov r0, #0
|
mov r0, #0
|
||||||
|
|
|
@ -425,8 +425,6 @@ ENTRY(cpu_arm1020e_set_pte_ext)
|
||||||
#endif /* CONFIG_MMU */
|
#endif /* CONFIG_MMU */
|
||||||
mov pc, lr
|
mov pc, lr
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
.type __arm1020e_setup, #function
|
.type __arm1020e_setup, #function
|
||||||
__arm1020e_setup:
|
__arm1020e_setup:
|
||||||
mov r0, #0
|
mov r0, #0
|
||||||
|
|
|
@ -407,8 +407,6 @@ ENTRY(cpu_arm1022_set_pte_ext)
|
||||||
#endif /* CONFIG_MMU */
|
#endif /* CONFIG_MMU */
|
||||||
mov pc, lr
|
mov pc, lr
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
.type __arm1022_setup, #function
|
.type __arm1022_setup, #function
|
||||||
__arm1022_setup:
|
__arm1022_setup:
|
||||||
mov r0, #0
|
mov r0, #0
|
||||||
|
|
|
@ -396,9 +396,6 @@ ENTRY(cpu_arm1026_set_pte_ext)
|
||||||
#endif /* CONFIG_MMU */
|
#endif /* CONFIG_MMU */
|
||||||
mov pc, lr
|
mov pc, lr
|
||||||
|
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
.type __arm1026_setup, #function
|
.type __arm1026_setup, #function
|
||||||
__arm1026_setup:
|
__arm1026_setup:
|
||||||
mov r0, #0
|
mov r0, #0
|
||||||
|
|
|
@ -116,8 +116,6 @@ ENTRY(cpu_arm720_reset)
|
||||||
ENDPROC(cpu_arm720_reset)
|
ENDPROC(cpu_arm720_reset)
|
||||||
.popsection
|
.popsection
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
.type __arm710_setup, #function
|
.type __arm710_setup, #function
|
||||||
__arm710_setup:
|
__arm710_setup:
|
||||||
mov r0, #0
|
mov r0, #0
|
||||||
|
|
|
@ -60,8 +60,6 @@ ENTRY(cpu_arm740_reset)
|
||||||
ENDPROC(cpu_arm740_reset)
|
ENDPROC(cpu_arm740_reset)
|
||||||
.popsection
|
.popsection
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
.type __arm740_setup, #function
|
.type __arm740_setup, #function
|
||||||
__arm740_setup:
|
__arm740_setup:
|
||||||
mov r0, #0
|
mov r0, #0
|
||||||
|
|
|
@ -51,8 +51,6 @@ ENTRY(cpu_arm7tdmi_reset)
|
||||||
ENDPROC(cpu_arm7tdmi_reset)
|
ENDPROC(cpu_arm7tdmi_reset)
|
||||||
.popsection
|
.popsection
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
.type __arm7tdmi_setup, #function
|
.type __arm7tdmi_setup, #function
|
||||||
__arm7tdmi_setup:
|
__arm7tdmi_setup:
|
||||||
mov pc, lr
|
mov pc, lr
|
||||||
|
|
|
@ -410,8 +410,6 @@ ENTRY(cpu_arm920_do_resume)
|
||||||
ENDPROC(cpu_arm920_do_resume)
|
ENDPROC(cpu_arm920_do_resume)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
.type __arm920_setup, #function
|
.type __arm920_setup, #function
|
||||||
__arm920_setup:
|
__arm920_setup:
|
||||||
mov r0, #0
|
mov r0, #0
|
||||||
|
|
|
@ -388,8 +388,6 @@ ENTRY(cpu_arm922_set_pte_ext)
|
||||||
#endif /* CONFIG_MMU */
|
#endif /* CONFIG_MMU */
|
||||||
mov pc, lr
|
mov pc, lr
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
.type __arm922_setup, #function
|
.type __arm922_setup, #function
|
||||||
__arm922_setup:
|
__arm922_setup:
|
||||||
mov r0, #0
|
mov r0, #0
|
||||||
|
|
|
@ -438,8 +438,6 @@ ENTRY(cpu_arm925_set_pte_ext)
|
||||||
#endif /* CONFIG_MMU */
|
#endif /* CONFIG_MMU */
|
||||||
mov pc, lr
|
mov pc, lr
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
.type __arm925_setup, #function
|
.type __arm925_setup, #function
|
||||||
__arm925_setup:
|
__arm925_setup:
|
||||||
mov r0, #0
|
mov r0, #0
|
||||||
|
|
|
@ -425,8 +425,6 @@ ENTRY(cpu_arm926_do_resume)
|
||||||
ENDPROC(cpu_arm926_do_resume)
|
ENDPROC(cpu_arm926_do_resume)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
.type __arm926_setup, #function
|
.type __arm926_setup, #function
|
||||||
__arm926_setup:
|
__arm926_setup:
|
||||||
mov r0, #0
|
mov r0, #0
|
||||||
|
|
|
@ -273,8 +273,6 @@ ENDPROC(arm940_dma_unmap_area)
|
||||||
@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
|
@ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S)
|
||||||
define_cache_functions arm940
|
define_cache_functions arm940
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
.type __arm940_setup, #function
|
.type __arm940_setup, #function
|
||||||
__arm940_setup:
|
__arm940_setup:
|
||||||
mov r0, #0
|
mov r0, #0
|
||||||
|
|
|
@ -326,8 +326,6 @@ ENTRY(cpu_arm946_dcache_clean_area)
|
||||||
mcr p15, 0, r0, c7, c10, 4 @ drain WB
|
mcr p15, 0, r0, c7, c10, 4 @ drain WB
|
||||||
mov pc, lr
|
mov pc, lr
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
.type __arm946_setup, #function
|
.type __arm946_setup, #function
|
||||||
__arm946_setup:
|
__arm946_setup:
|
||||||
mov r0, #0
|
mov r0, #0
|
||||||
|
|
|
@ -51,8 +51,6 @@ ENTRY(cpu_arm9tdmi_reset)
|
||||||
ENDPROC(cpu_arm9tdmi_reset)
|
ENDPROC(cpu_arm9tdmi_reset)
|
||||||
.popsection
|
.popsection
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
.type __arm9tdmi_setup, #function
|
.type __arm9tdmi_setup, #function
|
||||||
__arm9tdmi_setup:
|
__arm9tdmi_setup:
|
||||||
mov pc, lr
|
mov pc, lr
|
||||||
|
|
|
@ -135,8 +135,6 @@ ENTRY(cpu_fa526_set_pte_ext)
|
||||||
#endif
|
#endif
|
||||||
mov pc, lr
|
mov pc, lr
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
.type __fa526_setup, #function
|
.type __fa526_setup, #function
|
||||||
__fa526_setup:
|
__fa526_setup:
|
||||||
/* On return of this routine, r0 must carry correct flags for CFG register */
|
/* On return of this routine, r0 must carry correct flags for CFG register */
|
||||||
|
|
|
@ -514,8 +514,6 @@ ENTRY(cpu_feroceon_set_pte_ext)
|
||||||
#endif
|
#endif
|
||||||
mov pc, lr
|
mov pc, lr
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
.type __feroceon_setup, #function
|
.type __feroceon_setup, #function
|
||||||
__feroceon_setup:
|
__feroceon_setup:
|
||||||
mov r0, #0
|
mov r0, #0
|
||||||
|
|
|
@ -383,8 +383,6 @@ ENTRY(cpu_mohawk_do_resume)
|
||||||
ENDPROC(cpu_mohawk_do_resume)
|
ENDPROC(cpu_mohawk_do_resume)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
.type __mohawk_setup, #function
|
.type __mohawk_setup, #function
|
||||||
__mohawk_setup:
|
__mohawk_setup:
|
||||||
mov r0, #0
|
mov r0, #0
|
||||||
|
|
|
@ -159,8 +159,6 @@ ENTRY(cpu_sa110_set_pte_ext)
|
||||||
#endif
|
#endif
|
||||||
mov pc, lr
|
mov pc, lr
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
.type __sa110_setup, #function
|
.type __sa110_setup, #function
|
||||||
__sa110_setup:
|
__sa110_setup:
|
||||||
mov r10, #0
|
mov r10, #0
|
||||||
|
|
|
@ -198,8 +198,6 @@ ENTRY(cpu_sa1100_do_resume)
|
||||||
ENDPROC(cpu_sa1100_do_resume)
|
ENDPROC(cpu_sa1100_do_resume)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
.type __sa1100_setup, #function
|
.type __sa1100_setup, #function
|
||||||
__sa1100_setup:
|
__sa1100_setup:
|
||||||
mov r0, #0
|
mov r0, #0
|
||||||
|
|
|
@ -180,8 +180,6 @@ ENDPROC(cpu_v6_do_resume)
|
||||||
|
|
||||||
.align
|
.align
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* __v6_setup
|
* __v6_setup
|
||||||
*
|
*
|
||||||
|
|
|
@ -160,8 +160,6 @@ ENDPROC(cpu_v7_set_pte_ext)
|
||||||
mcr p15, 0, \ttbr1, c2, c0, 1 @ load TTB1
|
mcr p15, 0, \ttbr1, c2, c0, 1 @ load TTB1
|
||||||
.endm
|
.endm
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
/* AT
|
/* AT
|
||||||
* TFR EV X F I D LR S
|
* TFR EV X F I D LR S
|
||||||
* .EEE ..EE PUI. .T.T 4RVI ZWRS BLDP WCAM
|
* .EEE ..EE PUI. .T.T 4RVI ZWRS BLDP WCAM
|
||||||
|
@ -172,5 +170,3 @@ ENDPROC(cpu_v7_set_pte_ext)
|
||||||
.type v7_crval, #object
|
.type v7_crval, #object
|
||||||
v7_crval:
|
v7_crval:
|
||||||
crval clear=0x2120c302, mmuset=0x10c03c7d, ucset=0x00c01c7c
|
crval clear=0x2120c302, mmuset=0x10c03c7d, ucset=0x00c01c7c
|
||||||
|
|
||||||
.previous
|
|
||||||
|
|
|
@ -140,8 +140,6 @@ ENDPROC(cpu_v7_set_pte_ext)
|
||||||
mcrr p15, 0, \ttbr0, \zero, c2 @ load TTBR0
|
mcrr p15, 0, \ttbr0, \zero, c2 @ load TTBR0
|
||||||
.endm
|
.endm
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* AT
|
* AT
|
||||||
* TFR EV X F IHD LR S
|
* TFR EV X F IHD LR S
|
||||||
|
@ -153,5 +151,3 @@ ENDPROC(cpu_v7_set_pte_ext)
|
||||||
.type v7_crval, #object
|
.type v7_crval, #object
|
||||||
v7_crval:
|
v7_crval:
|
||||||
crval clear=0x0120c302, mmuset=0x30c23c7d, ucset=0x00c01c7c
|
crval clear=0x0120c302, mmuset=0x30c23c7d, ucset=0x00c01c7c
|
||||||
|
|
||||||
.previous
|
|
||||||
|
|
|
@ -167,8 +167,6 @@ ENDPROC(cpu_pj4b_do_idle)
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* __v7_setup
|
* __v7_setup
|
||||||
*
|
*
|
||||||
|
|
|
@ -446,8 +446,6 @@ ENTRY(cpu_xsc3_do_resume)
|
||||||
ENDPROC(cpu_xsc3_do_resume)
|
ENDPROC(cpu_xsc3_do_resume)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
.type __xsc3_setup, #function
|
.type __xsc3_setup, #function
|
||||||
__xsc3_setup:
|
__xsc3_setup:
|
||||||
mov r0, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
|
mov r0, #PSR_F_BIT|PSR_I_BIT|SVC_MODE
|
||||||
|
|
|
@ -558,8 +558,6 @@ ENTRY(cpu_xscale_do_resume)
|
||||||
ENDPROC(cpu_xscale_do_resume)
|
ENDPROC(cpu_xscale_do_resume)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
__CPUINIT
|
|
||||||
|
|
||||||
.type __xscale_setup, #function
|
.type __xscale_setup, #function
|
||||||
__xscale_setup:
|
__xscale_setup:
|
||||||
mcr p15, 0, ip, c7, c7, 0 @ invalidate I, D caches & BTB
|
mcr p15, 0, ip, c7, c7, 0 @ invalidate I, D caches & BTB
|
||||||
|
|
|
@ -23,7 +23,7 @@
|
||||||
* observers, irrespective of whether they're taking part in coherency
|
* observers, irrespective of whether they're taking part in coherency
|
||||||
* or not. This is necessary for the hotplug code to work reliably.
|
* or not. This is necessary for the hotplug code to work reliably.
|
||||||
*/
|
*/
|
||||||
static void __cpuinit write_pen_release(int val)
|
static void write_pen_release(int val)
|
||||||
{
|
{
|
||||||
pen_release = val;
|
pen_release = val;
|
||||||
smp_wmb();
|
smp_wmb();
|
||||||
|
@ -33,7 +33,7 @@ static void __cpuinit write_pen_release(int val)
|
||||||
|
|
||||||
static DEFINE_SPINLOCK(boot_lock);
|
static DEFINE_SPINLOCK(boot_lock);
|
||||||
|
|
||||||
void __cpuinit versatile_secondary_init(unsigned int cpu)
|
void versatile_secondary_init(unsigned int cpu)
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
* let the primary processor know we're out of the
|
* let the primary processor know we're out of the
|
||||||
|
@ -48,7 +48,7 @@ void __cpuinit versatile_secondary_init(unsigned int cpu)
|
||||||
spin_unlock(&boot_lock);
|
spin_unlock(&boot_lock);
|
||||||
}
|
}
|
||||||
|
|
||||||
int __cpuinit versatile_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
int versatile_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||||
{
|
{
|
||||||
unsigned long timeout;
|
unsigned long timeout;
|
||||||
|
|
||||||
|
|
|
@ -97,7 +97,7 @@ static inline u32 arch_timer_get_cntfrq(void)
|
||||||
return val;
|
return val;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void __cpuinit arch_counter_set_user_access(void)
|
static inline void arch_counter_set_user_access(void)
|
||||||
{
|
{
|
||||||
u32 cntkctl;
|
u32 cntkctl;
|
||||||
|
|
||||||
|
|
|
@ -83,14 +83,7 @@ static inline int reinstall_suspended_bps(struct pt_regs *regs)
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef CONFIG_COMPAT
|
|
||||||
int aarch32_break_handler(struct pt_regs *regs);
|
int aarch32_break_handler(struct pt_regs *regs);
|
||||||
#else
|
|
||||||
static int aarch32_break_handler(struct pt_regs *regs)
|
|
||||||
{
|
|
||||||
return -EFAULT;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#endif /* __ASSEMBLY */
|
#endif /* __ASSEMBLY */
|
||||||
#endif /* __KERNEL__ */
|
#endif /* __KERNEL__ */
|
||||||
|
|
|
@ -23,6 +23,7 @@
|
||||||
#include <linux/compiler.h>
|
#include <linux/compiler.h>
|
||||||
#include <linux/linkage.h>
|
#include <linux/linkage.h>
|
||||||
#include <linux/irqflags.h>
|
#include <linux/irqflags.h>
|
||||||
|
#include <linux/reboot.h>
|
||||||
|
|
||||||
struct pt_regs;
|
struct pt_regs;
|
||||||
|
|
||||||
|
@ -41,7 +42,7 @@ extern void show_pte(struct mm_struct *mm, unsigned long addr);
|
||||||
extern void __show_regs(struct pt_regs *);
|
extern void __show_regs(struct pt_regs *);
|
||||||
|
|
||||||
void soft_restart(unsigned long);
|
void soft_restart(unsigned long);
|
||||||
extern void (*arm_pm_restart)(char str, const char *cmd);
|
extern void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
|
||||||
|
|
||||||
#define UDBG_UNDEFINED (1 << 0)
|
#define UDBG_UNDEFINED (1 << 0)
|
||||||
#define UDBG_SYSCALL (1 << 1)
|
#define UDBG_SYSCALL (1 << 1)
|
||||||
|
|
|
@ -141,7 +141,7 @@ static void clear_os_lock(void *unused)
|
||||||
isb();
|
isb();
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __cpuinit os_lock_notify(struct notifier_block *self,
|
static int os_lock_notify(struct notifier_block *self,
|
||||||
unsigned long action, void *data)
|
unsigned long action, void *data)
|
||||||
{
|
{
|
||||||
int cpu = (unsigned long)data;
|
int cpu = (unsigned long)data;
|
||||||
|
@ -150,11 +150,11 @@ static int __cpuinit os_lock_notify(struct notifier_block *self,
|
||||||
return NOTIFY_OK;
|
return NOTIFY_OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct notifier_block __cpuinitdata os_lock_nb = {
|
static struct notifier_block os_lock_nb = {
|
||||||
.notifier_call = os_lock_notify,
|
.notifier_call = os_lock_notify,
|
||||||
};
|
};
|
||||||
|
|
||||||
static int __cpuinit debug_monitors_init(void)
|
static int debug_monitors_init(void)
|
||||||
{
|
{
|
||||||
/* Clear the OS lock. */
|
/* Clear the OS lock. */
|
||||||
smp_call_function(clear_os_lock, NULL, 1);
|
smp_call_function(clear_os_lock, NULL, 1);
|
||||||
|
|
|
@ -821,7 +821,7 @@ static void reset_ctrl_regs(void *unused)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __cpuinit hw_breakpoint_reset_notify(struct notifier_block *self,
|
static int hw_breakpoint_reset_notify(struct notifier_block *self,
|
||||||
unsigned long action,
|
unsigned long action,
|
||||||
void *hcpu)
|
void *hcpu)
|
||||||
{
|
{
|
||||||
|
@ -831,7 +831,7 @@ static int __cpuinit hw_breakpoint_reset_notify(struct notifier_block *self,
|
||||||
return NOTIFY_OK;
|
return NOTIFY_OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct notifier_block __cpuinitdata hw_breakpoint_reset_nb = {
|
static struct notifier_block hw_breakpoint_reset_nb = {
|
||||||
.notifier_call = hw_breakpoint_reset_notify,
|
.notifier_call = hw_breakpoint_reset_notify,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -132,7 +132,7 @@ void machine_restart(char *cmd)
|
||||||
|
|
||||||
/* Now call the architecture specific reboot code. */
|
/* Now call the architecture specific reboot code. */
|
||||||
if (arm_pm_restart)
|
if (arm_pm_restart)
|
||||||
arm_pm_restart('h', cmd);
|
arm_pm_restart(reboot_mode, cmd);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Whoops - the architecture was unable to reboot.
|
* Whoops - the architecture was unable to reboot.
|
||||||
|
|
|
@ -71,7 +71,7 @@ static DEFINE_RAW_SPINLOCK(boot_lock);
|
||||||
* in coherency or not. This is necessary for the hotplug code to work
|
* in coherency or not. This is necessary for the hotplug code to work
|
||||||
* reliably.
|
* reliably.
|
||||||
*/
|
*/
|
||||||
static void __cpuinit write_pen_release(u64 val)
|
static void write_pen_release(u64 val)
|
||||||
{
|
{
|
||||||
void *start = (void *)&secondary_holding_pen_release;
|
void *start = (void *)&secondary_holding_pen_release;
|
||||||
unsigned long size = sizeof(secondary_holding_pen_release);
|
unsigned long size = sizeof(secondary_holding_pen_release);
|
||||||
|
@ -84,7 +84,7 @@ static void __cpuinit write_pen_release(u64 val)
|
||||||
* Boot a secondary CPU, and assign it the specified idle task.
|
* Boot a secondary CPU, and assign it the specified idle task.
|
||||||
* This also gives us the initial stack to use for this CPU.
|
* This also gives us the initial stack to use for this CPU.
|
||||||
*/
|
*/
|
||||||
static int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
|
static int boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||||
{
|
{
|
||||||
unsigned long timeout;
|
unsigned long timeout;
|
||||||
|
|
||||||
|
@ -122,7 +122,7 @@ static int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||||
|
|
||||||
static DECLARE_COMPLETION(cpu_running);
|
static DECLARE_COMPLETION(cpu_running);
|
||||||
|
|
||||||
int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)
|
int __cpu_up(unsigned int cpu, struct task_struct *idle)
|
||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
|
@ -162,7 +162,7 @@ int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)
|
||||||
* This is the secondary CPU boot entry. We're using this CPUs
|
* This is the secondary CPU boot entry. We're using this CPUs
|
||||||
* idle thread stack, but a set of temporary page tables.
|
* idle thread stack, but a set of temporary page tables.
|
||||||
*/
|
*/
|
||||||
asmlinkage void __cpuinit secondary_start_kernel(void)
|
asmlinkage void secondary_start_kernel(void)
|
||||||
{
|
{
|
||||||
struct mm_struct *mm = &init_mm;
|
struct mm_struct *mm = &init_mm;
|
||||||
unsigned int cpu = smp_processor_id();
|
unsigned int cpu = smp_processor_id();
|
||||||
|
@ -199,13 +199,6 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
|
||||||
raw_spin_lock(&boot_lock);
|
raw_spin_lock(&boot_lock);
|
||||||
raw_spin_unlock(&boot_lock);
|
raw_spin_unlock(&boot_lock);
|
||||||
|
|
||||||
/*
|
|
||||||
* Enable local interrupts.
|
|
||||||
*/
|
|
||||||
notify_cpu_starting(cpu);
|
|
||||||
local_irq_enable();
|
|
||||||
local_fiq_enable();
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* OK, now it's safe to let the boot CPU continue. Wait for
|
* OK, now it's safe to let the boot CPU continue. Wait for
|
||||||
* the CPU migration code to notice that the CPU is online
|
* the CPU migration code to notice that the CPU is online
|
||||||
|
@ -214,6 +207,14 @@ asmlinkage void __cpuinit secondary_start_kernel(void)
|
||||||
set_cpu_online(cpu, true);
|
set_cpu_online(cpu, true);
|
||||||
complete(&cpu_running);
|
complete(&cpu_running);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Enable GIC and timers.
|
||||||
|
*/
|
||||||
|
notify_cpu_starting(cpu);
|
||||||
|
|
||||||
|
local_irq_enable();
|
||||||
|
local_fiq_enable();
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* OK, it's off to the idle thread for us
|
* OK, it's off to the idle thread for us
|
||||||
*/
|
*/
|
||||||
|
|
|
@ -152,25 +152,8 @@ void do_bad_area(unsigned long addr, unsigned int esr, struct pt_regs *regs)
|
||||||
#define ESR_CM (1 << 8)
|
#define ESR_CM (1 << 8)
|
||||||
#define ESR_LNX_EXEC (1 << 24)
|
#define ESR_LNX_EXEC (1 << 24)
|
||||||
|
|
||||||
/*
|
|
||||||
* Check that the permissions on the VMA allow for the fault which occurred.
|
|
||||||
* If we encountered a write fault, we must have write permission, otherwise
|
|
||||||
* we allow any permission.
|
|
||||||
*/
|
|
||||||
static inline bool access_error(unsigned int esr, struct vm_area_struct *vma)
|
|
||||||
{
|
|
||||||
unsigned int mask = VM_READ | VM_WRITE | VM_EXEC;
|
|
||||||
|
|
||||||
if (esr & ESR_WRITE)
|
|
||||||
mask = VM_WRITE;
|
|
||||||
if (esr & ESR_LNX_EXEC)
|
|
||||||
mask = VM_EXEC;
|
|
||||||
|
|
||||||
return vma->vm_flags & mask ? false : true;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int __do_page_fault(struct mm_struct *mm, unsigned long addr,
|
static int __do_page_fault(struct mm_struct *mm, unsigned long addr,
|
||||||
unsigned int esr, unsigned int flags,
|
unsigned int mm_flags, unsigned long vm_flags,
|
||||||
struct task_struct *tsk)
|
struct task_struct *tsk)
|
||||||
{
|
{
|
||||||
struct vm_area_struct *vma;
|
struct vm_area_struct *vma;
|
||||||
|
@ -188,12 +171,17 @@ static int __do_page_fault(struct mm_struct *mm, unsigned long addr,
|
||||||
* it.
|
* it.
|
||||||
*/
|
*/
|
||||||
good_area:
|
good_area:
|
||||||
if (access_error(esr, vma)) {
|
/*
|
||||||
|
* Check that the permissions on the VMA allow for the fault which
|
||||||
|
* occurred. If we encountered a write or exec fault, we must have
|
||||||
|
* appropriate permissions, otherwise we allow any permission.
|
||||||
|
*/
|
||||||
|
if (!(vma->vm_flags & vm_flags)) {
|
||||||
fault = VM_FAULT_BADACCESS;
|
fault = VM_FAULT_BADACCESS;
|
||||||
goto out;
|
goto out;
|
||||||
}
|
}
|
||||||
|
|
||||||
return handle_mm_fault(mm, vma, addr & PAGE_MASK, flags);
|
return handle_mm_fault(mm, vma, addr & PAGE_MASK, mm_flags);
|
||||||
|
|
||||||
check_stack:
|
check_stack:
|
||||||
if (vma->vm_flags & VM_GROWSDOWN && !expand_stack(vma, addr))
|
if (vma->vm_flags & VM_GROWSDOWN && !expand_stack(vma, addr))
|
||||||
|
@ -208,9 +196,15 @@ static int __kprobes do_page_fault(unsigned long addr, unsigned int esr,
|
||||||
struct task_struct *tsk;
|
struct task_struct *tsk;
|
||||||
struct mm_struct *mm;
|
struct mm_struct *mm;
|
||||||
int fault, sig, code;
|
int fault, sig, code;
|
||||||
bool write = (esr & ESR_WRITE) && !(esr & ESR_CM);
|
unsigned long vm_flags = VM_READ | VM_WRITE | VM_EXEC;
|
||||||
unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
|
unsigned int mm_flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
|
||||||
(write ? FAULT_FLAG_WRITE : 0);
|
|
||||||
|
if (esr & ESR_LNX_EXEC) {
|
||||||
|
vm_flags = VM_EXEC;
|
||||||
|
} else if ((esr & ESR_WRITE) && !(esr & ESR_CM)) {
|
||||||
|
vm_flags = VM_WRITE;
|
||||||
|
mm_flags |= FAULT_FLAG_WRITE;
|
||||||
|
}
|
||||||
|
|
||||||
tsk = current;
|
tsk = current;
|
||||||
mm = tsk->mm;
|
mm = tsk->mm;
|
||||||
|
@ -248,7 +242,7 @@ retry:
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
fault = __do_page_fault(mm, addr, esr, flags, tsk);
|
fault = __do_page_fault(mm, addr, mm_flags, vm_flags, tsk);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* If we need to retry but a fatal signal is pending, handle the
|
* If we need to retry but a fatal signal is pending, handle the
|
||||||
|
@ -265,7 +259,7 @@ retry:
|
||||||
*/
|
*/
|
||||||
|
|
||||||
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
|
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, addr);
|
||||||
if (flags & FAULT_FLAG_ALLOW_RETRY) {
|
if (mm_flags & FAULT_FLAG_ALLOW_RETRY) {
|
||||||
if (fault & VM_FAULT_MAJOR) {
|
if (fault & VM_FAULT_MAJOR) {
|
||||||
tsk->maj_flt++;
|
tsk->maj_flt++;
|
||||||
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs,
|
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs,
|
||||||
|
@ -280,7 +274,7 @@ retry:
|
||||||
* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk of
|
* Clear FAULT_FLAG_ALLOW_RETRY to avoid any risk of
|
||||||
* starvation.
|
* starvation.
|
||||||
*/
|
*/
|
||||||
flags &= ~FAULT_FLAG_ALLOW_RETRY;
|
mm_flags &= ~FAULT_FLAG_ALLOW_RETRY;
|
||||||
goto retry;
|
goto retry;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -468,7 +468,7 @@ static void bfin_pmu_setup(int cpu)
|
||||||
memset(cpuhw, 0, sizeof(struct cpu_hw_events));
|
memset(cpuhw, 0, sizeof(struct cpu_hw_events));
|
||||||
}
|
}
|
||||||
|
|
||||||
static int __cpuinit
|
static int
|
||||||
bfin_pmu_notifier(struct notifier_block *self, unsigned long action, void *hcpu)
|
bfin_pmu_notifier(struct notifier_block *self, unsigned long action, void *hcpu)
|
||||||
{
|
{
|
||||||
unsigned int cpu = (long)hcpu;
|
unsigned int cpu = (long)hcpu;
|
||||||
|
|
|
@ -99,7 +99,7 @@ void __init generate_cplb_tables(void)
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
void __cpuinit bfin_setup_caches(unsigned int cpu)
|
void bfin_setup_caches(unsigned int cpu)
|
||||||
{
|
{
|
||||||
#ifdef CONFIG_BFIN_ICACHE
|
#ifdef CONFIG_BFIN_ICACHE
|
||||||
bfin_icache_init(icplb_tbl[cpu]);
|
bfin_icache_init(icplb_tbl[cpu]);
|
||||||
|
@ -165,7 +165,7 @@ void __cpuinit bfin_setup_caches(unsigned int cpu)
|
||||||
#endif
|
#endif
|
||||||
}
|
}
|
||||||
|
|
||||||
void __cpuinit bfin_setup_cpudata(unsigned int cpu)
|
void bfin_setup_cpudata(unsigned int cpu)
|
||||||
{
|
{
|
||||||
struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu);
|
struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu);
|
||||||
|
|
||||||
|
|
|
@ -48,7 +48,7 @@ int __init setup_profiling_timer(unsigned int multiplier) /* not supported */
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
void __cpuinit platform_secondary_init(unsigned int cpu)
|
void platform_secondary_init(unsigned int cpu)
|
||||||
{
|
{
|
||||||
/* Clone setup for peripheral interrupt sources from CoreA. */
|
/* Clone setup for peripheral interrupt sources from CoreA. */
|
||||||
bfin_write_SICB_IMASK0(bfin_read_SIC_IMASK0());
|
bfin_write_SICB_IMASK0(bfin_read_SIC_IMASK0());
|
||||||
|
@ -73,7 +73,7 @@ void __cpuinit platform_secondary_init(unsigned int cpu)
|
||||||
spin_unlock(&boot_lock);
|
spin_unlock(&boot_lock);
|
||||||
}
|
}
|
||||||
|
|
||||||
int __cpuinit platform_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
int platform_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||||
{
|
{
|
||||||
unsigned long timeout;
|
unsigned long timeout;
|
||||||
|
|
||||||
|
@ -154,7 +154,7 @@ void platform_clear_ipi(unsigned int cpu, int irq)
|
||||||
* Setup core B's local core timer.
|
* Setup core B's local core timer.
|
||||||
* In SMP, core timer is used for clock event device.
|
* In SMP, core timer is used for clock event device.
|
||||||
*/
|
*/
|
||||||
void __cpuinit bfin_local_timer_setup(void)
|
void bfin_local_timer_setup(void)
|
||||||
{
|
{
|
||||||
#if defined(CONFIG_TICKSOURCE_CORETMR)
|
#if defined(CONFIG_TICKSOURCE_CORETMR)
|
||||||
struct irq_data *data = irq_get_irq_data(IRQ_CORETMR);
|
struct irq_data *data = irq_get_irq_data(IRQ_CORETMR);
|
||||||
|
|
|
@ -52,7 +52,7 @@ bfin_cache_init(struct cplb_entry *cplb_tbl, unsigned long cplb_addr,
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifdef CONFIG_BFIN_ICACHE
|
#ifdef CONFIG_BFIN_ICACHE
|
||||||
void __cpuinit bfin_icache_init(struct cplb_entry *icplb_tbl)
|
void bfin_icache_init(struct cplb_entry *icplb_tbl)
|
||||||
{
|
{
|
||||||
bfin_cache_init(icplb_tbl, ICPLB_ADDR0, ICPLB_DATA0, IMEM_CONTROL,
|
bfin_cache_init(icplb_tbl, ICPLB_ADDR0, ICPLB_DATA0, IMEM_CONTROL,
|
||||||
(IMC | ENICPLB));
|
(IMC | ENICPLB));
|
||||||
|
@ -60,7 +60,7 @@ void __cpuinit bfin_icache_init(struct cplb_entry *icplb_tbl)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef CONFIG_BFIN_DCACHE
|
#ifdef CONFIG_BFIN_DCACHE
|
||||||
void __cpuinit bfin_dcache_init(struct cplb_entry *dcplb_tbl)
|
void bfin_dcache_init(struct cplb_entry *dcplb_tbl)
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
* Anomaly notes:
|
* Anomaly notes:
|
||||||
|
|
|
@ -1281,7 +1281,7 @@ static struct irq_chip bfin_gpio_irqchip = {
|
||||||
.irq_set_wake = bfin_gpio_set_wake,
|
.irq_set_wake = bfin_gpio_set_wake,
|
||||||
};
|
};
|
||||||
|
|
||||||
void __cpuinit init_exception_vectors(void)
|
void init_exception_vectors(void)
|
||||||
{
|
{
|
||||||
/* cannot program in software:
|
/* cannot program in software:
|
||||||
* evt0 - emulation (jtag)
|
* evt0 - emulation (jtag)
|
||||||
|
|
|
@ -46,7 +46,7 @@ struct corelock_slot corelock __attribute__ ((__section__(".l2.bss")));
|
||||||
unsigned long blackfin_iflush_l1_entry[NR_CPUS];
|
unsigned long blackfin_iflush_l1_entry[NR_CPUS];
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
struct blackfin_initial_pda __cpuinitdata initial_pda_coreb;
|
struct blackfin_initial_pda initial_pda_coreb;
|
||||||
|
|
||||||
enum ipi_message_type {
|
enum ipi_message_type {
|
||||||
BFIN_IPI_NONE,
|
BFIN_IPI_NONE,
|
||||||
|
@ -147,7 +147,7 @@ static irqreturn_t ipi_handler_int1(int irq, void *dev_instance)
|
||||||
platform_clear_ipi(cpu, IRQ_SUPPLE_1);
|
platform_clear_ipi(cpu, IRQ_SUPPLE_1);
|
||||||
|
|
||||||
bfin_ipi_data = &__get_cpu_var(bfin_ipi);
|
bfin_ipi_data = &__get_cpu_var(bfin_ipi);
|
||||||
while ((pending = xchg(&bfin_ipi_data->bits, 0)) != 0) {
|
while ((pending = atomic_xchg(&bfin_ipi_data->bits, 0)) != 0) {
|
||||||
msg = 0;
|
msg = 0;
|
||||||
do {
|
do {
|
||||||
msg = find_next_bit(&pending, BITS_PER_LONG, msg + 1);
|
msg = find_next_bit(&pending, BITS_PER_LONG, msg + 1);
|
||||||
|
@ -182,8 +182,8 @@ static void bfin_ipi_init(void)
|
||||||
struct ipi_data *bfin_ipi_data;
|
struct ipi_data *bfin_ipi_data;
|
||||||
for_each_possible_cpu(cpu) {
|
for_each_possible_cpu(cpu) {
|
||||||
bfin_ipi_data = &per_cpu(bfin_ipi, cpu);
|
bfin_ipi_data = &per_cpu(bfin_ipi, cpu);
|
||||||
bfin_ipi_data->bits = 0;
|
atomic_set(&bfin_ipi_data->bits, 0);
|
||||||
bfin_ipi_data->count = 0;
|
atomic_set(&bfin_ipi_data->count, 0);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -246,7 +246,7 @@ void smp_send_stop(void)
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)
|
int __cpu_up(unsigned int cpu, struct task_struct *idle)
|
||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
|
@ -259,7 +259,7 @@ int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void __cpuinit setup_secondary(unsigned int cpu)
|
static void setup_secondary(unsigned int cpu)
|
||||||
{
|
{
|
||||||
unsigned long ilat;
|
unsigned long ilat;
|
||||||
|
|
||||||
|
@ -277,7 +277,7 @@ static void __cpuinit setup_secondary(unsigned int cpu)
|
||||||
IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
|
IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
|
||||||
}
|
}
|
||||||
|
|
||||||
void __cpuinit secondary_start_kernel(void)
|
void secondary_start_kernel(void)
|
||||||
{
|
{
|
||||||
unsigned int cpu = smp_processor_id();
|
unsigned int cpu = smp_processor_id();
|
||||||
struct mm_struct *mm = &init_mm;
|
struct mm_struct *mm = &init_mm;
|
||||||
|
@ -402,7 +402,7 @@ EXPORT_SYMBOL(resync_core_dcache);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifdef CONFIG_HOTPLUG_CPU
|
#ifdef CONFIG_HOTPLUG_CPU
|
||||||
int __cpuexit __cpu_disable(void)
|
int __cpu_disable(void)
|
||||||
{
|
{
|
||||||
unsigned int cpu = smp_processor_id();
|
unsigned int cpu = smp_processor_id();
|
||||||
|
|
||||||
|
@ -415,7 +415,7 @@ int __cpuexit __cpu_disable(void)
|
||||||
|
|
||||||
static DECLARE_COMPLETION(cpu_killed);
|
static DECLARE_COMPLETION(cpu_killed);
|
||||||
|
|
||||||
int __cpuexit __cpu_die(unsigned int cpu)
|
int __cpu_die(unsigned int cpu)
|
||||||
{
|
{
|
||||||
return wait_for_completion_timeout(&cpu_killed, 5000);
|
return wait_for_completion_timeout(&cpu_killed, 5000);
|
||||||
}
|
}
|
||||||
|
|
|
@ -197,7 +197,7 @@ int setup_profiling_timer(unsigned int multiplier)
|
||||||
*/
|
*/
|
||||||
unsigned long cache_decay_ticks = 1;
|
unsigned long cache_decay_ticks = 1;
|
||||||
|
|
||||||
int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)
|
int __cpu_up(unsigned int cpu, struct task_struct *tidle)
|
||||||
{
|
{
|
||||||
smp_boot_one_cpu(cpu, tidle);
|
smp_boot_one_cpu(cpu, tidle);
|
||||||
return cpu_online(cpu) ? 0 : -ENOSYS;
|
return cpu_online(cpu) ? 0 : -ENOSYS;
|
||||||
|
|
|
@ -709,7 +709,7 @@ static void __init reserve_dma_coherent(void)
|
||||||
/*
|
/*
|
||||||
* calibrate the delay loop
|
* calibrate the delay loop
|
||||||
*/
|
*/
|
||||||
void __cpuinit calibrate_delay(void)
|
void calibrate_delay(void)
|
||||||
{
|
{
|
||||||
loops_per_jiffy = __delay_loops_MHz * (1000000 / HZ);
|
loops_per_jiffy = __delay_loops_MHz * (1000000 / HZ);
|
||||||
|
|
||||||
|
|
|
@ -41,7 +41,7 @@ static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
|
||||||
|
|
||||||
int on_simulator;
|
int on_simulator;
|
||||||
|
|
||||||
void __cpuinit calibrate_delay(void)
|
void calibrate_delay(void)
|
||||||
{
|
{
|
||||||
loops_per_jiffy = thread_freq_mhz * 1000000 / HZ;
|
loops_per_jiffy = thread_freq_mhz * 1000000 / HZ;
|
||||||
}
|
}
|
||||||
|
|
|
@ -146,7 +146,7 @@ void __init smp_prepare_boot_cpu(void)
|
||||||
* to point to current thread info
|
* to point to current thread info
|
||||||
*/
|
*/
|
||||||
|
|
||||||
void __cpuinit start_secondary(void)
|
void start_secondary(void)
|
||||||
{
|
{
|
||||||
unsigned int cpu;
|
unsigned int cpu;
|
||||||
unsigned long thread_ptr;
|
unsigned long thread_ptr;
|
||||||
|
@ -194,7 +194,7 @@ void __cpuinit start_secondary(void)
|
||||||
* maintains control until "cpu_online(cpu)" is set.
|
* maintains control until "cpu_online(cpu)" is set.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)
|
int __cpu_up(unsigned int cpu, struct task_struct *idle)
|
||||||
{
|
{
|
||||||
struct thread_info *thread = (struct thread_info *)idle->stack;
|
struct thread_info *thread = (struct thread_info *)idle->stack;
|
||||||
void *stack_start;
|
void *stack_start;
|
||||||
|
|
|
@ -343,7 +343,7 @@ static void __init do_boot_cpu(int phys_id)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
int __cpuinit __cpu_up(unsigned int cpu_id, struct task_struct *tidle)
|
int __cpu_up(unsigned int cpu_id, struct task_struct *tidle)
|
||||||
{
|
{
|
||||||
int timeout;
|
int timeout;
|
||||||
|
|
||||||
|
|
|
@ -813,8 +813,8 @@ static struct metag_pmu _metag_pmu = {
|
||||||
};
|
};
|
||||||
|
|
||||||
/* PMU CPU hotplug notifier */
|
/* PMU CPU hotplug notifier */
|
||||||
static int __cpuinit metag_pmu_cpu_notify(struct notifier_block *b,
|
static int metag_pmu_cpu_notify(struct notifier_block *b, unsigned long action,
|
||||||
unsigned long action, void *hcpu)
|
void *hcpu)
|
||||||
{
|
{
|
||||||
unsigned int cpu = (unsigned int)hcpu;
|
unsigned int cpu = (unsigned int)hcpu;
|
||||||
struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);
|
struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);
|
||||||
|
@ -828,7 +828,7 @@ static int __cpuinit metag_pmu_cpu_notify(struct notifier_block *b,
|
||||||
return NOTIFY_OK;
|
return NOTIFY_OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
static struct notifier_block __cpuinitdata metag_pmu_notifier = {
|
static struct notifier_block metag_pmu_notifier = {
|
||||||
.notifier_call = metag_pmu_cpu_notify,
|
.notifier_call = metag_pmu_cpu_notify,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -68,7 +68,7 @@ static DECLARE_COMPLETION(cpu_running);
|
||||||
/*
|
/*
|
||||||
* "thread" is assumed to be a valid Meta hardware thread ID.
|
* "thread" is assumed to be a valid Meta hardware thread ID.
|
||||||
*/
|
*/
|
||||||
int __cpuinit boot_secondary(unsigned int thread, struct task_struct *idle)
|
int boot_secondary(unsigned int thread, struct task_struct *idle)
|
||||||
{
|
{
|
||||||
u32 val;
|
u32 val;
|
||||||
|
|
||||||
|
@ -118,10 +118,8 @@ int __cpuinit boot_secondary(unsigned int thread, struct task_struct *idle)
|
||||||
* If the cache partition has changed, prints a message to the log describing
|
* If the cache partition has changed, prints a message to the log describing
|
||||||
* those changes.
|
* those changes.
|
||||||
*/
|
*/
|
||||||
static __cpuinit void describe_cachepart_change(unsigned int thread,
|
static void describe_cachepart_change(unsigned int thread, const char *label,
|
||||||
const char *label,
|
unsigned int sz, unsigned int old,
|
||||||
unsigned int sz,
|
|
||||||
unsigned int old,
|
|
||||||
unsigned int new)
|
unsigned int new)
|
||||||
{
|
{
|
||||||
unsigned int lor1, land1, gor1, gand1;
|
unsigned int lor1, land1, gor1, gand1;
|
||||||
|
@ -170,7 +168,7 @@ static __cpuinit void describe_cachepart_change(unsigned int thread,
|
||||||
* Ensures that coherency is enabled and that the threads share the same cache
|
* Ensures that coherency is enabled and that the threads share the same cache
|
||||||
* partitions.
|
* partitions.
|
||||||
*/
|
*/
|
||||||
static __cpuinit void setup_smp_cache(unsigned int thread)
|
static void setup_smp_cache(unsigned int thread)
|
||||||
{
|
{
|
||||||
unsigned int this_thread, lflags;
|
unsigned int this_thread, lflags;
|
||||||
unsigned int dcsz, dcpart_this, dcpart_old, dcpart_new;
|
unsigned int dcsz, dcpart_this, dcpart_old, dcpart_new;
|
||||||
|
@ -215,7 +213,7 @@ static __cpuinit void setup_smp_cache(unsigned int thread)
|
||||||
icpart_old, icpart_new);
|
icpart_old, icpart_new);
|
||||||
}
|
}
|
||||||
|
|
||||||
int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *idle)
|
int __cpu_up(unsigned int cpu, struct task_struct *idle)
|
||||||
{
|
{
|
||||||
unsigned int thread = cpu_2_hwthread_id[cpu];
|
unsigned int thread = cpu_2_hwthread_id[cpu];
|
||||||
int ret;
|
int ret;
|
||||||
|
@ -268,7 +266,7 @@ static DECLARE_COMPLETION(cpu_killed);
|
||||||
/*
|
/*
|
||||||
* __cpu_disable runs on the processor to be shutdown.
|
* __cpu_disable runs on the processor to be shutdown.
|
||||||
*/
|
*/
|
||||||
int __cpuexit __cpu_disable(void)
|
int __cpu_disable(void)
|
||||||
{
|
{
|
||||||
unsigned int cpu = smp_processor_id();
|
unsigned int cpu = smp_processor_id();
|
||||||
|
|
||||||
|
@ -299,7 +297,7 @@ int __cpuexit __cpu_disable(void)
|
||||||
* called on the thread which is asking for a CPU to be shutdown -
|
* called on the thread which is asking for a CPU to be shutdown -
|
||||||
* waits until shutdown has completed, or it is timed out.
|
* waits until shutdown has completed, or it is timed out.
|
||||||
*/
|
*/
|
||||||
void __cpuexit __cpu_die(unsigned int cpu)
|
void __cpu_die(unsigned int cpu)
|
||||||
{
|
{
|
||||||
if (!wait_for_completion_timeout(&cpu_killed, msecs_to_jiffies(1)))
|
if (!wait_for_completion_timeout(&cpu_killed, msecs_to_jiffies(1)))
|
||||||
pr_err("CPU%u: unable to kill\n", cpu);
|
pr_err("CPU%u: unable to kill\n", cpu);
|
||||||
|
@ -311,7 +309,7 @@ void __cpuexit __cpu_die(unsigned int cpu)
|
||||||
* Note that we do not return from this function. If this cpu is
|
* Note that we do not return from this function. If this cpu is
|
||||||
* brought online again it will need to run secondary_startup().
|
* brought online again it will need to run secondary_startup().
|
||||||
*/
|
*/
|
||||||
void __cpuexit cpu_die(void)
|
void cpu_die(void)
|
||||||
{
|
{
|
||||||
local_irq_disable();
|
local_irq_disable();
|
||||||
idle_task_exit();
|
idle_task_exit();
|
||||||
|
@ -326,7 +324,7 @@ void __cpuexit cpu_die(void)
|
||||||
* Called by both boot and secondaries to move global data into
|
* Called by both boot and secondaries to move global data into
|
||||||
* per-processor storage.
|
* per-processor storage.
|
||||||
*/
|
*/
|
||||||
void __cpuinit smp_store_cpu_info(unsigned int cpuid)
|
void smp_store_cpu_info(unsigned int cpuid)
|
||||||
{
|
{
|
||||||
struct cpuinfo_metag *cpu_info = &per_cpu(cpu_data, cpuid);
|
struct cpuinfo_metag *cpu_info = &per_cpu(cpu_data, cpuid);
|
||||||
|
|
||||||
|
|
|
@ -812,7 +812,7 @@ static void set_trigger_mask(unsigned int mask)
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
void __cpuinit per_cpu_trap_init(unsigned long cpu)
|
void per_cpu_trap_init(unsigned long cpu)
|
||||||
{
|
{
|
||||||
TBIRES int_context;
|
TBIRES int_context;
|
||||||
unsigned int thread = cpu_2_hwthread_id[cpu];
|
unsigned int thread = cpu_2_hwthread_id[cpu];
|
||||||
|
|
|
@ -1702,6 +1702,7 @@ endchoice
|
||||||
|
|
||||||
config KVM_GUEST
|
config KVM_GUEST
|
||||||
bool "KVM Guest Kernel"
|
bool "KVM Guest Kernel"
|
||||||
|
depends on BROKEN_ON_SMP
|
||||||
help
|
help
|
||||||
Select this option if building a guest kernel for KVM (Trap & Emulate) mode
|
Select this option if building a guest kernel for KVM (Trap & Emulate) mode
|
||||||
|
|
||||||
|
|
|
@ -182,7 +182,7 @@ const char *get_system_type(void)
|
||||||
return ath79_sys_type;
|
return ath79_sys_type;
|
||||||
}
|
}
|
||||||
|
|
||||||
unsigned int __cpuinit get_c0_compare_int(void)
|
unsigned int get_c0_compare_int(void)
|
||||||
{
|
{
|
||||||
return CP0_LEGACY_COMPARE_IRQ;
|
return CP0_LEGACY_COMPARE_IRQ;
|
||||||
}
|
}
|
||||||
|
|
Some files were not shown because too many files have changed in this diff Show more
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Reference in a new issue