clk: qcom: Add support for multiple PLL software instances
There could be use cases where the PLL could support various software instances for various peripherals or for cpu. In those cases PLL need to support aggregation logic for the voting and devoting on the PLL. Change-Id: Ie5148a75452dccc555989a454996b945956f94e5 Signed-off-by: Taniya Das <tdas@codeaurora.org>
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2 changed files with 23 additions and 2 deletions
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@ -406,7 +406,11 @@ static int clk_alpha_pll_enable(struct clk_hw *hw)
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ret = clk_enable_regmap(hw);
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if (ret)
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return ret;
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return wait_for_pll_enable_active(pll);
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ret = wait_for_pll_enable_active(pll);
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if (ret == 0)
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if (pll->flags & SUPPORTS_FSM_VOTE)
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*pll->soft_vote |= (pll->soft_vote_mask);
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return ret;
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}
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/* Skip if already enabled */
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@ -454,6 +458,11 @@ static void clk_alpha_pll_disable(struct clk_hw *hw)
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/* If in FSM mode, just unvote it */
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if (val & PLL_VOTE_FSM_ENA) {
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if (pll->flags & SUPPORTS_FSM_VOTE) {
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*pll->soft_vote &= ~(pll->soft_vote_mask);
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if (!*pll->soft_vote)
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clk_disable_regmap(hw);
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} else
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clk_disable_regmap(hw);
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return;
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}
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@ -51,6 +51,8 @@ struct pll_vco {
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/**
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* struct clk_alpha_pll - phase locked loop (PLL)
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* @offset: base address of registers
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* @soft_vote: soft voting variable for multiple PLL software instances
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* @soft_vote_mask: soft voting mask for multiple PLL software instances
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* @vco_table: array of VCO settings
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* @regs: alpha pll register map (see @clk_alpha_pll_regs)
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* @clkr: regmap clock handle
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@ -59,11 +61,21 @@ struct clk_alpha_pll {
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u32 offset;
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const u8 *regs;
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struct alpha_pll_config *config;
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u32 *soft_vote;
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u32 soft_vote_mask;
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/* Soft voting values */
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#define PLL_SOFT_VOTE_PRIMARY BIT(0)
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#define PLL_SOFT_VOTE_CPU BIT(1)
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#define PLL_SOFT_VOTE_AUX BIT(2)
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const struct pll_vco *vco_table;
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size_t num_vco;
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#define SUPPORTS_OFFLINE_REQ BIT(0)
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#define SUPPORTS_FSM_MODE BIT(2)
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#define SUPPORTS_DYNAMIC_UPDATE BIT(3)
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/* Associated with soft_vote for multiple PLL software instances */
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#define SUPPORTS_FSM_VOTE BIT(5)
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u8 flags;
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struct clk_regmap clkr;
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