ath9k: Fix AR9285 specific noise floor eeprom reads.

Fix AR9285 specific noise floor reads and initialize tx and rx
chainmask during reset. This along with the following earlier
patches of ath9k fixes an issue with association noticed in
noisy environment.

ath9k: Fix typo in chip version check
ath9k: Remove unnecessary gpio configuration in ath9k_hw_reset()
ath9k: Fix bug in NF calibration

Signed-off-by: Senthil Balasubramanian <senthilkumar@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Senthil Balasubramanian 2009-01-26 20:28:14 +05:30 committed by John W. Linville
parent 0c6666e4c4
commit 793c592995
2 changed files with 42 additions and 41 deletions

View file

@ -105,27 +105,29 @@ static void ath9k_hw_do_getnf(struct ath_hal *ah,
"NF calibrated [ctl] [chain 0] is %d\n", nf); "NF calibrated [ctl] [chain 0] is %d\n", nf);
nfarray[0] = nf; nfarray[0] = nf;
if (AR_SREV_9280_10_OR_LATER(ah)) if (!AR_SREV_9285(ah)) {
nf = MS(REG_READ(ah, AR_PHY_CH1_CCA), if (AR_SREV_9280_10_OR_LATER(ah))
AR9280_PHY_CH1_MINCCA_PWR); nf = MS(REG_READ(ah, AR_PHY_CH1_CCA),
else AR9280_PHY_CH1_MINCCA_PWR);
nf = MS(REG_READ(ah, AR_PHY_CH1_CCA), else
AR_PHY_CH1_MINCCA_PWR); nf = MS(REG_READ(ah, AR_PHY_CH1_CCA),
AR_PHY_CH1_MINCCA_PWR);
if (nf & 0x100)
nf = 0 - ((nf ^ 0x1ff) + 1);
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
"NF calibrated [ctl] [chain 1] is %d\n", nf);
nfarray[1] = nf;
if (!AR_SREV_9280(ah)) {
nf = MS(REG_READ(ah, AR_PHY_CH2_CCA),
AR_PHY_CH2_MINCCA_PWR);
if (nf & 0x100) if (nf & 0x100)
nf = 0 - ((nf ^ 0x1ff) + 1); nf = 0 - ((nf ^ 0x1ff) + 1);
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
"NF calibrated [ctl] [chain 2] is %d\n", nf); "NF calibrated [ctl] [chain 1] is %d\n", nf);
nfarray[2] = nf; nfarray[1] = nf;
if (!AR_SREV_9280(ah)) {
nf = MS(REG_READ(ah, AR_PHY_CH2_CCA),
AR_PHY_CH2_MINCCA_PWR);
if (nf & 0x100)
nf = 0 - ((nf ^ 0x1ff) + 1);
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
"NF calibrated [ctl] [chain 2] is %d\n", nf);
nfarray[2] = nf;
}
} }
if (AR_SREV_9280_10_OR_LATER(ah)) if (AR_SREV_9280_10_OR_LATER(ah))
@ -141,27 +143,29 @@ static void ath9k_hw_do_getnf(struct ath_hal *ah,
"NF calibrated [ext] [chain 0] is %d\n", nf); "NF calibrated [ext] [chain 0] is %d\n", nf);
nfarray[3] = nf; nfarray[3] = nf;
if (AR_SREV_9280_10_OR_LATER(ah)) if (!AR_SREV_9285(ah)) {
nf = MS(REG_READ(ah, AR_PHY_CH1_EXT_CCA), if (AR_SREV_9280_10_OR_LATER(ah))
AR9280_PHY_CH1_EXT_MINCCA_PWR); nf = MS(REG_READ(ah, AR_PHY_CH1_EXT_CCA),
else AR9280_PHY_CH1_EXT_MINCCA_PWR);
nf = MS(REG_READ(ah, AR_PHY_CH1_EXT_CCA), else
AR_PHY_CH1_EXT_MINCCA_PWR); nf = MS(REG_READ(ah, AR_PHY_CH1_EXT_CCA),
AR_PHY_CH1_EXT_MINCCA_PWR);
if (nf & 0x100)
nf = 0 - ((nf ^ 0x1ff) + 1);
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
"NF calibrated [ext] [chain 1] is %d\n", nf);
nfarray[4] = nf;
if (!AR_SREV_9280(ah)) {
nf = MS(REG_READ(ah, AR_PHY_CH2_EXT_CCA),
AR_PHY_CH2_EXT_MINCCA_PWR);
if (nf & 0x100) if (nf & 0x100)
nf = 0 - ((nf ^ 0x1ff) + 1); nf = 0 - ((nf ^ 0x1ff) + 1);
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE, DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
"NF calibrated [ext] [chain 2] is %d\n", nf); "NF calibrated [ext] [chain 1] is %d\n", nf);
nfarray[5] = nf; nfarray[4] = nf;
if (!AR_SREV_9280(ah)) {
nf = MS(REG_READ(ah, AR_PHY_CH2_EXT_CCA),
AR_PHY_CH2_EXT_MINCCA_PWR);
if (nf & 0x100)
nf = 0 - ((nf ^ 0x1ff) + 1);
DPRINTF(ah->ah_sc, ATH_DBG_CALIBRATE,
"NF calibrated [ext] [chain 2] is %d\n", nf);
nfarray[5] = nf;
}
} }
} }
@ -668,12 +672,6 @@ int16_t ath9k_hw_getnf(struct ath_hal *ah,
int16_t nfarray[NUM_NF_READINGS] = { 0 }; int16_t nfarray[NUM_NF_READINGS] = { 0 };
struct ath9k_nfcal_hist *h; struct ath9k_nfcal_hist *h;
struct ieee80211_channel *c = chan->chan; struct ieee80211_channel *c = chan->chan;
u8 chainmask;
if (AR_SREV_9280(ah))
chainmask = 0x1B;
else
chainmask = 0x3F;
chan->channelFlags &= (~CHANNEL_CW_INT); chan->channelFlags &= (~CHANNEL_CW_INT);
if (REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) { if (REG_READ(ah, AR_PHY_AGC_CONTROL) & AR_PHY_AGC_CONTROL_NF) {

View file

@ -2165,7 +2165,10 @@ int ath9k_hw_reset(struct ath_hal *ah, struct ath9k_channel *chan,
ahp->ah_txchainmask = sc->sc_tx_chainmask; ahp->ah_txchainmask = sc->sc_tx_chainmask;
ahp->ah_rxchainmask = sc->sc_rx_chainmask; ahp->ah_rxchainmask = sc->sc_rx_chainmask;
if (AR_SREV_9280(ah)) { if (AR_SREV_9285(ah)) {
ahp->ah_txchainmask &= 0x1;
ahp->ah_rxchainmask &= 0x1;
} else if (AR_SREV_9280(ah)) {
ahp->ah_txchainmask &= 0x3; ahp->ah_txchainmask &= 0x3;
ahp->ah_rxchainmask &= 0x3; ahp->ah_rxchainmask &= 0x3;
} }