ar9170: add heavy clip handling
add heavy clip handling for 2.4GHz only (similar to the vendor driver). Signed-off-by: Joerg Albert <jal2@gmx.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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90f2908d32
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2 changed files with 69 additions and 4 deletions
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@ -202,6 +202,8 @@ struct ar9170 {
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u8 power_2G_ht20[8];
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u8 power_2G_ht20[8];
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u8 power_2G_ht40[8];
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u8 power_2G_ht40[8];
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u8 phy_heavy_clip;
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#ifdef CONFIG_AR9170_LEDS
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#ifdef CONFIG_AR9170_LEDS
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struct delayed_work led_work;
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struct delayed_work led_work;
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struct ar9170_led leds[AR9170_NUM_LEDS];
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struct ar9170_led leds[AR9170_NUM_LEDS];
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@ -1278,8 +1278,38 @@ static u8 ar9170_get_max_edge_power(struct ar9170 *ar,
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return rc;
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return rc;
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}
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}
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/* calculate the conformance test limits and apply them to ar->power*
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static u8 ar9170_get_heavy_clip(struct ar9170 *ar,
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* (derived from otus hal/hpmain.c, line 3706 ff.)
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struct ar9170_calctl_edges edges[],
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u32 freq, enum ar9170_bw bw)
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{
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u8 f;
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int i;
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u8 rc = 0;
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if (freq < 3000)
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f = freq - 2300;
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else
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f = (freq - 4800) / 5;
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if (bw == AR9170_BW_40_BELOW || bw == AR9170_BW_40_ABOVE)
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rc |= 0xf0;
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for (i = 0; i < AR5416_NUM_BAND_EDGES; i++) {
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if (edges[i].channel == 0xff)
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break;
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if (f == edges[i].channel) {
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if (!(edges[i].power_flags & AR9170_CALCTL_EDGE_FLAGS))
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rc |= 0x0f;
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break;
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}
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}
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return rc;
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}
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/*
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* calculate the conformance test limits and the heavy clip parameter
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* and apply them to ar->power* (derived from otus hal/hpmain.c, line 3706)
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*/
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*/
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static void ar9170_calc_ctl(struct ar9170 *ar, u32 freq, enum ar9170_bw bw)
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static void ar9170_calc_ctl(struct ar9170 *ar, u32 freq, enum ar9170_bw bw)
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{
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{
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@ -1312,6 +1342,8 @@ static void ar9170_calc_ctl(struct ar9170 *ar, u32 freq, enum ar9170_bw bw)
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#define EDGES(c, n) (ar->eeprom.ctl_data[c].control_edges[n])
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#define EDGES(c, n) (ar->eeprom.ctl_data[c].control_edges[n])
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ar->phy_heavy_clip = 0;
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/*
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/*
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* TODO: investigate the differences between OTUS'
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* TODO: investigate the differences between OTUS'
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* hpreg.c::zfHpGetRegulatoryDomain() and
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* hpreg.c::zfHpGetRegulatoryDomain() and
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@ -1347,6 +1379,15 @@ static void ar9170_calc_ctl(struct ar9170 *ar, u32 freq, enum ar9170_bw bw)
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if (ctl_idx < AR5416_NUM_CTLS) {
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if (ctl_idx < AR5416_NUM_CTLS) {
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int f_off = 0;
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int f_off = 0;
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/* determine heav clip parameter from
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the 11G edges array */
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if (modes[i].ctl_mode == CTL_11G) {
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ar->phy_heavy_clip =
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ar9170_get_heavy_clip(ar,
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EDGES(ctl_idx, 1),
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freq, bw);
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}
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/* adjust freq for 40MHz */
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/* adjust freq for 40MHz */
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if (modes[i].ctl_mode == CTL_2GHT40 ||
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if (modes[i].ctl_mode == CTL_2GHT40 ||
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modes[i].ctl_mode == CTL_5GHT40) {
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modes[i].ctl_mode == CTL_5GHT40) {
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@ -1392,6 +1433,19 @@ static void ar9170_calc_ctl(struct ar9170 *ar, u32 freq, enum ar9170_bw bw)
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modes[i].max_power);
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modes[i].max_power);
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}
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}
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}
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}
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if (ar->phy_heavy_clip & 0xf0) {
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ar->power_2G_ht40[0]--;
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ar->power_2G_ht40[1]--;
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ar->power_2G_ht40[2]--;
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}
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if (ar->phy_heavy_clip & 0xf) {
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ar->power_2G_ht20[0]++;
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ar->power_2G_ht20[1]++;
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ar->power_2G_ht20[2]++;
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}
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#undef EDGES
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#undef EDGES
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}
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}
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@ -1501,8 +1555,6 @@ static int ar9170_set_power_cal(struct ar9170 *ar, u32 freq, enum ar9170_bw bw)
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/* calc. conformance test limits and apply to ar->power*[] */
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/* calc. conformance test limits and apply to ar->power*[] */
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ar9170_calc_ctl(ar, freq, bw);
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ar9170_calc_ctl(ar, freq, bw);
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/* TODO: (heavy clip) regulatory domain power level fine-tuning. */
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/* set ACK/CTS TX power */
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/* set ACK/CTS TX power */
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ar9170_regwrite_begin(ar);
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ar9170_regwrite_begin(ar);
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@ -1645,6 +1697,17 @@ int ar9170_set_channel(struct ar9170 *ar, struct ieee80211_channel *channel,
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if (err)
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if (err)
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return err;
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return err;
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if (ar->phy_heavy_clip) {
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err = ar9170_write_reg(ar, 0x1c59e0,
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0x200 | ar->phy_heavy_clip);
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if (err) {
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if (ar9170_nag_limiter(ar))
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printk(KERN_ERR "%s: failed to set "
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"heavy clip\n",
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wiphy_name(ar->hw->wiphy));
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}
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}
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for (i = 0; i < 2; i++) {
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for (i = 0; i < 2; i++) {
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ar->noise[i] = ar9170_calc_noise_dbm(
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ar->noise[i] = ar9170_calc_noise_dbm(
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(le32_to_cpu(vals[2 + i]) >> 19) & 0x1ff);
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(le32_to_cpu(vals[2 + i]) >> 19) & 0x1ff);
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