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arm64: dts: qcom: Add msm8916 I2C nodes.

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This patch adds missing support for i2c0 and i2c6, this support is
required to connect the i2c slaves on LS expansion on DB410c.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This commit is contained in:
Srinivas Kandagatla 2015-10-09 09:55:05 +01:00 committed by Andy Gross
parent dce4f63b12
commit 7f5b092168
2 changed files with 78 additions and 0 deletions
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48
arch/arm64/boot/dts/qcom/msm8916-pins.dtsi
View file

@ -265,6 +265,30 @@
};
};
i2c2_default: i2c2_default {
pinmux {
function = "blsp_i2c2";
pins = "gpio6", "gpio7";
};
pinconf {
pins = "gpio6", "gpio7";
drive-strength = <2>;
bias-disable = <0>;
};
};
i2c2_sleep: i2c2_sleep {
pinmux {
function = "gpio";
pins = "gpio6", "gpio7";
};
pinconf {
pins = "gpio6", "gpio7";
drive-strength = <2>;
bias-disable = <0>;
};
};
i2c4_default: i2c4_default {
pinmux {
function = "blsp_i2c4";
@ -289,6 +313,30 @@
};
};
i2c6_default: i2c6_default {
pinmux {
function = "blsp_i2c6";
pins = "gpio22", "gpio23";
};
pinconf {
pins = "gpio22", "gpio23";
drive-strength = <2>;
bias-disable = <0>;
};
};
i2c6_sleep: i2c6_sleep {
pinmux {
function = "gpio";
pins = "gpio22", "gpio23";
};
pinconf {
pins = "gpio22", "gpio23";
drive-strength = <2>;
bias-disable = <0>;
};
};
sdhc2_cd_pin {
sdc2_cd_on: cd_on {
pinmux {

30
arch/arm64/boot/dts/qcom/msm8916.dtsi
View file

@ -233,6 +233,21 @@
status = "disabled";
};
blsp_i2c2: i2c@78b6000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x78b6000 0x1000>;
interrupts = <GIC_SPI 96 0>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
clock-names = "iface", "core";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c2_default>;
pinctrl-1 = <&i2c2_sleep>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
blsp_i2c4: i2c@78b8000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x78b8000 0x1000>;
@ -248,6 +263,21 @@
status = "disabled";
};
blsp_i2c6: i2c@78ba000 {
compatible = "qcom,i2c-qup-v2.2.1";
reg = <0x78ba000 0x1000>;
interrupts = <GIC_SPI 100 0>;
clocks = <&gcc GCC_BLSP1_AHB_CLK>,
<&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
clock-names = "iface", "core";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c6_default>;
pinctrl-1 = <&i2c6_sleep>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
sdhc_1: sdhci@07824000 {
compatible = "qcom,sdhci-msm-v4";
reg = <0x07824900 0x11c>, <0x07824000 0x800>;