This is the 4.19.122 stable release
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This commit is contained in:
commit
9179fe9802
41 changed files with 249 additions and 85 deletions
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
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|||
# SPDX-License-Identifier: GPL-2.0
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VERSION = 4
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PATCHLEVEL = 19
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SUBLEVEL = 121
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SUBLEVEL = 122
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EXTRAVERSION =
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NAME = "People's Front"
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@ -186,16 +186,10 @@ static inline void writel(u32 data, volatile void __iomem *addr)
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#define mmiowb()
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/*
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* Need an mtype somewhere in here, for cache type deals?
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* This is probably too long for an inline.
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*/
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void __iomem *ioremap_nocache(unsigned long phys_addr, unsigned long size);
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void __iomem *ioremap(unsigned long phys_addr, unsigned long size);
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#define ioremap_nocache ioremap
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#define ioremap_uc(X, Y) ioremap((X), (Y))
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static inline void __iomem *ioremap(unsigned long phys_addr, unsigned long size)
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{
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return ioremap_nocache(phys_addr, size);
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}
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static inline void iounmap(volatile void __iomem *addr)
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{
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@ -33,7 +33,7 @@ EXPORT_SYMBOL(__vmgetie);
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EXPORT_SYMBOL(__vmsetie);
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EXPORT_SYMBOL(__vmyield);
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EXPORT_SYMBOL(empty_zero_page);
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EXPORT_SYMBOL(ioremap_nocache);
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EXPORT_SYMBOL(ioremap);
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EXPORT_SYMBOL(memcpy);
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EXPORT_SYMBOL(memset);
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@ -22,7 +22,7 @@
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#include <linux/vmalloc.h>
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#include <linux/mm.h>
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void __iomem *ioremap_nocache(unsigned long phys_addr, unsigned long size)
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void __iomem *ioremap(unsigned long phys_addr, unsigned long size)
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{
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unsigned long last_addr, addr;
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unsigned long offset = phys_addr & ~PAGE_MASK;
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@ -82,10 +82,16 @@ static void of_pci_parse_addrs(struct device_node *node, struct pci_dev *dev)
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const __be32 *addrs;
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u32 i;
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int proplen;
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bool mark_unset = false;
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addrs = of_get_property(node, "assigned-addresses", &proplen);
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if (!addrs)
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return;
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if (!addrs || !proplen) {
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addrs = of_get_property(node, "reg", &proplen);
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if (!addrs || !proplen)
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return;
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mark_unset = true;
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}
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pr_debug(" parse addresses (%d bytes) @ %p\n", proplen, addrs);
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for (; proplen >= 20; proplen -= 20, addrs += 5) {
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flags = pci_parse_of_flags(of_read_number(addrs, 1), 0);
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@ -110,6 +116,8 @@ static void of_pci_parse_addrs(struct device_node *node, struct pci_dev *dev)
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continue;
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}
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res->flags = flags;
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if (mark_unset)
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res->flags |= IORESOURCE_UNSET;
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res->name = pci_name(dev);
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region.start = base;
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region.end = base + size - 1;
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@ -128,7 +128,7 @@ void diag_stat_inc(enum diag_stat_enum nr)
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}
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EXPORT_SYMBOL(diag_stat_inc);
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void diag_stat_inc_norecursion(enum diag_stat_enum nr)
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void notrace diag_stat_inc_norecursion(enum diag_stat_enum nr)
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{
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this_cpu_inc(diag_stat.counter[nr]);
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trace_s390_diagnose_norecursion(diag_map[nr].code);
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@ -393,7 +393,7 @@ int smp_find_processor_id(u16 address)
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return -1;
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}
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bool arch_vcpu_is_preempted(int cpu)
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bool notrace arch_vcpu_is_preempted(int cpu)
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{
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if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))
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return false;
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@ -403,7 +403,7 @@ bool arch_vcpu_is_preempted(int cpu)
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}
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EXPORT_SYMBOL(arch_vcpu_is_preempted);
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void smp_yield_cpu(int cpu)
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void notrace smp_yield_cpu(int cpu)
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{
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if (MACHINE_HAS_DIAG9C) {
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diag_stat_inc_norecursion(DIAG_STAT_X09C);
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|
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@ -14,7 +14,7 @@ EXPORT_TRACEPOINT_SYMBOL(s390_diagnose);
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static DEFINE_PER_CPU(unsigned int, diagnose_trace_depth);
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void trace_s390_diagnose_norecursion(int diag_nr)
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void notrace trace_s390_diagnose_norecursion(int diag_nr)
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{
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unsigned long flags;
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unsigned int *depth;
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|
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|
@ -71,7 +71,8 @@ void amdgpu_pm_acpi_event_handler(struct amdgpu_device *adev)
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adev->pm.ac_power = true;
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else
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adev->pm.ac_power = false;
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if (adev->powerplay.pp_funcs->enable_bapm)
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if (adev->powerplay.pp_funcs &&
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adev->powerplay.pp_funcs->enable_bapm)
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amdgpu_dpm_enable_bapm(adev, adev->pm.ac_power);
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mutex_unlock(&adev->pm.mutex);
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}
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|
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|
@ -983,6 +983,32 @@ static int init_thermal_controller(
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struct pp_hwmgr *hwmgr,
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const ATOM_PPLIB_POWERPLAYTABLE *powerplay_table)
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{
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hwmgr->thermal_controller.ucType =
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powerplay_table->sThermalController.ucType;
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hwmgr->thermal_controller.ucI2cLine =
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powerplay_table->sThermalController.ucI2cLine;
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hwmgr->thermal_controller.ucI2cAddress =
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powerplay_table->sThermalController.ucI2cAddress;
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hwmgr->thermal_controller.fanInfo.bNoFan =
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(0 != (powerplay_table->sThermalController.ucFanParameters &
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ATOM_PP_FANPARAMETERS_NOFAN));
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hwmgr->thermal_controller.fanInfo.ucTachometerPulsesPerRevolution =
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powerplay_table->sThermalController.ucFanParameters &
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ATOM_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK;
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hwmgr->thermal_controller.fanInfo.ulMinRPM
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= powerplay_table->sThermalController.ucFanMinRPM * 100UL;
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hwmgr->thermal_controller.fanInfo.ulMaxRPM
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= powerplay_table->sThermalController.ucFanMaxRPM * 100UL;
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set_hw_cap(hwmgr,
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ATOM_PP_THERMALCONTROLLER_NONE != hwmgr->thermal_controller.ucType,
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PHM_PlatformCaps_ThermalController);
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hwmgr->thermal_controller.use_hw_fan_control = 1;
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return 0;
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}
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@ -321,7 +321,12 @@ drm_setclientcap(struct drm_device *dev, void *data, struct drm_file *file_priv)
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case DRM_CLIENT_CAP_ATOMIC:
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if (!drm_core_check_feature(dev, DRIVER_ATOMIC))
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return -EINVAL;
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if (req->value > 1)
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/* The modesetting DDX has a totally broken idea of atomic. */
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if (current->comm[0] == 'X' && req->value == 1) {
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pr_info("broken atomic modeset userspace detected, disabling atomic\n");
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return -EOPNOTSUPP;
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}
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if (req->value > 2)
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return -EINVAL;
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file_priv->atomic = req->value;
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file_priv->universal_planes = req->value;
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@ -397,7 +397,7 @@ int intel_lpss_probe(struct device *dev,
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if (!lpss)
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return -ENOMEM;
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lpss->priv = devm_ioremap(dev, info->mem->start + LPSS_PRIV_OFFSET,
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lpss->priv = devm_ioremap_uc(dev, info->mem->start + LPSS_PRIV_OFFSET,
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LPSS_PRIV_SIZE);
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if (!lpss->priv)
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return -ENOMEM;
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@ -677,7 +677,8 @@ static struct sk_buff *bcm_sysport_rx_refill(struct bcm_sysport_priv *priv,
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dma_addr_t mapping;
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/* Allocate a new SKB for a new packet */
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skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH);
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skb = __netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH,
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GFP_ATOMIC | __GFP_NOWARN);
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if (!skb) {
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priv->mib.alloc_rx_buff_failed++;
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netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
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@ -1699,7 +1699,8 @@ static struct sk_buff *bcmgenet_rx_refill(struct bcmgenet_priv *priv,
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dma_addr_t mapping;
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/* Allocate a new Rx skb */
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skb = netdev_alloc_skb(priv->dev, priv->rx_buf_len + SKB_ALIGNMENT);
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skb = __netdev_alloc_skb(priv->dev, priv->rx_buf_len + SKB_ALIGNMENT,
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GFP_ATOMIC | __GFP_NOWARN);
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if (!skb) {
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priv->mib.alloc_rx_buff_failed++;
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netif_err(priv, rx_err, priv->dev,
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@ -274,16 +274,19 @@ static int socfpga_dwmac_set_phy_mode(struct socfpga_dwmac *dwmac)
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phymode == PHY_INTERFACE_MODE_MII ||
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phymode == PHY_INTERFACE_MODE_GMII ||
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phymode == PHY_INTERFACE_MODE_SGMII) {
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ctrl |= SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK << (reg_shift / 2);
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regmap_read(sys_mgr_base_addr, SYSMGR_FPGAGRP_MODULE_REG,
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&module);
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module |= (SYSMGR_FPGAGRP_MODULE_EMAC << (reg_shift / 2));
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regmap_write(sys_mgr_base_addr, SYSMGR_FPGAGRP_MODULE_REG,
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module);
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} else {
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ctrl &= ~(SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK << (reg_shift / 2));
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}
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if (dwmac->f2h_ptp_ref_clk)
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ctrl |= SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK << (reg_shift / 2);
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else
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ctrl &= ~(SYSMGR_EMACGRP_CTRL_PTP_REF_CLK_MASK <<
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(reg_shift / 2));
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regmap_write(sys_mgr_base_addr, reg_offset, ctrl);
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/* Deassert reset for the phy configuration to be sampled by
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|
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@ -36,12 +36,16 @@ static void config_sub_second_increment(void __iomem *ioaddr,
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unsigned long data;
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u32 reg_value;
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/* For GMAC3.x, 4.x versions, convert the ptp_clock to nano second
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* formula = (1/ptp_clock) * 1000000000
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* where ptp_clock is 50MHz if fine method is used to update system
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/* For GMAC3.x, 4.x versions, in "fine adjustement mode" set sub-second
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* increment to twice the number of nanoseconds of a clock cycle.
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* The calculation of the default_addend value by the caller will set it
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* to mid-range = 2^31 when the remainder of this division is zero,
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* which will make the accumulator overflow once every 2 ptp_clock
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* cycles, adding twice the number of nanoseconds of a clock cycle :
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* 2000000000ULL / ptp_clock.
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*/
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if (value & PTP_TCR_TSCFUPDT)
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data = (1000000000ULL / 50000000);
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data = (2000000000ULL / ptp_clock);
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else
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data = (1000000000ULL / ptp_clock);
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|
|
|
@ -354,6 +354,7 @@ out:
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usb_autopm_put_interface(i2400mu->usb_iface);
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d_fnend(8, dev, "(i2400m %p ack %p size %zu) = %ld\n",
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i2400m, ack, ack_size, (long) result);
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usb_put_urb(¬if_urb);
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return result;
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error_exceeded:
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|
|
|
@ -128,7 +128,7 @@ static int gpd_pocket_fan_probe(struct platform_device *pdev)
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for (i = 0; i < ARRAY_SIZE(temp_limits); i++) {
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if (temp_limits[i] < 20000 || temp_limits[i] > 90000) {
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dev_err(&pdev->dev, "Invalid temp-limit %d (must be between 40000 and 70000)\n",
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dev_err(&pdev->dev, "Invalid temp-limit %d (must be between 20000 and 90000)\n",
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temp_limits[i]);
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temp_limits[0] = TEMP_LIMIT0_DEFAULT;
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temp_limits[1] = TEMP_LIMIT1_DEFAULT;
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|
|
|
@ -300,6 +300,10 @@
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#define DWC3_GTXFIFOSIZ_TXFDEF(n) ((n) & 0xffff)
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#define DWC3_GTXFIFOSIZ_TXFSTADDR(n) ((n) & 0xffff0000)
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/* Global RX Fifo Size Register */
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#define DWC31_GRXFIFOSIZ_RXFDEP(n) ((n) & 0x7fff) /* DWC_usb31 only */
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#define DWC3_GRXFIFOSIZ_RXFDEP(n) ((n) & 0xffff)
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/* Global Event Size Registers */
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#define DWC3_GEVNTSIZ_INTMASK BIT(31)
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#define DWC3_GEVNTSIZ_SIZE(n) ((n) & 0xffff)
|
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|
|
|
@ -2032,7 +2032,6 @@ static int dwc3_gadget_init_in_endpoint(struct dwc3_ep *dep)
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{
|
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struct dwc3 *dwc = dep->dwc;
|
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int mdwidth;
|
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int kbytes;
|
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int size;
|
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|
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mdwidth = DWC3_MDWIDTH(dwc->hwparams.hwparams0);
|
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|
@ -2048,17 +2047,17 @@ static int dwc3_gadget_init_in_endpoint(struct dwc3_ep *dep)
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/* FIFO Depth is in MDWDITH bytes. Multiply */
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size *= mdwidth;
|
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|
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kbytes = size / 1024;
|
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if (kbytes == 0)
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kbytes = 1;
|
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|
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/*
|
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* FIFO sizes account an extra MDWIDTH * (kbytes + 1) bytes for
|
||||
* internal overhead. We don't really know how these are used,
|
||||
* but documentation say it exists.
|
||||
* To meet performance requirement, a minimum TxFIFO size of 3x
|
||||
* MaxPacketSize is recommended for endpoints that support burst and a
|
||||
* minimum TxFIFO size of 2x MaxPacketSize for endpoints that don't
|
||||
* support burst. Use those numbers and we can calculate the max packet
|
||||
* limit as below.
|
||||
*/
|
||||
size -= mdwidth * (kbytes + 1);
|
||||
size /= kbytes;
|
||||
if (dwc->maximum_speed >= USB_SPEED_SUPER)
|
||||
size /= 3;
|
||||
else
|
||||
size /= 2;
|
||||
|
||||
usb_ep_set_maxpacket_limit(&dep->endpoint, size);
|
||||
|
||||
|
@ -2076,8 +2075,39 @@ static int dwc3_gadget_init_in_endpoint(struct dwc3_ep *dep)
|
|||
static int dwc3_gadget_init_out_endpoint(struct dwc3_ep *dep)
|
||||
{
|
||||
struct dwc3 *dwc = dep->dwc;
|
||||
int mdwidth;
|
||||
int size;
|
||||
|
||||
usb_ep_set_maxpacket_limit(&dep->endpoint, 1024);
|
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mdwidth = DWC3_MDWIDTH(dwc->hwparams.hwparams0);
|
||||
|
||||
/* MDWIDTH is represented in bits, convert to bytes */
|
||||
mdwidth /= 8;
|
||||
|
||||
/* All OUT endpoints share a single RxFIFO space */
|
||||
size = dwc3_readl(dwc->regs, DWC3_GRXFIFOSIZ(0));
|
||||
if (dwc3_is_usb31(dwc))
|
||||
size = DWC31_GRXFIFOSIZ_RXFDEP(size);
|
||||
else
|
||||
size = DWC3_GRXFIFOSIZ_RXFDEP(size);
|
||||
|
||||
/* FIFO depth is in MDWDITH bytes */
|
||||
size *= mdwidth;
|
||||
|
||||
/*
|
||||
* To meet performance requirement, a minimum recommended RxFIFO size
|
||||
* is defined as follow:
|
||||
* RxFIFO size >= (3 x MaxPacketSize) +
|
||||
* (3 x 8 bytes setup packets size) + (16 bytes clock crossing margin)
|
||||
*
|
||||
* Then calculate the max packet limit as below.
|
||||
*/
|
||||
size -= (3 * 8) + 16;
|
||||
if (size < 0)
|
||||
size = 0;
|
||||
else
|
||||
size /= 3;
|
||||
|
||||
usb_ep_set_maxpacket_limit(&dep->endpoint, size);
|
||||
dep->endpoint.max_streams = 15;
|
||||
dep->endpoint.ops = &dwc3_gadget_ep_ops;
|
||||
list_add_tail(&dep->endpoint.ep_list,
|
||||
|
|
|
@ -499,6 +499,11 @@ static int vhost_vsock_start(struct vhost_vsock *vsock)
|
|||
mutex_unlock(&vq->mutex);
|
||||
}
|
||||
|
||||
/* Some packets may have been queued before the device was started,
|
||||
* let's kick the send worker to send them.
|
||||
*/
|
||||
vhost_work_queue(&vsock->dev, &vsock->send_pkt_work);
|
||||
|
||||
mutex_unlock(&vsock->dev.mutex);
|
||||
return 0;
|
||||
|
||||
|
|
|
@ -353,8 +353,10 @@ static int reconn_set_ipaddr(struct TCP_Server_Info *server)
|
|||
return rc;
|
||||
}
|
||||
|
||||
spin_lock(&cifs_tcp_ses_lock);
|
||||
rc = cifs_convert_address((struct sockaddr *)&server->dstaddr, ipaddr,
|
||||
strlen(ipaddr));
|
||||
spin_unlock(&cifs_tcp_ses_lock);
|
||||
kfree(ipaddr);
|
||||
|
||||
return !rc ? -1 : 0;
|
||||
|
|
|
@ -622,6 +622,15 @@ static inline bool ieee80211_is_qos_nullfunc(__le16 fc)
|
|||
cpu_to_le16(IEEE80211_FTYPE_DATA | IEEE80211_STYPE_QOS_NULLFUNC);
|
||||
}
|
||||
|
||||
/**
|
||||
* ieee80211_is_any_nullfunc - check if frame is regular or QoS nullfunc frame
|
||||
* @fc: frame control bytes in little-endian byteorder
|
||||
*/
|
||||
static inline bool ieee80211_is_any_nullfunc(__le16 fc)
|
||||
{
|
||||
return (ieee80211_is_nullfunc(fc) || ieee80211_is_qos_nullfunc(fc));
|
||||
}
|
||||
|
||||
/**
|
||||
* ieee80211_is_bufferable_mmpdu - check if frame is bufferable MMPDU
|
||||
* @fc: frame control field in little-endian byteorder
|
||||
|
|
|
@ -75,6 +75,8 @@ static inline void devm_ioport_unmap(struct device *dev, void __iomem *addr)
|
|||
|
||||
void __iomem *devm_ioremap(struct device *dev, resource_size_t offset,
|
||||
resource_size_t size);
|
||||
void __iomem *devm_ioremap_uc(struct device *dev, resource_size_t offset,
|
||||
resource_size_t size);
|
||||
void __iomem *devm_ioremap_nocache(struct device *dev, resource_size_t offset,
|
||||
resource_size_t size);
|
||||
void __iomem *devm_ioremap_wc(struct device *dev, resource_size_t offset,
|
||||
|
|
19
lib/devres.c
19
lib/devres.c
|
@ -9,6 +9,7 @@
|
|||
enum devm_ioremap_type {
|
||||
DEVM_IOREMAP = 0,
|
||||
DEVM_IOREMAP_NC,
|
||||
DEVM_IOREMAP_UC,
|
||||
DEVM_IOREMAP_WC,
|
||||
};
|
||||
|
||||
|
@ -39,6 +40,9 @@ static void __iomem *__devm_ioremap(struct device *dev, resource_size_t offset,
|
|||
case DEVM_IOREMAP_NC:
|
||||
addr = ioremap_nocache(offset, size);
|
||||
break;
|
||||
case DEVM_IOREMAP_UC:
|
||||
addr = ioremap_uc(offset, size);
|
||||
break;
|
||||
case DEVM_IOREMAP_WC:
|
||||
addr = ioremap_wc(offset, size);
|
||||
break;
|
||||
|
@ -68,6 +72,21 @@ void __iomem *devm_ioremap(struct device *dev, resource_size_t offset,
|
|||
}
|
||||
EXPORT_SYMBOL(devm_ioremap);
|
||||
|
||||
/**
|
||||
* devm_ioremap_uc - Managed ioremap_uc()
|
||||
* @dev: Generic device to remap IO address for
|
||||
* @offset: Resource address to map
|
||||
* @size: Size of map
|
||||
*
|
||||
* Managed ioremap_uc(). Map is automatically unmapped on driver detach.
|
||||
*/
|
||||
void __iomem *devm_ioremap_uc(struct device *dev, resource_size_t offset,
|
||||
resource_size_t size)
|
||||
{
|
||||
return __devm_ioremap(dev, offset, size, DEVM_IOREMAP_UC);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(devm_ioremap_uc);
|
||||
|
||||
/**
|
||||
* devm_ioremap_nocache - Managed ioremap_nocache()
|
||||
* @dev: Generic device to remap IO address for
|
||||
|
|
|
@ -756,22 +756,22 @@ do { \
|
|||
do { \
|
||||
if (__builtin_constant_p(bh) && (bh) == 0) \
|
||||
__asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{aze|addze} %0,%2" \
|
||||
: "=r" ((USItype)(sh)), \
|
||||
"=&r" ((USItype)(sl)) \
|
||||
: "=r" (sh), \
|
||||
"=&r" (sl) \
|
||||
: "%r" ((USItype)(ah)), \
|
||||
"%r" ((USItype)(al)), \
|
||||
"rI" ((USItype)(bl))); \
|
||||
else if (__builtin_constant_p(bh) && (bh) == ~(USItype) 0) \
|
||||
__asm__ ("{a%I4|add%I4c} %1,%3,%4\n\t{ame|addme} %0,%2" \
|
||||
: "=r" ((USItype)(sh)), \
|
||||
"=&r" ((USItype)(sl)) \
|
||||
: "=r" (sh), \
|
||||
"=&r" (sl) \
|
||||
: "%r" ((USItype)(ah)), \
|
||||
"%r" ((USItype)(al)), \
|
||||
"rI" ((USItype)(bl))); \
|
||||
else \
|
||||
__asm__ ("{a%I5|add%I5c} %1,%4,%5\n\t{ae|adde} %0,%2,%3" \
|
||||
: "=r" ((USItype)(sh)), \
|
||||
"=&r" ((USItype)(sl)) \
|
||||
: "=r" (sh), \
|
||||
"=&r" (sl) \
|
||||
: "%r" ((USItype)(ah)), \
|
||||
"r" ((USItype)(bh)), \
|
||||
"%r" ((USItype)(al)), \
|
||||
|
@ -781,36 +781,36 @@ do { \
|
|||
do { \
|
||||
if (__builtin_constant_p(ah) && (ah) == 0) \
|
||||
__asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfze|subfze} %0,%2" \
|
||||
: "=r" ((USItype)(sh)), \
|
||||
"=&r" ((USItype)(sl)) \
|
||||
: "=r" (sh), \
|
||||
"=&r" (sl) \
|
||||
: "r" ((USItype)(bh)), \
|
||||
"rI" ((USItype)(al)), \
|
||||
"r" ((USItype)(bl))); \
|
||||
else if (__builtin_constant_p(ah) && (ah) == ~(USItype) 0) \
|
||||
__asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{sfme|subfme} %0,%2" \
|
||||
: "=r" ((USItype)(sh)), \
|
||||
"=&r" ((USItype)(sl)) \
|
||||
: "=r" (sh), \
|
||||
"=&r" (sl) \
|
||||
: "r" ((USItype)(bh)), \
|
||||
"rI" ((USItype)(al)), \
|
||||
"r" ((USItype)(bl))); \
|
||||
else if (__builtin_constant_p(bh) && (bh) == 0) \
|
||||
__asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{ame|addme} %0,%2" \
|
||||
: "=r" ((USItype)(sh)), \
|
||||
"=&r" ((USItype)(sl)) \
|
||||
: "=r" (sh), \
|
||||
"=&r" (sl) \
|
||||
: "r" ((USItype)(ah)), \
|
||||
"rI" ((USItype)(al)), \
|
||||
"r" ((USItype)(bl))); \
|
||||
else if (__builtin_constant_p(bh) && (bh) == ~(USItype) 0) \
|
||||
__asm__ ("{sf%I3|subf%I3c} %1,%4,%3\n\t{aze|addze} %0,%2" \
|
||||
: "=r" ((USItype)(sh)), \
|
||||
"=&r" ((USItype)(sl)) \
|
||||
: "=r" (sh), \
|
||||
"=&r" (sl) \
|
||||
: "r" ((USItype)(ah)), \
|
||||
"rI" ((USItype)(al)), \
|
||||
"r" ((USItype)(bl))); \
|
||||
else \
|
||||
__asm__ ("{sf%I4|subf%I4c} %1,%5,%4\n\t{sfe|subfe} %0,%3,%2" \
|
||||
: "=r" ((USItype)(sh)), \
|
||||
"=&r" ((USItype)(sl)) \
|
||||
: "=r" (sh), \
|
||||
"=&r" (sl) \
|
||||
: "r" ((USItype)(ah)), \
|
||||
"r" ((USItype)(bh)), \
|
||||
"rI" ((USItype)(al)), \
|
||||
|
@ -821,7 +821,7 @@ do { \
|
|||
do { \
|
||||
USItype __m0 = (m0), __m1 = (m1); \
|
||||
__asm__ ("mulhwu %0,%1,%2" \
|
||||
: "=r" ((USItype) ph) \
|
||||
: "=r" (ph) \
|
||||
: "%r" (__m0), \
|
||||
"r" (__m1)); \
|
||||
(pl) = __m0 * __m1; \
|
||||
|
|
|
@ -131,10 +131,8 @@ static int write_classid(struct cgroup_subsys_state *css, struct cftype *cft,
|
|||
cs->classid = (u32)value;
|
||||
|
||||
css_task_iter_start(css, 0, &it);
|
||||
while ((p = css_task_iter_next(&it))) {
|
||||
while ((p = css_task_iter_next(&it)))
|
||||
update_classid_task(p, cs->classid);
|
||||
cond_resched();
|
||||
}
|
||||
css_task_iter_end(&it);
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -2384,7 +2384,7 @@ void ieee80211_sta_tx_notify(struct ieee80211_sub_if_data *sdata,
|
|||
if (!ieee80211_is_data(hdr->frame_control))
|
||||
return;
|
||||
|
||||
if (ieee80211_is_nullfunc(hdr->frame_control) &&
|
||||
if (ieee80211_is_any_nullfunc(hdr->frame_control) &&
|
||||
sdata->u.mgd.probe_send_count > 0) {
|
||||
if (ack)
|
||||
ieee80211_sta_reset_conn_monitor(sdata);
|
||||
|
|
|
@ -1373,8 +1373,7 @@ ieee80211_rx_h_check_dup(struct ieee80211_rx_data *rx)
|
|||
return RX_CONTINUE;
|
||||
|
||||
if (ieee80211_is_ctl(hdr->frame_control) ||
|
||||
ieee80211_is_nullfunc(hdr->frame_control) ||
|
||||
ieee80211_is_qos_nullfunc(hdr->frame_control) ||
|
||||
ieee80211_is_any_nullfunc(hdr->frame_control) ||
|
||||
is_multicast_ether_addr(hdr->addr1))
|
||||
return RX_CONTINUE;
|
||||
|
||||
|
@ -1753,8 +1752,7 @@ ieee80211_rx_h_sta_process(struct ieee80211_rx_data *rx)
|
|||
* Drop (qos-)data::nullfunc frames silently, since they
|
||||
* are used only to control station power saving mode.
|
||||
*/
|
||||
if (ieee80211_is_nullfunc(hdr->frame_control) ||
|
||||
ieee80211_is_qos_nullfunc(hdr->frame_control)) {
|
||||
if (ieee80211_is_any_nullfunc(hdr->frame_control)) {
|
||||
I802_DEBUG_INC(rx->local->rx_handlers_drop_nullfunc);
|
||||
|
||||
/*
|
||||
|
@ -2244,7 +2242,7 @@ static int ieee80211_drop_unencrypted(struct ieee80211_rx_data *rx, __le16 fc)
|
|||
|
||||
/* Drop unencrypted frames if key is set. */
|
||||
if (unlikely(!ieee80211_has_protected(fc) &&
|
||||
!ieee80211_is_nullfunc(fc) &&
|
||||
!ieee80211_is_any_nullfunc(fc) &&
|
||||
ieee80211_is_data(fc) && rx->key))
|
||||
return -EACCES;
|
||||
|
||||
|
|
|
@ -491,8 +491,7 @@ static void ieee80211_report_ack_skb(struct ieee80211_local *local,
|
|||
rcu_read_lock();
|
||||
sdata = ieee80211_sdata_from_skb(local, skb);
|
||||
if (sdata) {
|
||||
if (ieee80211_is_nullfunc(hdr->frame_control) ||
|
||||
ieee80211_is_qos_nullfunc(hdr->frame_control))
|
||||
if (ieee80211_is_any_nullfunc(hdr->frame_control))
|
||||
cfg80211_probe_status(sdata->dev, hdr->addr1,
|
||||
cookie, acked,
|
||||
info->status.ack_signal,
|
||||
|
@ -871,7 +870,7 @@ static void __ieee80211_tx_status(struct ieee80211_hw *hw,
|
|||
I802_DEBUG_INC(local->dot11FailedCount);
|
||||
}
|
||||
|
||||
if ((ieee80211_is_nullfunc(fc) || ieee80211_is_qos_nullfunc(fc)) &&
|
||||
if (ieee80211_is_any_nullfunc(fc) &&
|
||||
ieee80211_has_pm(fc) &&
|
||||
ieee80211_hw_check(&local->hw, REPORTS_TX_ACK_STATUS) &&
|
||||
!(info->flags & IEEE80211_TX_CTL_INJECTED) &&
|
||||
|
|
|
@ -300,7 +300,7 @@ ieee80211_tx_h_check_assoc(struct ieee80211_tx_data *tx)
|
|||
if (unlikely(test_bit(SCAN_SW_SCANNING, &tx->local->scanning)) &&
|
||||
test_bit(SDATA_STATE_OFFCHANNEL, &tx->sdata->state) &&
|
||||
!ieee80211_is_probe_req(hdr->frame_control) &&
|
||||
!ieee80211_is_nullfunc(hdr->frame_control))
|
||||
!ieee80211_is_any_nullfunc(hdr->frame_control))
|
||||
/*
|
||||
* When software scanning only nullfunc frames (to notify
|
||||
* the sleep state to the AP) and probe requests (for the
|
||||
|
|
|
@ -871,7 +871,11 @@ struct sctp_chunk *sctp_make_shutdown(const struct sctp_association *asoc,
|
|||
struct sctp_chunk *retval;
|
||||
__u32 ctsn;
|
||||
|
||||
ctsn = sctp_tsnmap_get_ctsn(&asoc->peer.tsn_map);
|
||||
if (chunk && chunk->asoc)
|
||||
ctsn = sctp_tsnmap_get_ctsn(&chunk->asoc->peer.tsn_map);
|
||||
else
|
||||
ctsn = sctp_tsnmap_get_ctsn(&asoc->peer.tsn_map);
|
||||
|
||||
shut.cum_tsn_ack = htonl(ctsn);
|
||||
|
||||
retval = sctp_make_control(asoc, SCTP_CID_SHUTDOWN, 0,
|
||||
|
|
|
@ -7,6 +7,9 @@ myname=${0##*/}
|
|||
# If no prefix forced, use the default CONFIG_
|
||||
CONFIG_="${CONFIG_-CONFIG_}"
|
||||
|
||||
# We use an uncommon delimiter for sed substitutions
|
||||
SED_DELIM=$(echo -en "\001")
|
||||
|
||||
usage() {
|
||||
cat >&2 <<EOL
|
||||
Manipulate options in a .config file from the command line.
|
||||
|
@ -83,7 +86,7 @@ txt_subst() {
|
|||
local infile="$3"
|
||||
local tmpfile="$infile.swp"
|
||||
|
||||
sed -e "s:$before:$after:" "$infile" >"$tmpfile"
|
||||
sed -e "s$SED_DELIM$before$SED_DELIM$after$SED_DELIM" "$infile" >"$tmpfile"
|
||||
# replace original file with the edited one
|
||||
mv "$tmpfile" "$infile"
|
||||
}
|
||||
|
|
|
@ -2214,9 +2214,10 @@ static const struct hdac_io_ops pci_hda_io_ops = {
|
|||
* some HD-audio PCI entries are exposed without any codecs, and such devices
|
||||
* should be ignored from the beginning.
|
||||
*/
|
||||
static const struct snd_pci_quirk driver_blacklist[] = {
|
||||
SND_PCI_QUIRK(0x1462, 0xcb59, "MSI TRX40 Creator", 0),
|
||||
SND_PCI_QUIRK(0x1462, 0xcb60, "MSI TRX40", 0),
|
||||
static const struct pci_device_id driver_blacklist[] = {
|
||||
{ PCI_DEVICE_SUB(0x1022, 0x1487, 0x1043, 0x874f) }, /* ASUS ROG Zenith II / Strix */
|
||||
{ PCI_DEVICE_SUB(0x1022, 0x1487, 0x1462, 0xcb59) }, /* MSI TRX40 Creator */
|
||||
{ PCI_DEVICE_SUB(0x1022, 0x1487, 0x1462, 0xcb60) }, /* MSI TRX40 */
|
||||
{}
|
||||
};
|
||||
|
||||
|
@ -2239,7 +2240,7 @@ static int azx_probe(struct pci_dev *pci,
|
|||
bool schedule_probe;
|
||||
int err;
|
||||
|
||||
if (snd_pci_quirk_lookup(pci, driver_blacklist)) {
|
||||
if (pci_match_id(driver_blacklist, pci)) {
|
||||
dev_info(&pci->dev, "Skipping the blacklisted device\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
|
|
@ -148,14 +148,14 @@ static struct hdac_hdmi_pcm *
|
|||
hdac_hdmi_get_pcm_from_cvt(struct hdac_hdmi_priv *hdmi,
|
||||
struct hdac_hdmi_cvt *cvt)
|
||||
{
|
||||
struct hdac_hdmi_pcm *pcm = NULL;
|
||||
struct hdac_hdmi_pcm *pcm;
|
||||
|
||||
list_for_each_entry(pcm, &hdmi->pcm_list, head) {
|
||||
if (pcm->cvt == cvt)
|
||||
break;
|
||||
return pcm;
|
||||
}
|
||||
|
||||
return pcm;
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static void hdac_hdmi_jack_report(struct hdac_hdmi_pcm *pcm,
|
||||
|
|
|
@ -1633,6 +1633,40 @@ static int sgtl5000_i2c_probe(struct i2c_client *client,
|
|||
dev_err(&client->dev,
|
||||
"Error %d initializing CHIP_CLK_CTRL\n", ret);
|
||||
|
||||
/* Mute everything to avoid pop from the following power-up */
|
||||
ret = regmap_write(sgtl5000->regmap, SGTL5000_CHIP_ANA_CTRL,
|
||||
SGTL5000_CHIP_ANA_CTRL_DEFAULT);
|
||||
if (ret) {
|
||||
dev_err(&client->dev,
|
||||
"Error %d muting outputs via CHIP_ANA_CTRL\n", ret);
|
||||
goto disable_clk;
|
||||
}
|
||||
|
||||
/*
|
||||
* If VAG is powered-on (e.g. from previous boot), it would be disabled
|
||||
* by the write to ANA_POWER in later steps of the probe code. This
|
||||
* may create a loud pop even with all outputs muted. The proper way
|
||||
* to circumvent this is disabling the bit first and waiting the proper
|
||||
* cool-down time.
|
||||
*/
|
||||
ret = regmap_read(sgtl5000->regmap, SGTL5000_CHIP_ANA_POWER, &value);
|
||||
if (ret) {
|
||||
dev_err(&client->dev, "Failed to read ANA_POWER: %d\n", ret);
|
||||
goto disable_clk;
|
||||
}
|
||||
if (value & SGTL5000_VAG_POWERUP) {
|
||||
ret = regmap_update_bits(sgtl5000->regmap,
|
||||
SGTL5000_CHIP_ANA_POWER,
|
||||
SGTL5000_VAG_POWERUP,
|
||||
0);
|
||||
if (ret) {
|
||||
dev_err(&client->dev, "Error %d disabling VAG\n", ret);
|
||||
goto disable_clk;
|
||||
}
|
||||
|
||||
msleep(SGTL5000_VAG_POWERDOWN_DELAY);
|
||||
}
|
||||
|
||||
/* Follow section 2.2.1.1 of AN3663 */
|
||||
ana_pwr = SGTL5000_ANA_POWER_DEFAULT;
|
||||
if (sgtl5000->num_supplies <= VDDD) {
|
||||
|
|
|
@ -233,6 +233,7 @@
|
|||
/*
|
||||
* SGTL5000_CHIP_ANA_CTRL
|
||||
*/
|
||||
#define SGTL5000_CHIP_ANA_CTRL_DEFAULT 0x0133
|
||||
#define SGTL5000_LINE_OUT_MUTE 0x0100
|
||||
#define SGTL5000_HP_SEL_MASK 0x0040
|
||||
#define SGTL5000_HP_SEL_SHIFT 6
|
||||
|
|
|
@ -566,10 +566,16 @@ static int rsnd_ssi_stop(struct rsnd_mod *mod,
|
|||
* Capture: It might not receave data. Do nothing
|
||||
*/
|
||||
if (rsnd_io_is_play(io)) {
|
||||
rsnd_mod_write(mod, SSICR, cr | EN);
|
||||
rsnd_mod_write(mod, SSICR, cr | ssi->cr_en);
|
||||
rsnd_ssi_status_check(mod, DIRQ);
|
||||
}
|
||||
|
||||
/* In multi-SSI mode, stop is performed by setting ssi0129 in
|
||||
* SSI_CONTROL to 0 (in rsnd_ssio_stop_gen2). Do nothing here.
|
||||
*/
|
||||
if (rsnd_ssi_multi_slaves_runtime(io))
|
||||
return 0;
|
||||
|
||||
/*
|
||||
* disable SSI,
|
||||
* and, wait idle state
|
||||
|
@ -674,6 +680,9 @@ static void rsnd_ssi_parent_attach(struct rsnd_mod *mod,
|
|||
if (!rsnd_rdai_is_clk_master(rdai))
|
||||
return;
|
||||
|
||||
if (rsnd_ssi_is_multi_slave(mod, io))
|
||||
return;
|
||||
|
||||
switch (rsnd_mod_id(mod)) {
|
||||
case 1:
|
||||
case 2:
|
||||
|
|
|
@ -172,7 +172,7 @@ static int rsnd_ssiu_init_gen2(struct rsnd_mod *mod,
|
|||
i;
|
||||
|
||||
for_each_rsnd_mod_array(i, pos, io, rsnd_ssi_array) {
|
||||
shift = (i * 4) + 16;
|
||||
shift = (i * 4) + 20;
|
||||
val = (val & ~(0xF << shift)) |
|
||||
rsnd_mod_id(pos) << shift;
|
||||
}
|
||||
|
|
|
@ -1923,7 +1923,9 @@ static int soc_tplg_pcm_elems_load(struct soc_tplg *tplg,
|
|||
_pcm = pcm;
|
||||
} else {
|
||||
abi_match = false;
|
||||
pcm_new_ver(tplg, pcm, &_pcm);
|
||||
ret = pcm_new_ver(tplg, pcm, &_pcm);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* create the FE DAIs and DAI links */
|
||||
|
|
|
@ -137,7 +137,7 @@ int dump_queue(struct msgque_data *msgque)
|
|||
for (kern_id = 0; kern_id < 256; kern_id++) {
|
||||
ret = msgctl(kern_id, MSG_STAT, &ds);
|
||||
if (ret < 0) {
|
||||
if (errno == -EINVAL)
|
||||
if (errno == EINVAL)
|
||||
continue;
|
||||
printf("Failed to get stats for IPC queue with id %d\n",
|
||||
kern_id);
|
||||
|
|
Loading…
Reference in a new issue