Merge branch 'can/at91-sam9x5' of git://git.pengutronix.de/git/mkl/linux-2.6
This commit is contained in:
David S. Miller
commit
cb2bad862e
2 changed files with 259 additions and 112 deletions
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@ -58,9 +58,10 @@ config CAN_CALC_BITTIMING
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config CAN_AT91
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tristate "Atmel AT91 onchip CAN controller"
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depends on CAN_DEV && ARCH_AT91SAM9263
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depends on CAN_DEV && (ARCH_AT91SAM9263 || ARCH_AT91SAM9X5)
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---help---
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This is a driver for the SoC CAN controller in Atmel's AT91SAM9263.
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This is a driver for the SoC CAN controller in Atmel's AT91SAM9263
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and AT91SAM9X5 processors.
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config CAN_TI_HECC
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depends on CAN_DEV && ARCH_OMAP3
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@ -41,32 +41,7 @@
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#include <mach/board.h>
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#define AT91_NAPI_WEIGHT 11
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/*
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* RX/TX Mailbox split
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* don't dare to touch
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*/
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#define AT91_MB_RX_NUM 11
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#define AT91_MB_TX_SHIFT 2
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#define AT91_MB_RX_FIRST 1
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#define AT91_MB_RX_LAST (AT91_MB_RX_FIRST + AT91_MB_RX_NUM - 1)
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#define AT91_MB_RX_MASK(i) ((1 << (i)) - 1)
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#define AT91_MB_RX_SPLIT 8
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#define AT91_MB_RX_LOW_LAST (AT91_MB_RX_SPLIT - 1)
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#define AT91_MB_RX_LOW_MASK (AT91_MB_RX_MASK(AT91_MB_RX_SPLIT) & \
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~AT91_MB_RX_MASK(AT91_MB_RX_FIRST))
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#define AT91_MB_TX_NUM (1 << AT91_MB_TX_SHIFT)
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#define AT91_MB_TX_FIRST (AT91_MB_RX_LAST + 1)
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#define AT91_MB_TX_LAST (AT91_MB_TX_FIRST + AT91_MB_TX_NUM - 1)
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#define AT91_NEXT_PRIO_SHIFT (AT91_MB_TX_SHIFT)
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#define AT91_NEXT_PRIO_MASK (0xf << AT91_MB_TX_SHIFT)
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#define AT91_NEXT_MB_MASK (AT91_MB_TX_NUM - 1)
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#define AT91_NEXT_MASK ((AT91_MB_TX_NUM - 1) | AT91_NEXT_PRIO_MASK)
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#define AT91_MB_MASK(i) ((1 << (i)) - 1)
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/* Common registers */
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enum at91_reg {
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@ -128,12 +103,6 @@ enum at91_mb_mode {
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};
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/* Interrupt mask bits */
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#define AT91_IRQ_MB_RX ((1 << (AT91_MB_RX_LAST + 1)) \
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- (1 << AT91_MB_RX_FIRST))
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#define AT91_IRQ_MB_TX ((1 << (AT91_MB_TX_LAST + 1)) \
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- (1 << AT91_MB_TX_FIRST))
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#define AT91_IRQ_MB_ALL (AT91_IRQ_MB_RX | AT91_IRQ_MB_TX)
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#define AT91_IRQ_ERRA (1 << 16)
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#define AT91_IRQ_WARN (1 << 17)
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#define AT91_IRQ_ERRP (1 << 18)
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@ -156,22 +125,51 @@ enum at91_mb_mode {
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#define AT91_IRQ_ALL (0x1fffffff)
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enum at91_devtype {
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AT91_DEVTYPE_SAM9263,
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AT91_DEVTYPE_SAM9X5,
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};
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struct at91_devtype_data {
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unsigned int rx_first;
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unsigned int rx_split;
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unsigned int rx_last;
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unsigned int tx_shift;
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enum at91_devtype type;
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};
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struct at91_priv {
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struct can_priv can; /* must be the first member! */
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struct net_device *dev;
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struct napi_struct napi;
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struct can_priv can; /* must be the first member! */
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struct net_device *dev;
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struct napi_struct napi;
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void __iomem *reg_base;
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void __iomem *reg_base;
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u32 reg_sr;
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unsigned int tx_next;
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unsigned int tx_echo;
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unsigned int rx_next;
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u32 reg_sr;
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unsigned int tx_next;
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unsigned int tx_echo;
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unsigned int rx_next;
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struct at91_devtype_data devtype_data;
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struct clk *clk;
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struct at91_can_data *pdata;
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struct clk *clk;
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struct at91_can_data *pdata;
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canid_t mb0_id;
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canid_t mb0_id;
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};
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static const struct at91_devtype_data at91_devtype_data[] __devinitconst = {
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[AT91_DEVTYPE_SAM9263] = {
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.rx_first = 1,
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.rx_split = 8,
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.rx_last = 11,
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.tx_shift = 2,
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},
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[AT91_DEVTYPE_SAM9X5] = {
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.rx_first = 0,
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.rx_split = 4,
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.rx_last = 5,
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.tx_shift = 1,
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},
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};
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static struct can_bittiming_const at91_bittiming_const = {
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@ -186,19 +184,111 @@ static struct can_bittiming_const at91_bittiming_const = {
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.brp_inc = 1,
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};
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static inline int get_tx_next_mb(const struct at91_priv *priv)
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{
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return (priv->tx_next & AT91_NEXT_MB_MASK) + AT91_MB_TX_FIRST;
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#define AT91_IS(_model) \
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static inline int at91_is_sam##_model(const struct at91_priv *priv) \
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{ \
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return priv->devtype_data.type == AT91_DEVTYPE_SAM##_model; \
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}
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static inline int get_tx_next_prio(const struct at91_priv *priv)
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AT91_IS(9263);
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AT91_IS(9X5);
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static inline unsigned int get_mb_rx_first(const struct at91_priv *priv)
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{
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return (priv->tx_next >> AT91_NEXT_PRIO_SHIFT) & 0xf;
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return priv->devtype_data.rx_first;
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}
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static inline int get_tx_echo_mb(const struct at91_priv *priv)
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static inline unsigned int get_mb_rx_last(const struct at91_priv *priv)
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{
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return (priv->tx_echo & AT91_NEXT_MB_MASK) + AT91_MB_TX_FIRST;
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return priv->devtype_data.rx_last;
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}
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static inline unsigned int get_mb_rx_split(const struct at91_priv *priv)
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{
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return priv->devtype_data.rx_split;
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}
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static inline unsigned int get_mb_rx_num(const struct at91_priv *priv)
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{
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return get_mb_rx_last(priv) - get_mb_rx_first(priv) + 1;
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}
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static inline unsigned int get_mb_rx_low_last(const struct at91_priv *priv)
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{
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return get_mb_rx_split(priv) - 1;
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}
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static inline unsigned int get_mb_rx_low_mask(const struct at91_priv *priv)
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{
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return AT91_MB_MASK(get_mb_rx_split(priv)) &
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~AT91_MB_MASK(get_mb_rx_first(priv));
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}
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static inline unsigned int get_mb_tx_shift(const struct at91_priv *priv)
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{
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return priv->devtype_data.tx_shift;
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}
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static inline unsigned int get_mb_tx_num(const struct at91_priv *priv)
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{
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return 1 << get_mb_tx_shift(priv);
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}
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static inline unsigned int get_mb_tx_first(const struct at91_priv *priv)
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{
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return get_mb_rx_last(priv) + 1;
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}
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static inline unsigned int get_mb_tx_last(const struct at91_priv *priv)
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{
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return get_mb_tx_first(priv) + get_mb_tx_num(priv) - 1;
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}
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static inline unsigned int get_next_prio_shift(const struct at91_priv *priv)
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{
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return get_mb_tx_shift(priv);
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}
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static inline unsigned int get_next_prio_mask(const struct at91_priv *priv)
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{
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return 0xf << get_mb_tx_shift(priv);
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}
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static inline unsigned int get_next_mb_mask(const struct at91_priv *priv)
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{
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return AT91_MB_MASK(get_mb_tx_shift(priv));
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}
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static inline unsigned int get_next_mask(const struct at91_priv *priv)
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{
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return get_next_mb_mask(priv) | get_next_prio_mask(priv);
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}
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static inline unsigned int get_irq_mb_rx(const struct at91_priv *priv)
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{
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return AT91_MB_MASK(get_mb_rx_last(priv) + 1) &
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~AT91_MB_MASK(get_mb_rx_first(priv));
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}
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static inline unsigned int get_irq_mb_tx(const struct at91_priv *priv)
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{
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return AT91_MB_MASK(get_mb_tx_last(priv) + 1) &
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~AT91_MB_MASK(get_mb_tx_first(priv));
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}
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static inline unsigned int get_tx_next_mb(const struct at91_priv *priv)
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{
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return (priv->tx_next & get_next_mb_mask(priv)) + get_mb_tx_first(priv);
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}
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static inline unsigned int get_tx_next_prio(const struct at91_priv *priv)
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{
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return (priv->tx_next >> get_next_prio_shift(priv)) & 0xf;
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}
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static inline unsigned int get_tx_echo_mb(const struct at91_priv *priv)
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{
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return (priv->tx_echo & get_next_mb_mask(priv)) + get_mb_tx_first(priv);
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}
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static inline u32 at91_read(const struct at91_priv *priv, enum at91_reg reg)
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@ -259,29 +349,29 @@ static void at91_setup_mailboxes(struct net_device *dev)
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* overflow.
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*/
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reg_mid = at91_can_id_to_reg_mid(priv->mb0_id);
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for (i = 0; i < AT91_MB_RX_FIRST; i++) {
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for (i = 0; i < get_mb_rx_first(priv); i++) {
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set_mb_mode(priv, i, AT91_MB_MODE_DISABLED);
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at91_write(priv, AT91_MID(i), reg_mid);
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at91_write(priv, AT91_MCR(i), 0x0); /* clear dlc */
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}
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for (i = AT91_MB_RX_FIRST; i < AT91_MB_RX_LAST; i++)
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for (i = get_mb_rx_first(priv); i < get_mb_rx_last(priv); i++)
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set_mb_mode(priv, i, AT91_MB_MODE_RX);
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set_mb_mode(priv, AT91_MB_RX_LAST, AT91_MB_MODE_RX_OVRWR);
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set_mb_mode(priv, get_mb_rx_last(priv), AT91_MB_MODE_RX_OVRWR);
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/* reset acceptance mask and id register */
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for (i = AT91_MB_RX_FIRST; i <= AT91_MB_RX_LAST; i++) {
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at91_write(priv, AT91_MAM(i), 0x0 );
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for (i = get_mb_rx_first(priv); i <= get_mb_rx_last(priv); i++) {
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at91_write(priv, AT91_MAM(i), 0x0);
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at91_write(priv, AT91_MID(i), AT91_MID_MIDE);
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}
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/* The last 4 mailboxes are used for transmitting. */
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for (i = AT91_MB_TX_FIRST; i <= AT91_MB_TX_LAST; i++)
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for (i = get_mb_tx_first(priv); i <= get_mb_tx_last(priv); i++)
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set_mb_mode_prio(priv, i, AT91_MB_MODE_TX, 0);
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/* Reset tx and rx helper pointers */
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priv->tx_next = priv->tx_echo = 0;
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priv->rx_next = AT91_MB_RX_FIRST;
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priv->rx_next = get_mb_rx_first(priv);
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}
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static int at91_set_bittiming(struct net_device *dev)
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@ -336,7 +426,7 @@ static void at91_chip_start(struct net_device *dev)
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priv->can.state = CAN_STATE_ERROR_ACTIVE;
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/* Enable interrupts */
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reg_ier = AT91_IRQ_MB_RX | AT91_IRQ_ERRP | AT91_IRQ_ERR_FRAME;
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reg_ier = get_irq_mb_rx(priv) | AT91_IRQ_ERRP | AT91_IRQ_ERR_FRAME;
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at91_write(priv, AT91_IDR, AT91_IRQ_ALL);
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at91_write(priv, AT91_IER, reg_ier);
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}
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@ -375,8 +465,8 @@ static void at91_chip_stop(struct net_device *dev, enum can_state state)
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* mailbox, but without the offset AT91_MB_TX_FIRST. The lower bits
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* encode the mailbox number, the upper 4 bits the mailbox priority:
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*
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* priv->tx_next = (prio << AT91_NEXT_PRIO_SHIFT) ||
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* (mb - AT91_MB_TX_FIRST);
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* priv->tx_next = (prio << get_next_prio_shift(priv)) |
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* (mb - get_mb_tx_first(priv));
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*
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*/
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static netdev_tx_t at91_start_xmit(struct sk_buff *skb, struct net_device *dev)
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@ -417,7 +507,7 @@ static netdev_tx_t at91_start_xmit(struct sk_buff *skb, struct net_device *dev)
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stats->tx_bytes += cf->can_dlc;
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/* _NOTE_: subtract AT91_MB_TX_FIRST offset from mb! */
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can_put_echo_skb(skb, dev, mb - AT91_MB_TX_FIRST);
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can_put_echo_skb(skb, dev, mb - get_mb_tx_first(priv));
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/*
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* we have to stop the queue and deliver all messages in case
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@ -430,7 +520,7 @@ static netdev_tx_t at91_start_xmit(struct sk_buff *skb, struct net_device *dev)
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priv->tx_next++;
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if (!(at91_read(priv, AT91_MSR(get_tx_next_mb(priv))) &
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AT91_MSR_MRDY) ||
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(priv->tx_next & AT91_NEXT_MASK) == 0)
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(priv->tx_next & get_next_mask(priv)) == 0)
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netif_stop_queue(dev);
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/* Enable interrupt for this mailbox */
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@ -447,7 +537,7 @@ static netdev_tx_t at91_start_xmit(struct sk_buff *skb, struct net_device *dev)
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*/
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static inline void at91_activate_rx_low(const struct at91_priv *priv)
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{
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u32 mask = AT91_MB_RX_LOW_MASK;
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u32 mask = get_mb_rx_low_mask(priv);
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at91_write(priv, AT91_TCR, mask);
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}
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@ -513,17 +603,19 @@ static void at91_read_mb(struct net_device *dev, unsigned int mb,
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cf->can_id = (reg_mid >> 18) & CAN_SFF_MASK;
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reg_msr = at91_read(priv, AT91_MSR(mb));
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if (reg_msr & AT91_MSR_MRTR)
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cf->can_id |= CAN_RTR_FLAG;
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cf->can_dlc = get_can_dlc((reg_msr >> 16) & 0xf);
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*(u32 *)(cf->data + 0) = at91_read(priv, AT91_MDL(mb));
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*(u32 *)(cf->data + 4) = at91_read(priv, AT91_MDH(mb));
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if (reg_msr & AT91_MSR_MRTR)
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cf->can_id |= CAN_RTR_FLAG;
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else {
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*(u32 *)(cf->data + 0) = at91_read(priv, AT91_MDL(mb));
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*(u32 *)(cf->data + 4) = at91_read(priv, AT91_MDH(mb));
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}
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/* allow RX of extended frames */
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at91_write(priv, AT91_MID(mb), AT91_MID_MIDE);
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if (unlikely(mb == AT91_MB_RX_LAST && reg_msr & AT91_MSR_MMI))
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if (unlikely(mb == get_mb_rx_last(priv) && reg_msr & AT91_MSR_MMI))
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at91_rx_overflow_err(dev);
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}
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@ -561,8 +653,9 @@ static void at91_read_msg(struct net_device *dev, unsigned int mb)
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*
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* Theory of Operation:
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*
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* 11 of the 16 mailboxes on the chip are reserved for RX. we split
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* them into 2 groups. The lower group holds 7 and upper 4 mailboxes.
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* About 3/4 of the mailboxes (get_mb_rx_first()...get_mb_rx_last())
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* on the chip are reserved for RX. We split them into 2 groups. The
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* lower group ranges from get_mb_rx_first() to get_mb_rx_low_last().
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*
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* Like it or not, but the chip always saves a received CAN message
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* into the first free mailbox it finds (starting with the
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@ -610,23 +703,23 @@ static int at91_poll_rx(struct net_device *dev, int quota)
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unsigned int mb;
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int received = 0;
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if (priv->rx_next > AT91_MB_RX_LOW_LAST &&
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reg_sr & AT91_MB_RX_LOW_MASK)
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if (priv->rx_next > get_mb_rx_low_last(priv) &&
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reg_sr & get_mb_rx_low_mask(priv))
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netdev_info(dev,
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"order of incoming frames cannot be guaranteed\n");
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again:
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for (mb = find_next_bit(addr, AT91_MB_RX_LAST + 1, priv->rx_next);
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mb < AT91_MB_RX_LAST + 1 && quota > 0;
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for (mb = find_next_bit(addr, get_mb_tx_first(priv), priv->rx_next);
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mb < get_mb_tx_first(priv) && quota > 0;
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reg_sr = at91_read(priv, AT91_SR),
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mb = find_next_bit(addr, AT91_MB_RX_LAST + 1, ++priv->rx_next)) {
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mb = find_next_bit(addr, get_mb_tx_first(priv), ++priv->rx_next)) {
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at91_read_msg(dev, mb);
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/* reactivate mailboxes */
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if (mb == AT91_MB_RX_LOW_LAST)
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if (mb == get_mb_rx_low_last(priv))
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/* all lower mailboxed, if just finished it */
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at91_activate_rx_low(priv);
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else if (mb > AT91_MB_RX_LOW_LAST)
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else if (mb > get_mb_rx_low_last(priv))
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/* only the mailbox we read */
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at91_activate_rx_mb(priv, mb);
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@ -635,9 +728,9 @@ static int at91_poll_rx(struct net_device *dev, int quota)
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}
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|
||||
/* upper group completed, look again in lower */
|
||||
if (priv->rx_next > AT91_MB_RX_LOW_LAST &&
|
||||
quota > 0 && mb > AT91_MB_RX_LAST) {
|
||||
priv->rx_next = AT91_MB_RX_FIRST;
|
||||
if (priv->rx_next > get_mb_rx_low_last(priv) &&
|
||||
quota > 0 && mb > get_mb_rx_last(priv)) {
|
||||
priv->rx_next = get_mb_rx_first(priv);
|
||||
goto again;
|
||||
}
|
||||
|
||||
|
|
@ -720,7 +813,7 @@ static int at91_poll(struct napi_struct *napi, int quota)
|
|||
u32 reg_sr = at91_read(priv, AT91_SR);
|
||||
int work_done = 0;
|
||||
|
||||
if (reg_sr & AT91_IRQ_MB_RX)
|
||||
if (reg_sr & get_irq_mb_rx(priv))
|
||||
work_done += at91_poll_rx(dev, quota - work_done);
|
||||
|
||||
/*
|
||||
|
|
@ -734,7 +827,7 @@ static int at91_poll(struct napi_struct *napi, int quota)
|
|||
if (work_done < quota) {
|
||||
/* enable IRQs for frame errors and all mailboxes >= rx_next */
|
||||
u32 reg_ier = AT91_IRQ_ERR_FRAME;
|
||||
reg_ier |= AT91_IRQ_MB_RX & ~AT91_MB_RX_MASK(priv->rx_next);
|
||||
reg_ier |= get_irq_mb_rx(priv) & ~AT91_MB_MASK(priv->rx_next);
|
||||
|
||||
napi_complete(napi);
|
||||
at91_write(priv, AT91_IER, reg_ier);
|
||||
|
|
@ -783,7 +876,7 @@ static void at91_irq_tx(struct net_device *dev, u32 reg_sr)
|
|||
if (likely(reg_msr & AT91_MSR_MRDY &&
|
||||
~reg_msr & AT91_MSR_MABT)) {
|
||||
/* _NOTE_: subtract AT91_MB_TX_FIRST offset from mb! */
|
||||
can_get_echo_skb(dev, mb - AT91_MB_TX_FIRST);
|
||||
can_get_echo_skb(dev, mb - get_mb_tx_first(priv));
|
||||
dev->stats.tx_packets++;
|
||||
}
|
||||
}
|
||||
|
|
@ -793,8 +886,8 @@ static void at91_irq_tx(struct net_device *dev, u32 reg_sr)
|
|||
* we get a TX int for the last can frame directly before a
|
||||
* wrap around.
|
||||
*/
|
||||
if ((priv->tx_next & AT91_NEXT_MASK) != 0 ||
|
||||
(priv->tx_echo & AT91_NEXT_MASK) == 0)
|
||||
if ((priv->tx_next & get_next_mask(priv)) != 0 ||
|
||||
(priv->tx_echo & get_next_mask(priv)) == 0)
|
||||
netif_wake_queue(dev);
|
||||
}
|
||||
|
||||
|
|
@ -906,6 +999,29 @@ static void at91_irq_err_state(struct net_device *dev,
|
|||
at91_write(priv, AT91_IER, reg_ier);
|
||||
}
|
||||
|
||||
static int at91_get_state_by_bec(const struct net_device *dev,
|
||||
enum can_state *state)
|
||||
{
|
||||
struct can_berr_counter bec;
|
||||
int err;
|
||||
|
||||
err = at91_get_berr_counter(dev, &bec);
|
||||
if (err)
|
||||
return err;
|
||||
|
||||
if (bec.txerr < 96 && bec.rxerr < 96)
|
||||
*state = CAN_STATE_ERROR_ACTIVE;
|
||||
else if (bec.txerr < 128 && bec.rxerr < 128)
|
||||
*state = CAN_STATE_ERROR_WARNING;
|
||||
else if (bec.txerr < 256 && bec.rxerr < 256)
|
||||
*state = CAN_STATE_ERROR_PASSIVE;
|
||||
else
|
||||
*state = CAN_STATE_BUS_OFF;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
static void at91_irq_err(struct net_device *dev)
|
||||
{
|
||||
struct at91_priv *priv = netdev_priv(dev);
|
||||
|
|
@ -913,21 +1029,28 @@ static void at91_irq_err(struct net_device *dev)
|
|||
struct can_frame *cf;
|
||||
enum can_state new_state;
|
||||
u32 reg_sr;
|
||||
int err;
|
||||
|
||||
reg_sr = at91_read(priv, AT91_SR);
|
||||
if (at91_is_sam9263(priv)) {
|
||||
reg_sr = at91_read(priv, AT91_SR);
|
||||
|
||||
/* we need to look at the unmasked reg_sr */
|
||||
if (unlikely(reg_sr & AT91_IRQ_BOFF))
|
||||
new_state = CAN_STATE_BUS_OFF;
|
||||
else if (unlikely(reg_sr & AT91_IRQ_ERRP))
|
||||
new_state = CAN_STATE_ERROR_PASSIVE;
|
||||
else if (unlikely(reg_sr & AT91_IRQ_WARN))
|
||||
new_state = CAN_STATE_ERROR_WARNING;
|
||||
else if (likely(reg_sr & AT91_IRQ_ERRA))
|
||||
new_state = CAN_STATE_ERROR_ACTIVE;
|
||||
else {
|
||||
netdev_err(dev, "BUG! hardware in undefined state\n");
|
||||
return;
|
||||
/* we need to look at the unmasked reg_sr */
|
||||
if (unlikely(reg_sr & AT91_IRQ_BOFF))
|
||||
new_state = CAN_STATE_BUS_OFF;
|
||||
else if (unlikely(reg_sr & AT91_IRQ_ERRP))
|
||||
new_state = CAN_STATE_ERROR_PASSIVE;
|
||||
else if (unlikely(reg_sr & AT91_IRQ_WARN))
|
||||
new_state = CAN_STATE_ERROR_WARNING;
|
||||
else if (likely(reg_sr & AT91_IRQ_ERRA))
|
||||
new_state = CAN_STATE_ERROR_ACTIVE;
|
||||
else {
|
||||
netdev_err(dev, "BUG! hardware in undefined state\n");
|
||||
return;
|
||||
}
|
||||
} else {
|
||||
err = at91_get_state_by_bec(dev, &new_state);
|
||||
if (err)
|
||||
return;
|
||||
}
|
||||
|
||||
/* state hasn't changed */
|
||||
|
|
@ -968,19 +1091,19 @@ static irqreturn_t at91_irq(int irq, void *dev_id)
|
|||
handled = IRQ_HANDLED;
|
||||
|
||||
/* Receive or error interrupt? -> napi */
|
||||
if (reg_sr & (AT91_IRQ_MB_RX | AT91_IRQ_ERR_FRAME)) {
|
||||
if (reg_sr & (get_irq_mb_rx(priv) | AT91_IRQ_ERR_FRAME)) {
|
||||
/*
|
||||
* The error bits are clear on read,
|
||||
* save for later use.
|
||||
*/
|
||||
priv->reg_sr = reg_sr;
|
||||
at91_write(priv, AT91_IDR,
|
||||
AT91_IRQ_MB_RX | AT91_IRQ_ERR_FRAME);
|
||||
get_irq_mb_rx(priv) | AT91_IRQ_ERR_FRAME);
|
||||
napi_schedule(&priv->napi);
|
||||
}
|
||||
|
||||
/* Transmission complete interrupt */
|
||||
if (reg_sr & AT91_IRQ_MB_TX)
|
||||
if (reg_sr & get_irq_mb_tx(priv))
|
||||
at91_irq_tx(dev, reg_sr);
|
||||
|
||||
at91_irq_err(dev);
|
||||
|
|
@ -1123,6 +1246,8 @@ static struct attribute_group at91_sysfs_attr_group = {
|
|||
|
||||
static int __devinit at91_can_probe(struct platform_device *pdev)
|
||||
{
|
||||
const struct at91_devtype_data *devtype_data;
|
||||
enum at91_devtype devtype;
|
||||
struct net_device *dev;
|
||||
struct at91_priv *priv;
|
||||
struct resource *res;
|
||||
|
|
@ -1130,6 +1255,9 @@ static int __devinit at91_can_probe(struct platform_device *pdev)
|
|||
void __iomem *addr;
|
||||
int err, irq;
|
||||
|
||||
devtype = pdev->id_entry->driver_data;
|
||||
devtype_data = &at91_devtype_data[devtype];
|
||||
|
||||
clk = clk_get(&pdev->dev, "can_clk");
|
||||
if (IS_ERR(clk)) {
|
||||
dev_err(&pdev->dev, "no clock defined\n");
|
||||
|
|
@ -1157,7 +1285,8 @@ static int __devinit at91_can_probe(struct platform_device *pdev)
|
|||
goto exit_release;
|
||||
}
|
||||
|
||||
dev = alloc_candev(sizeof(struct at91_priv), AT91_MB_TX_NUM);
|
||||
dev = alloc_candev(sizeof(struct at91_priv),
|
||||
1 << devtype_data->tx_shift);
|
||||
if (!dev) {
|
||||
err = -ENOMEM;
|
||||
goto exit_iounmap;
|
||||
|
|
@ -1166,7 +1295,6 @@ static int __devinit at91_can_probe(struct platform_device *pdev)
|
|||
dev->netdev_ops = &at91_netdev_ops;
|
||||
dev->irq = irq;
|
||||
dev->flags |= IFF_ECHO;
|
||||
dev->sysfs_groups[0] = &at91_sysfs_attr_group;
|
||||
|
||||
priv = netdev_priv(dev);
|
||||
priv->can.clock.freq = clk_get_rate(clk);
|
||||
|
|
@ -1174,13 +1302,18 @@ static int __devinit at91_can_probe(struct platform_device *pdev)
|
|||
priv->can.do_set_mode = at91_set_mode;
|
||||
priv->can.do_get_berr_counter = at91_get_berr_counter;
|
||||
priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES;
|
||||
priv->reg_base = addr;
|
||||
priv->dev = dev;
|
||||
priv->reg_base = addr;
|
||||
priv->devtype_data = *devtype_data;
|
||||
priv->devtype_data.type = devtype;
|
||||
priv->clk = clk;
|
||||
priv->pdata = pdev->dev.platform_data;
|
||||
priv->mb0_id = 0x7ff;
|
||||
|
||||
netif_napi_add(dev, &priv->napi, at91_poll, AT91_NAPI_WEIGHT);
|
||||
netif_napi_add(dev, &priv->napi, at91_poll, get_mb_rx_num(priv));
|
||||
|
||||
if (at91_is_sam9263(priv))
|
||||
dev->sysfs_groups[0] = &at91_sysfs_attr_group;
|
||||
|
||||
dev_set_drvdata(&pdev->dev, dev);
|
||||
SET_NETDEV_DEV(dev, &pdev->dev);
|
||||
|
|
@ -1230,13 +1363,26 @@ static int __devexit at91_can_remove(struct platform_device *pdev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static const struct platform_device_id at91_can_id_table[] = {
|
||||
{
|
||||
.name = "at91_can",
|
||||
.driver_data = AT91_DEVTYPE_SAM9263,
|
||||
}, {
|
||||
.name = "at91sam9x5_can",
|
||||
.driver_data = AT91_DEVTYPE_SAM9X5,
|
||||
}, {
|
||||
/* sentinel */
|
||||
}
|
||||
};
|
||||
|
||||
static struct platform_driver at91_can_driver = {
|
||||
.probe = at91_can_probe,
|
||||
.remove = __devexit_p(at91_can_remove),
|
||||
.driver = {
|
||||
.name = KBUILD_MODNAME,
|
||||
.owner = THIS_MODULE,
|
||||
.probe = at91_can_probe,
|
||||
.remove = __devexit_p(at91_can_remove),
|
||||
.driver = {
|
||||
.name = KBUILD_MODNAME,
|
||||
.owner = THIS_MODULE,
|
||||
},
|
||||
.id_table = at91_can_id_table,
|
||||
};
|
||||
|
||||
static int __init at91_can_module_init(void)
|
||||
|
|
|
|||
Loading…
Reference in a new issue