arm64: add atomic pool for non-coherent and CMA allocations
Neither CMA nor noncoherent allocations support atomic allocations. Add a dedicated atomic pool to support this. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Laura Abbott <lauraa@codeaurora.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: David Riley <davidriley@chromium.org> Cc: Olof Johansson <olof@lixom.net> Cc: Ritesh Harjain <ritesh.harjani@gmail.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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36d0fd2198
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2 changed files with 146 additions and 19 deletions
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@ -18,6 +18,7 @@ config ARM64
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select COMMON_CLK
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select COMMON_CLK
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select CPU_PM if (SUSPEND || CPU_IDLE)
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select CPU_PM if (SUSPEND || CPU_IDLE)
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select DCACHE_WORD_ACCESS
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select DCACHE_WORD_ACCESS
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select GENERIC_ALLOCATOR
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select GENERIC_CLOCKEVENTS
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select GENERIC_CLOCKEVENTS
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select GENERIC_CLOCKEVENTS_BROADCAST if SMP
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select GENERIC_CLOCKEVENTS_BROADCAST if SMP
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select GENERIC_CPU_AUTOPROBE
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select GENERIC_CPU_AUTOPROBE
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@ -20,6 +20,7 @@
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#include <linux/gfp.h>
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#include <linux/gfp.h>
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#include <linux/export.h>
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#include <linux/export.h>
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#include <linux/slab.h>
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#include <linux/slab.h>
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#include <linux/genalloc.h>
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#include <linux/dma-mapping.h>
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#include <linux/dma-mapping.h>
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#include <linux/dma-contiguous.h>
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#include <linux/dma-contiguous.h>
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#include <linux/vmalloc.h>
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#include <linux/vmalloc.h>
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@ -38,6 +39,54 @@ static pgprot_t __get_dma_pgprot(struct dma_attrs *attrs, pgprot_t prot,
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return prot;
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return prot;
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}
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}
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static struct gen_pool *atomic_pool;
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#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
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static size_t atomic_pool_size = DEFAULT_DMA_COHERENT_POOL_SIZE;
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static int __init early_coherent_pool(char *p)
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{
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atomic_pool_size = memparse(p, &p);
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return 0;
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}
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early_param("coherent_pool", early_coherent_pool);
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static void *__alloc_from_pool(size_t size, struct page **ret_page)
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{
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unsigned long val;
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void *ptr = NULL;
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if (!atomic_pool) {
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WARN(1, "coherent pool not initialised!\n");
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return NULL;
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}
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val = gen_pool_alloc(atomic_pool, size);
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if (val) {
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phys_addr_t phys = gen_pool_virt_to_phys(atomic_pool, val);
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*ret_page = phys_to_page(phys);
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ptr = (void *)val;
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}
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return ptr;
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}
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static bool __in_atomic_pool(void *start, size_t size)
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{
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return addr_in_gen_pool(atomic_pool, (unsigned long)start, size);
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}
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static int __free_from_pool(void *start, size_t size)
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{
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if (!__in_atomic_pool(start, size))
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return 0;
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gen_pool_free(atomic_pool, (unsigned long)start, size);
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return 1;
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}
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static void *__dma_alloc_coherent(struct device *dev, size_t size,
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static void *__dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flags,
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dma_addr_t *dma_handle, gfp_t flags,
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struct dma_attrs *attrs)
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struct dma_attrs *attrs)
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@ -50,7 +99,7 @@ static void *__dma_alloc_coherent(struct device *dev, size_t size,
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if (IS_ENABLED(CONFIG_ZONE_DMA) &&
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if (IS_ENABLED(CONFIG_ZONE_DMA) &&
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dev->coherent_dma_mask <= DMA_BIT_MASK(32))
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dev->coherent_dma_mask <= DMA_BIT_MASK(32))
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flags |= GFP_DMA;
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flags |= GFP_DMA;
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if (IS_ENABLED(CONFIG_DMA_CMA)) {
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if (IS_ENABLED(CONFIG_DMA_CMA) && (flags & __GFP_WAIT)) {
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struct page *page;
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struct page *page;
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size = PAGE_ALIGN(size);
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size = PAGE_ALIGN(size);
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@ -70,50 +119,54 @@ static void __dma_free_coherent(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle,
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void *vaddr, dma_addr_t dma_handle,
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struct dma_attrs *attrs)
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struct dma_attrs *attrs)
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{
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{
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bool freed;
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phys_addr_t paddr = dma_to_phys(dev, dma_handle);
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if (dev == NULL) {
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if (dev == NULL) {
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WARN_ONCE(1, "Use an actual device structure for DMA allocation\n");
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WARN_ONCE(1, "Use an actual device structure for DMA allocation\n");
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return;
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return;
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}
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}
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if (IS_ENABLED(CONFIG_DMA_CMA)) {
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freed = dma_release_from_contiguous(dev,
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phys_addr_t paddr = dma_to_phys(dev, dma_handle);
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dma_release_from_contiguous(dev,
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phys_to_page(paddr),
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phys_to_page(paddr),
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size >> PAGE_SHIFT);
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size >> PAGE_SHIFT);
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} else {
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if (!freed)
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swiotlb_free_coherent(dev, size, vaddr, dma_handle);
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swiotlb_free_coherent(dev, size, vaddr, dma_handle);
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}
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}
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}
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static void *__dma_alloc_noncoherent(struct device *dev, size_t size,
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static void *__dma_alloc_noncoherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flags,
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dma_addr_t *dma_handle, gfp_t flags,
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struct dma_attrs *attrs)
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struct dma_attrs *attrs)
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{
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{
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struct page *page, **map;
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struct page *page;
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void *ptr, *coherent_ptr;
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void *ptr, *coherent_ptr;
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int order, i;
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size = PAGE_ALIGN(size);
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size = PAGE_ALIGN(size);
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order = get_order(size);
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if (!(flags & __GFP_WAIT)) {
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struct page *page = NULL;
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void *addr = __alloc_from_pool(size, &page);
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if (addr)
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*dma_handle = phys_to_dma(dev, page_to_phys(page));
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return addr;
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}
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ptr = __dma_alloc_coherent(dev, size, dma_handle, flags, attrs);
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ptr = __dma_alloc_coherent(dev, size, dma_handle, flags, attrs);
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if (!ptr)
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if (!ptr)
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goto no_mem;
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goto no_mem;
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map = kmalloc(sizeof(struct page *) << order, flags & ~GFP_DMA);
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if (!map)
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goto no_map;
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/* remove any dirty cache lines on the kernel alias */
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/* remove any dirty cache lines on the kernel alias */
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__dma_flush_range(ptr, ptr + size);
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__dma_flush_range(ptr, ptr + size);
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/* create a coherent mapping */
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/* create a coherent mapping */
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page = virt_to_page(ptr);
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page = virt_to_page(ptr);
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for (i = 0; i < (size >> PAGE_SHIFT); i++)
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coherent_ptr = dma_common_contiguous_remap(page, size, VM_USERMAP,
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map[i] = page + i;
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__get_dma_pgprot(attrs,
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coherent_ptr = vmap(map, size >> PAGE_SHIFT, VM_MAP,
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__pgprot(PROT_NORMAL_NC), false),
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__get_dma_pgprot(attrs, __pgprot(PROT_NORMAL_NC), false));
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NULL);
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kfree(map);
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if (!coherent_ptr)
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if (!coherent_ptr)
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goto no_map;
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goto no_map;
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@ -132,6 +185,8 @@ static void __dma_free_noncoherent(struct device *dev, size_t size,
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{
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{
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void *swiotlb_addr = phys_to_virt(dma_to_phys(dev, dma_handle));
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void *swiotlb_addr = phys_to_virt(dma_to_phys(dev, dma_handle));
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if (__free_from_pool(vaddr, size))
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return;
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vunmap(vaddr);
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vunmap(vaddr);
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__dma_free_coherent(dev, size, swiotlb_addr, dma_handle, attrs);
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__dma_free_coherent(dev, size, swiotlb_addr, dma_handle, attrs);
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}
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}
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@ -307,6 +362,67 @@ EXPORT_SYMBOL(coherent_swiotlb_dma_ops);
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extern int swiotlb_late_init_with_default_size(size_t default_size);
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extern int swiotlb_late_init_with_default_size(size_t default_size);
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static int __init atomic_pool_init(void)
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{
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pgprot_t prot = __pgprot(PROT_NORMAL_NC);
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unsigned long nr_pages = atomic_pool_size >> PAGE_SHIFT;
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struct page *page;
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void *addr;
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unsigned int pool_size_order = get_order(atomic_pool_size);
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if (dev_get_cma_area(NULL))
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page = dma_alloc_from_contiguous(NULL, nr_pages,
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pool_size_order);
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else
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page = alloc_pages(GFP_DMA, pool_size_order);
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if (page) {
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int ret;
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void *page_addr = page_address(page);
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memset(page_addr, 0, atomic_pool_size);
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__dma_flush_range(page_addr, page_addr + atomic_pool_size);
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atomic_pool = gen_pool_create(PAGE_SHIFT, -1);
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if (!atomic_pool)
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goto free_page;
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addr = dma_common_contiguous_remap(page, atomic_pool_size,
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VM_USERMAP, prot, atomic_pool_init);
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if (!addr)
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goto destroy_genpool;
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ret = gen_pool_add_virt(atomic_pool, (unsigned long)addr,
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page_to_phys(page),
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atomic_pool_size, -1);
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if (ret)
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goto remove_mapping;
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gen_pool_set_algo(atomic_pool,
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gen_pool_first_fit_order_align,
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(void *)PAGE_SHIFT);
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pr_info("DMA: preallocated %zu KiB pool for atomic allocations\n",
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atomic_pool_size / 1024);
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return 0;
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}
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goto out;
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remove_mapping:
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dma_common_free_remap(addr, atomic_pool_size, VM_USERMAP);
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destroy_genpool:
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gen_pool_destroy(atomic_pool);
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atomic_pool = NULL;
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free_page:
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if (!dma_release_from_contiguous(NULL, page, nr_pages))
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__free_pages(page, pool_size_order);
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out:
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pr_err("DMA: failed to allocate %zu KiB pool for atomic coherent allocation\n",
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atomic_pool_size / 1024);
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return -ENOMEM;
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}
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static int __init swiotlb_late_init(void)
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static int __init swiotlb_late_init(void)
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{
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{
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size_t swiotlb_size = min(SZ_64M, MAX_ORDER_NR_PAGES << PAGE_SHIFT);
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size_t swiotlb_size = min(SZ_64M, MAX_ORDER_NR_PAGES << PAGE_SHIFT);
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@ -315,7 +431,17 @@ static int __init swiotlb_late_init(void)
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return swiotlb_late_init_with_default_size(swiotlb_size);
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return swiotlb_late_init_with_default_size(swiotlb_size);
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}
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}
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arch_initcall(swiotlb_late_init);
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static int __init arm64_dma_init(void)
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{
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int ret = 0;
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ret |= swiotlb_late_init();
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ret |= atomic_pool_init();
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return ret;
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}
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arch_initcall(arm64_dma_init);
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#define PREALLOC_DMA_DEBUG_ENTRIES 4096
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#define PREALLOC_DMA_DEBUG_ENTRIES 4096
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