i3c: i3c-master-qcom-geni: Handle timeout for DMA FSM reset

This change adds timeout handling scenario for the DMA TX/TX reset
sequence and adds the proper error logs. If return value from API
wait_for_completion_timeout() is not taken cared, may mislead the
debug.

Also Fix the issue of not initializing the completion variable
during command execution time.

Change-Id: I01442e611ea531bbd6124c0b5f4b6c8da9c79281
Signed-off-by: Mukesh Kumar Savaliya <msavaliy@codeaurora.org>
This commit is contained in:
Mukesh Kumar Savaliya 2020-10-09 00:12:11 +05:30
parent 04e2774ee8
commit d9fc9718f5

View file

@ -761,6 +761,7 @@ static int _i3c_geni_execute_command
enum i3c_trans_dir rnw = gi3c->cur_rnw;
u32 len = gi3c->cur_len;
reinit_completion(&gi3c->done);
geni_se_select_mode(gi3c->se.base, xfer->mode);
gi3c->err = 0;
@ -810,8 +811,8 @@ static int _i3c_geni_execute_command
writel_relaxed(1, gi3c->se.base +
SE_GENI_TX_WATERMARK_REG);
}
time_remaining = wait_for_completion_timeout(&gi3c->done,
XFER_TIMEOUT);
time_remaining = wait_for_completion_timeout(&gi3c->done, XFER_TIMEOUT);
if (!time_remaining) {
unsigned long flags;
@ -854,7 +855,11 @@ static int _i3c_geni_execute_command
else
writel_relaxed(1, gi3c->se.base +
SE_DMA_TX_FSM_RST);
time_remaining =
wait_for_completion_timeout(&gi3c->done, XFER_TIMEOUT);
if (!time_remaining)
GENI_SE_ERR(gi3c->ipcl, true, gi3c->se.dev,
"Timeout:FSM Reset, rnw:%d\n", rnw);
}
geni_se_rx_dma_unprep(gi3c->se.i3c_rsc.wrapper_dev,
rx_dma, len);