iwlwifi: add iwl_set_bits_mask to transport API
Express iwl_set_bit() and iwl_clear_bit() through iwl_set_bits_mask() and add the latter to the transport's API in order to allow different implementation for different transport types in the future. Signed-off-by: Lilach Edelstein <lilach.edelstein@intel.com> Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Signed-off-by: Johannes Berg <johannes.berg@intel.com>
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6690c01d16
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e139dc4aeb
6 changed files with 81 additions and 78 deletions
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@ -1991,7 +1991,7 @@ static void iwl_nic_config(struct iwl_op_mode *op_mode)
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struct iwl_priv *priv = IWL_OP_MODE_GET_DVM(op_mode);
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struct iwl_priv *priv = IWL_OP_MODE_GET_DVM(op_mode);
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/* SKU Control */
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/* SKU Control */
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iwl_set_bits_mask(priv->trans, CSR_HW_IF_CONFIG_REG,
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iwl_trans_set_bits_mask(priv->trans, CSR_HW_IF_CONFIG_REG,
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CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH |
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CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH |
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CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP,
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CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP,
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(CSR_HW_REV_STEP(priv->trans->hw_rev) <<
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(CSR_HW_REV_STEP(priv->trans->hw_rev) <<
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@ -2009,10 +2009,11 @@ static void iwl_nic_config(struct iwl_op_mode *op_mode)
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priv->nvm_data->radio_cfg_dash <<
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priv->nvm_data->radio_cfg_dash <<
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CSR_HW_IF_CONFIG_REG_POS_PHY_DASH;
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CSR_HW_IF_CONFIG_REG_POS_PHY_DASH;
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iwl_set_bits_mask(priv->trans, CSR_HW_IF_CONFIG_REG,
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iwl_trans_set_bits_mask(priv->trans, CSR_HW_IF_CONFIG_REG,
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CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE |
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CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE |
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CSR_HW_IF_CONFIG_REG_MSK_PHY_STEP |
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CSR_HW_IF_CONFIG_REG_MSK_PHY_STEP |
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CSR_HW_IF_CONFIG_REG_MSK_PHY_DASH, reg_val);
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CSR_HW_IF_CONFIG_REG_MSK_PHY_DASH,
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reg_val);
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IWL_INFO(priv, "Radio type=0x%x-0x%x-0x%x\n",
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IWL_INFO(priv, "Radio type=0x%x-0x%x-0x%x\n",
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priv->nvm_data->radio_cfg_type,
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priv->nvm_data->radio_cfg_type,
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@ -35,54 +35,6 @@
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#define IWL_POLL_INTERVAL 10 /* microseconds */
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#define IWL_POLL_INTERVAL 10 /* microseconds */
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void __iwl_set_bit(struct iwl_trans *trans, u32 reg, u32 mask)
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{
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iwl_write32(trans, reg, iwl_read32(trans, reg) | mask);
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}
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void __iwl_clear_bit(struct iwl_trans *trans, u32 reg, u32 mask)
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{
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iwl_write32(trans, reg, iwl_read32(trans, reg) & ~mask);
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}
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void iwl_set_bit(struct iwl_trans *trans, u32 reg, u32 mask)
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{
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unsigned long flags;
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spin_lock_irqsave(&trans->reg_lock, flags);
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__iwl_set_bit(trans, reg, mask);
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spin_unlock_irqrestore(&trans->reg_lock, flags);
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}
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EXPORT_SYMBOL_GPL(iwl_set_bit);
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void iwl_clear_bit(struct iwl_trans *trans, u32 reg, u32 mask)
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{
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unsigned long flags;
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spin_lock_irqsave(&trans->reg_lock, flags);
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__iwl_clear_bit(trans, reg, mask);
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spin_unlock_irqrestore(&trans->reg_lock, flags);
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}
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EXPORT_SYMBOL_GPL(iwl_clear_bit);
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void iwl_set_bits_mask(struct iwl_trans *trans, u32 reg, u32 mask, u32 value)
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{
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unsigned long flags;
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u32 v;
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#ifdef CONFIG_IWLWIFI_DEBUG
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WARN_ON_ONCE(value & ~mask);
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#endif
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spin_lock_irqsave(&trans->reg_lock, flags);
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v = iwl_read32(trans, reg);
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v &= ~mask;
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v |= value;
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iwl_write32(trans, reg, v);
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spin_unlock_irqrestore(&trans->reg_lock, flags);
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}
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EXPORT_SYMBOL_GPL(iwl_set_bits_mask);
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int iwl_poll_bit(struct iwl_trans *trans, u32 addr,
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int iwl_poll_bit(struct iwl_trans *trans, u32 addr,
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u32 bits, u32 mask, int timeout)
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u32 bits, u32 mask, int timeout)
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{
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{
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@ -51,12 +51,15 @@ static inline u32 iwl_read32(struct iwl_trans *trans, u32 ofs)
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return val;
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return val;
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}
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}
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void iwl_set_bit(struct iwl_trans *trans, u32 reg, u32 mask);
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static inline void iwl_set_bit(struct iwl_trans *trans, u32 reg, u32 mask)
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void iwl_clear_bit(struct iwl_trans *trans, u32 reg, u32 mask);
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{
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void __iwl_set_bit(struct iwl_trans *trans, u32 reg, u32 mask);
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iwl_trans_set_bits_mask(trans, reg, mask, mask);
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void __iwl_clear_bit(struct iwl_trans *trans, u32 reg, u32 mask);
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}
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void iwl_set_bits_mask(struct iwl_trans *trans, u32 reg, u32 mask, u32 value);
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static inline void iwl_clear_bit(struct iwl_trans *trans, u32 reg, u32 mask)
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{
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iwl_trans_set_bits_mask(trans, reg, mask, 0);
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}
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int iwl_poll_bit(struct iwl_trans *trans, u32 addr,
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int iwl_poll_bit(struct iwl_trans *trans, u32 addr,
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u32 bits, u32 mask, int timeout);
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u32 bits, u32 mask, int timeout);
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@ -418,6 +418,7 @@ struct iwl_trans;
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* @set_pmi: set the power pmi state
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* @set_pmi: set the power pmi state
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* @grab_nic_access: wake the NIC to be able to access non-HBUS regs
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* @grab_nic_access: wake the NIC to be able to access non-HBUS regs
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* @release_nic_access: let the NIC go to sleep
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* @release_nic_access: let the NIC go to sleep
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* @set_bits_mask - set SRAM register according to value and mask.
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*/
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*/
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struct iwl_trans_ops {
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struct iwl_trans_ops {
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@ -462,6 +463,8 @@ struct iwl_trans_ops {
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void (*set_pmi)(struct iwl_trans *trans, bool state);
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void (*set_pmi)(struct iwl_trans *trans, bool state);
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bool (*grab_nic_access)(struct iwl_trans *trans, bool silent);
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bool (*grab_nic_access)(struct iwl_trans *trans, bool silent);
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void (*release_nic_access)(struct iwl_trans *trans);
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void (*release_nic_access)(struct iwl_trans *trans);
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void (*set_bits_mask)(struct iwl_trans *trans, u32 reg, u32 mask,
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u32 value);
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};
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};
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/**
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/**
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@ -762,6 +765,12 @@ static inline void iwl_trans_set_pmi(struct iwl_trans *trans, bool state)
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trans->ops->set_pmi(trans, state);
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trans->ops->set_pmi(trans, state);
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}
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}
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static inline void
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iwl_trans_set_bits_mask(struct iwl_trans *trans, u32 reg, u32 mask, u32 value)
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{
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trans->ops->set_bits_mask(trans, reg, mask, value);
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}
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#define iwl_trans_grab_nic_access(trans, silent) \
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#define iwl_trans_grab_nic_access(trans, silent) \
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__cond_lock(nic_access, \
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__cond_lock(nic_access, \
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likely((trans)->ops->grab_nic_access(trans, silent)))
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likely((trans)->ops->grab_nic_access(trans, silent)))
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@ -177,7 +177,7 @@ static void iwl_mvm_nic_config(struct iwl_op_mode *op_mode)
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reg_val |= CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI;
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reg_val |= CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI;
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reg_val |= CSR_HW_IF_CONFIG_REG_BIT_MAC_SI;
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reg_val |= CSR_HW_IF_CONFIG_REG_BIT_MAC_SI;
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iwl_set_bits_mask(mvm->trans, CSR_HW_IF_CONFIG_REG,
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iwl_trans_set_bits_mask(mvm->trans, CSR_HW_IF_CONFIG_REG,
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CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH |
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CSR_HW_IF_CONFIG_REG_MSK_MAC_DASH |
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CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP |
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CSR_HW_IF_CONFIG_REG_MSK_MAC_STEP |
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CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE |
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CSR_HW_IF_CONFIG_REG_MSK_PHY_TYPE |
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@ -75,6 +75,33 @@
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#include "iwl-agn-hw.h"
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#include "iwl-agn-hw.h"
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#include "internal.h"
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#include "internal.h"
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static void __iwl_trans_pcie_set_bits_mask(struct iwl_trans *trans,
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u32 reg, u32 mask, u32 value)
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{
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u32 v;
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#ifdef CONFIG_IWLWIFI_DEBUG
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WARN_ON_ONCE(value & ~mask);
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#endif
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v = iwl_read32(trans, reg);
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v &= ~mask;
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v |= value;
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iwl_write32(trans, reg, v);
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}
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static inline void __iwl_trans_pcie_clear_bit(struct iwl_trans *trans,
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u32 reg, u32 mask)
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{
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__iwl_trans_pcie_set_bits_mask(trans, reg, mask, 0);
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}
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static inline void __iwl_trans_pcie_set_bit(struct iwl_trans *trans,
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u32 reg, u32 mask)
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{
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__iwl_trans_pcie_set_bits_mask(trans, reg, mask, mask);
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}
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static void iwl_pcie_set_pwr(struct iwl_trans *trans, bool vaux)
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static void iwl_pcie_set_pwr(struct iwl_trans *trans, bool vaux)
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{
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{
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if (vaux && pci_pme_capable(to_pci_dev(trans->dev), PCI_D3cold))
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if (vaux && pci_pme_capable(to_pci_dev(trans->dev), PCI_D3cold))
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@ -786,7 +813,7 @@ static bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans, bool silent)
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lockdep_assert_held(&trans->reg_lock);
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lockdep_assert_held(&trans->reg_lock);
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/* this bit wakes up the NIC */
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/* this bit wakes up the NIC */
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__iwl_set_bit(trans, CSR_GP_CNTRL,
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__iwl_trans_pcie_set_bit(trans, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
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CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
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/*
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/*
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@ -829,7 +856,7 @@ static bool iwl_trans_pcie_grab_nic_access(struct iwl_trans *trans, bool silent)
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static void iwl_trans_pcie_release_nic_access(struct iwl_trans *trans)
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static void iwl_trans_pcie_release_nic_access(struct iwl_trans *trans)
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{
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{
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lockdep_assert_held(&trans->reg_lock);
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lockdep_assert_held(&trans->reg_lock);
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__iwl_clear_bit(trans, CSR_GP_CNTRL,
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__iwl_trans_pcie_clear_bit(trans, CSR_GP_CNTRL,
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CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
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CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
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/*
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/*
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* Above we read the CSR_GP_CNTRL register, which will flush
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* Above we read the CSR_GP_CNTRL register, which will flush
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@ -952,6 +979,16 @@ static int iwl_trans_pcie_wait_txq_empty(struct iwl_trans *trans)
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return ret;
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return ret;
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}
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}
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static void iwl_trans_pcie_set_bits_mask(struct iwl_trans *trans, u32 reg,
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u32 mask, u32 value)
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{
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unsigned long flags;
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spin_lock_irqsave(&trans->reg_lock, flags);
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__iwl_trans_pcie_set_bits_mask(trans, reg, mask, value);
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spin_unlock_irqrestore(&trans->reg_lock, flags);
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}
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static const char *get_fh_string(int cmd)
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static const char *get_fh_string(int cmd)
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{
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{
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#define IWL_CMD(x) case x: return #x
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#define IWL_CMD(x) case x: return #x
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@ -1405,7 +1442,8 @@ static const struct iwl_trans_ops trans_ops_pcie = {
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.configure = iwl_trans_pcie_configure,
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.configure = iwl_trans_pcie_configure,
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.set_pmi = iwl_trans_pcie_set_pmi,
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.set_pmi = iwl_trans_pcie_set_pmi,
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.grab_nic_access = iwl_trans_pcie_grab_nic_access,
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.grab_nic_access = iwl_trans_pcie_grab_nic_access,
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.release_nic_access = iwl_trans_pcie_release_nic_access
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.release_nic_access = iwl_trans_pcie_release_nic_access,
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.set_bits_mask = iwl_trans_pcie_set_bits_mask,
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};
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};
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struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev,
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struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev,
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