Linux 4.5-rc7

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Merge tag 'v4.5-rc7' into x86/asm, to pick up SMAP fix

Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Ingo Molnar 2016-03-07 09:27:30 +01:00
commit ec87e1cf7d
649 changed files with 8482 additions and 5784 deletions

View file

@ -56,10 +56,6 @@
<entry><constant>MEDIA_ENT_F_CONN_COMPOSITE</constant></entry> <entry><constant>MEDIA_ENT_F_CONN_COMPOSITE</constant></entry>
<entry>Connector for a RGB composite signal.</entry> <entry>Connector for a RGB composite signal.</entry>
</row> </row>
<row>
<entry><constant>MEDIA_ENT_F_CONN_TEST</constant></entry>
<entry>Connector for a test generator.</entry>
</row>
<row> <row>
<entry><constant>MEDIA_ENT_F_CAM_SENSOR</constant></entry> <entry><constant>MEDIA_ENT_F_CAM_SENSOR</constant></entry>
<entry>Camera video sensor entity.</entry> <entry>Camera video sensor entity.</entry>

View file

@ -30,7 +30,7 @@ that they are defined using standard clock bindings with following
clock-output-names: clock-output-names:
- "xin24m" - crystal input - required, - "xin24m" - crystal input - required,
- "ext_i2s" - external I2S clock - optional, - "ext_i2s" - external I2S clock - optional,
- "ext_gmac" - external GMAC clock - optional - "rmii_clkin" - external EMAC clock - optional
Example: Clock controller node: Example: Clock controller node:

View file

@ -24,9 +24,8 @@ Main node required properties:
1 = edge triggered 1 = edge triggered
4 = level triggered 4 = level triggered
Cells 4 and beyond are reserved for future use. When the 1st cell Cells 4 and beyond are reserved for future use and must have a value
has a value of 0 or 1, cells 4 and beyond act as padding, and may be of 0 if present.
ignored. It is recommended that padding cells have a value of 0.
- reg : Specifies base physical address(s) and size of the GIC - reg : Specifies base physical address(s) and size of the GIC
registers, in the following order: registers, in the following order:

View file

@ -82,8 +82,8 @@ Example:
"ch16", "ch17", "ch18", "ch19", "ch16", "ch17", "ch18", "ch19",
"ch20", "ch21", "ch22", "ch23", "ch20", "ch21", "ch22", "ch23",
"ch24"; "ch24";
clocks = <&mstp8_clks R8A7795_CLK_ETHERAVB>; clocks = <&cpg CPG_MOD 812>;
power-domains = <&cpg_clocks>; power-domains = <&cpg>;
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
phy-handle = <&phy0>; phy-handle = <&phy0>;

View file

@ -26,11 +26,7 @@ Example:
ti,pmic-shutdown-controller; ti,pmic-shutdown-controller;
regulators { regulators {
#address-cells = <1>;
#size-cells = <0>;
dcdc1_reg: dcdc1 { dcdc1_reg: dcdc1 {
reg = <0>;
regulator-min-microvolt = <900000>; regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
regulator-boot-on; regulator-boot-on;
@ -38,7 +34,6 @@ Example:
}; };
dcdc2_reg: dcdc2 { dcdc2_reg: dcdc2 {
reg = <1>;
regulator-min-microvolt = <900000>; regulator-min-microvolt = <900000>;
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3300000>;
regulator-boot-on; regulator-boot-on;
@ -46,7 +41,6 @@ Example:
}; };
dcdc3_reg: dcc3 { dcdc3_reg: dcc3 {
reg = <2>;
regulator-min-microvolt = <900000>; regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1500000>; regulator-max-microvolt = <1500000>;
regulator-boot-on; regulator-boot-on;
@ -54,7 +48,6 @@ Example:
}; };
ldo1_reg: ldo1 { ldo1_reg: ldo1 {
reg = <3>;
regulator-min-microvolt = <1000000>; regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3300000>;
regulator-boot-on; regulator-boot-on;
@ -62,7 +55,6 @@ Example:
}; };
ldo2_reg: ldo2 { ldo2_reg: ldo2 {
reg = <4>;
regulator-min-microvolt = <900000>; regulator-min-microvolt = <900000>;
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3300000>;
regulator-boot-on; regulator-boot-on;
@ -70,7 +62,6 @@ Example:
}; };
ldo3_reg: ldo3 { ldo3_reg: ldo3 {
reg = <5>;
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3300000>;
regulator-boot-on; regulator-boot-on;
@ -78,7 +69,6 @@ Example:
}; };
ldo4_reg: ldo4 { ldo4_reg: ldo4 {
reg = <6>;
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3300000>;
regulator-boot-on; regulator-boot-on;

View file

@ -14,6 +14,10 @@ Required properties:
interrupt number is the rtc alarm interrupt and second interrupt number interrupt number is the rtc alarm interrupt and second interrupt number
is the rtc tick interrupt. The number of cells representing a interrupt is the rtc tick interrupt. The number of cells representing a interrupt
depends on the parent interrupt controller. depends on the parent interrupt controller.
- clocks: Must contain a list of phandle and clock specifier for the rtc
and source clocks.
- clock-names: Must contain "rtc" and "rtc_src" entries sorted in the
same order as the clocks property.
Example: Example:
@ -21,4 +25,6 @@ Example:
compatible = "samsung,s3c6410-rtc"; compatible = "samsung,s3c6410-rtc";
reg = <0x10070000 0x100>; reg = <0x10070000 0x100>;
interrupts = <44 0 45 0>; interrupts = <44 0 45 0>;
clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
clock-names = "rtc", "rtc_src";
}; };

View file

@ -9,7 +9,7 @@ Optional properties:
- fsl,uart-has-rtscts : Indicate the uart has rts and cts - fsl,uart-has-rtscts : Indicate the uart has rts and cts
- fsl,irda-mode : Indicate the uart supports irda mode - fsl,irda-mode : Indicate the uart supports irda mode
- fsl,dte-mode : Indicate the uart works in DTE mode. The uart works - fsl,dte-mode : Indicate the uart works in DTE mode. The uart works
is DCE mode by default. in DCE mode by default.
Note: Each uart controller should have an alias correctly numbered Note: Each uart controller should have an alias correctly numbered
in "aliases" node. in "aliases" node.

View file

@ -400,3 +400,7 @@ wm8350_wdt:
nowayout: Watchdog cannot be stopped once started nowayout: Watchdog cannot be stopped once started
(default=kernel config parameter) (default=kernel config parameter)
------------------------------------------------- -------------------------------------------------
sun4v_wdt:
timeout_ms: Watchdog timeout in milliseconds 1..180000, default=60000)
nowayout: Watchdog cannot be stopped once started
-------------------------------------------------

View file

@ -920,17 +920,24 @@ M: Emilio López <emilio@elopez.com.ar>
S: Maintained S: Maintained
F: drivers/clk/sunxi/ F: drivers/clk/sunxi/
ARM/Amlogic MesonX SoC support ARM/Amlogic Meson SoC support
M: Carlo Caione <carlo@caione.org> M: Carlo Caione <carlo@caione.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L: linux-meson@googlegroups.com
W: http://linux-meson.com/
S: Maintained S: Maintained
F: drivers/media/rc/meson-ir.c F: arch/arm/mach-meson/
N: meson[x68] F: arch/arm/boot/dts/meson*
N: meson
ARM/Annapurna Labs ALPINE ARCHITECTURE ARM/Annapurna Labs ALPINE ARCHITECTURE
M: Tsahee Zidenberg <tsahee@annapurnalabs.com> M: Tsahee Zidenberg <tsahee@annapurnalabs.com>
M: Antoine Tenart <antoine.tenart@free-electrons.com>
S: Maintained S: Maintained
F: arch/arm/mach-alpine/ F: arch/arm/mach-alpine/
F: arch/arm/boot/dts/alpine*
F: arch/arm64/boot/dts/al/
F: drivers/*/*alpine*
ARM/ATMEL AT91RM9200, AT91SAM9 AND SAMA5 SOC SUPPORT ARM/ATMEL AT91RM9200, AT91SAM9 AND SAMA5 SOC SUPPORT
M: Nicolas Ferre <nicolas.ferre@atmel.com> M: Nicolas Ferre <nicolas.ferre@atmel.com>
@ -3444,7 +3451,6 @@ F: drivers/usb/dwc2/
DESIGNWARE USB3 DRD IP DRIVER DESIGNWARE USB3 DRD IP DRIVER
M: Felipe Balbi <balbi@kernel.org> M: Felipe Balbi <balbi@kernel.org>
L: linux-usb@vger.kernel.org L: linux-usb@vger.kernel.org
L: linux-omap@vger.kernel.org
T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git
S: Maintained S: Maintained
F: drivers/usb/dwc3/ F: drivers/usb/dwc3/
@ -4512,6 +4518,12 @@ L: linuxppc-dev@lists.ozlabs.org
S: Maintained S: Maintained
F: drivers/dma/fsldma.* F: drivers/dma/fsldma.*
FREESCALE GPMI NAND DRIVER
M: Han Xu <han.xu@nxp.com>
L: linux-mtd@lists.infradead.org
S: Maintained
F: drivers/mtd/nand/gpmi-nand/*
FREESCALE I2C CPM DRIVER FREESCALE I2C CPM DRIVER
M: Jochen Friedrich <jochen@scram.de> M: Jochen Friedrich <jochen@scram.de>
L: linuxppc-dev@lists.ozlabs.org L: linuxppc-dev@lists.ozlabs.org
@ -4528,7 +4540,7 @@ F: include/linux/platform_data/video-imxfb.h
F: drivers/video/fbdev/imxfb.c F: drivers/video/fbdev/imxfb.c
FREESCALE QUAD SPI DRIVER FREESCALE QUAD SPI DRIVER
M: Han Xu <han.xu@freescale.com> M: Han Xu <han.xu@nxp.com>
L: linux-mtd@lists.infradead.org L: linux-mtd@lists.infradead.org
S: Maintained S: Maintained
F: drivers/mtd/spi-nor/fsl-quadspi.c F: drivers/mtd/spi-nor/fsl-quadspi.c
@ -6128,7 +6140,7 @@ F: include/uapi/linux/sunrpc/
KERNEL SELFTEST FRAMEWORK KERNEL SELFTEST FRAMEWORK
M: Shuah Khan <shuahkh@osg.samsung.com> M: Shuah Khan <shuahkh@osg.samsung.com>
L: linux-api@vger.kernel.org L: linux-kselftest@vger.kernel.org
T: git git://git.kernel.org/pub/scm/shuah/linux-kselftest T: git git://git.kernel.org/pub/scm/shuah/linux-kselftest
S: Maintained S: Maintained
F: tools/testing/selftests F: tools/testing/selftests
@ -7354,7 +7366,7 @@ F: drivers/tty/isicom.c
F: include/linux/isicom.h F: include/linux/isicom.h
MUSB MULTIPOINT HIGH SPEED DUAL-ROLE CONTROLLER MUSB MULTIPOINT HIGH SPEED DUAL-ROLE CONTROLLER
M: Felipe Balbi <balbi@kernel.org> M: Bin Liu <b-liu@ti.com>
L: linux-usb@vger.kernel.org L: linux-usb@vger.kernel.org
T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git
S: Maintained S: Maintained
@ -7686,13 +7698,13 @@ S: Maintained
F: arch/nios2/ F: arch/nios2/
NOKIA N900 POWER SUPPLY DRIVERS NOKIA N900 POWER SUPPLY DRIVERS
M: Pali Rohár <pali.rohar@gmail.com> R: Pali Rohár <pali.rohar@gmail.com>
S: Maintained
F: include/linux/power/bq2415x_charger.h F: include/linux/power/bq2415x_charger.h
F: include/linux/power/bq27xxx_battery.h F: include/linux/power/bq27xxx_battery.h
F: include/linux/power/isp1704_charger.h F: include/linux/power/isp1704_charger.h
F: drivers/power/bq2415x_charger.c F: drivers/power/bq2415x_charger.c
F: drivers/power/bq27xxx_battery.c F: drivers/power/bq27xxx_battery.c
F: drivers/power/bq27xxx_battery_i2c.c
F: drivers/power/isp1704_charger.c F: drivers/power/isp1704_charger.c
F: drivers/power/rx51_battery.c F: drivers/power/rx51_battery.c
@ -7923,11 +7935,9 @@ F: drivers/media/platform/omap3isp/
F: drivers/staging/media/omap4iss/ F: drivers/staging/media/omap4iss/
OMAP USB SUPPORT OMAP USB SUPPORT
M: Felipe Balbi <balbi@kernel.org>
L: linux-usb@vger.kernel.org L: linux-usb@vger.kernel.org
L: linux-omap@vger.kernel.org L: linux-omap@vger.kernel.org
T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git S: Orphan
S: Maintained
F: drivers/usb/*/*omap* F: drivers/usb/*/*omap*
F: arch/arm/*omap*/usb* F: arch/arm/*omap*/usb*
@ -9558,6 +9568,12 @@ M: Andreas Noever <andreas.noever@gmail.com>
S: Maintained S: Maintained
F: drivers/thunderbolt/ F: drivers/thunderbolt/
TI BQ27XXX POWER SUPPLY DRIVER
R: Andrew F. Davis <afd@ti.com>
F: include/linux/power/bq27xxx_battery.h
F: drivers/power/bq27xxx_battery.c
F: drivers/power/bq27xxx_battery_i2c.c
TIMEKEEPING, CLOCKSOURCE CORE, NTP, ALARMTIMER TIMEKEEPING, CLOCKSOURCE CORE, NTP, ALARMTIMER
M: John Stultz <john.stultz@linaro.org> M: John Stultz <john.stultz@linaro.org>
M: Thomas Gleixner <tglx@linutronix.de> M: Thomas Gleixner <tglx@linutronix.de>
@ -12013,7 +12029,6 @@ F: arch/arm64/xen/
F: arch/arm64/include/asm/xen/ F: arch/arm64/include/asm/xen/
XEN NETWORK BACKEND DRIVER XEN NETWORK BACKEND DRIVER
M: Ian Campbell <ian.campbell@citrix.com>
M: Wei Liu <wei.liu2@citrix.com> M: Wei Liu <wei.liu2@citrix.com>
L: xen-devel@lists.xenproject.org (moderated for non-subscribers) L: xen-devel@lists.xenproject.org (moderated for non-subscribers)
L: netdev@vger.kernel.org L: netdev@vger.kernel.org

View file

@ -1,7 +1,7 @@
VERSION = 4 VERSION = 4
PATCHLEVEL = 5 PATCHLEVEL = 5
SUBLEVEL = 0 SUBLEVEL = 0
EXTRAVERSION = -rc4 EXTRAVERSION = -rc7
NAME = Blurry Fish Butt NAME = Blurry Fish Butt
# *DOCUMENTATION* # *DOCUMENTATION*

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@ -12,8 +12,6 @@ config ARC
select BUILDTIME_EXTABLE_SORT select BUILDTIME_EXTABLE_SORT
select COMMON_CLK select COMMON_CLK
select CLONE_BACKWARDS select CLONE_BACKWARDS
# ARC Busybox based initramfs absolutely relies on DEVTMPFS for /dev
select DEVTMPFS if !INITRAMFS_SOURCE=""
select GENERIC_ATOMIC64 select GENERIC_ATOMIC64
select GENERIC_CLOCKEVENTS select GENERIC_CLOCKEVENTS
select GENERIC_FIND_FIRST_BIT select GENERIC_FIND_FIRST_BIT
@ -275,14 +273,6 @@ config ARC_DCCM_BASE
default "0xA0000000" default "0xA0000000"
depends on ARC_HAS_DCCM depends on ARC_HAS_DCCM
config ARC_HAS_HW_MPY
bool "Use Hardware Multiplier (Normal or Faster XMAC)"
default y
help
Influences how gcc generates code for MPY operations.
If enabled, MPYxx insns are generated, provided by Standard/XMAC
Multipler. Otherwise software multipy lib is used
choice choice
prompt "MMU Version" prompt "MMU Version"
default ARC_MMU_V3 if ARC_CPU_770 default ARC_MMU_V3 if ARC_CPU_770
@ -542,14 +532,6 @@ config ARC_DBG_TLB_MISS_COUNT
Counts number of I and D TLB Misses and exports them via Debugfs Counts number of I and D TLB Misses and exports them via Debugfs
The counters can be cleared via Debugfs as well The counters can be cleared via Debugfs as well
if SMP
config ARC_IPI_DBG
bool "Debug Inter Core interrupts"
default n
endif
endif endif
config ARC_UBOOT_SUPPORT config ARC_UBOOT_SUPPORT

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@ -74,10 +74,6 @@ ldflags-$(CONFIG_CPU_BIG_ENDIAN) += -EB
# --build-id w/o "-marclinux". Default arc-elf32-ld is OK # --build-id w/o "-marclinux". Default arc-elf32-ld is OK
ldflags-$(upto_gcc44) += -marclinux ldflags-$(upto_gcc44) += -marclinux
ifndef CONFIG_ARC_HAS_HW_MPY
cflags-y += -mno-mpy
endif
LIBGCC := $(shell $(CC) $(cflags-y) --print-libgcc-file-name) LIBGCC := $(shell $(CC) $(cflags-y) --print-libgcc-file-name)
# Modules with short calls might break for calls into builtin-kernel # Modules with short calls might break for calls into builtin-kernel

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@ -39,6 +39,7 @@ CONFIG_IP_PNP_RARP=y
# CONFIG_INET_XFRM_MODE_TUNNEL is not set # CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set # CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_IPV6 is not set # CONFIG_IPV6 is not set
CONFIG_DEVTMPFS=y
# CONFIG_STANDALONE is not set # CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set # CONFIG_PREVENT_FIRMWARE_BUILD is not set
# CONFIG_FIRMWARE_IN_KERNEL is not set # CONFIG_FIRMWARE_IN_KERNEL is not set
@ -73,7 +74,6 @@ CONFIG_I2C_CHARDEV=y
CONFIG_I2C_DESIGNWARE_PLATFORM=y CONFIG_I2C_DESIGNWARE_PLATFORM=y
# CONFIG_HWMON is not set # CONFIG_HWMON is not set
CONFIG_FB=y CONFIG_FB=y
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
CONFIG_LOGO=y CONFIG_LOGO=y
@ -91,12 +91,10 @@ CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_DW=y CONFIG_MMC_DW=y
# CONFIG_IOMMU_SUPPORT is not set # CONFIG_IOMMU_SUPPORT is not set
CONFIG_EXT3_FS=y CONFIG_EXT3_FS=y
CONFIG_EXT4_FS=y
CONFIG_MSDOS_FS=y CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y CONFIG_VFAT_FS=y
CONFIG_NTFS_FS=y CONFIG_NTFS_FS=y
CONFIG_TMPFS=y CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_NFS_FS=y CONFIG_NFS_FS=y
CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y CONFIG_NLS_ISO8859_1=y

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@ -39,14 +39,10 @@ CONFIG_IP_PNP_RARP=y
# CONFIG_INET_XFRM_MODE_TUNNEL is not set # CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set # CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_IPV6 is not set # CONFIG_IPV6 is not set
CONFIG_DEVTMPFS=y
# CONFIG_STANDALONE is not set # CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set # CONFIG_PREVENT_FIRMWARE_BUILD is not set
# CONFIG_FIRMWARE_IN_KERNEL is not set # CONFIG_FIRMWARE_IN_KERNEL is not set
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_AXS=y
CONFIG_SCSI=y CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y CONFIG_BLK_DEV_SD=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y
@ -78,14 +74,12 @@ CONFIG_I2C_CHARDEV=y
CONFIG_I2C_DESIGNWARE_PLATFORM=y CONFIG_I2C_DESIGNWARE_PLATFORM=y
# CONFIG_HWMON is not set # CONFIG_HWMON is not set
CONFIG_FB=y CONFIG_FB=y
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
CONFIG_LOGO=y CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set # CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set # CONFIG_LOGO_LINUX_VGA16 is not set
# CONFIG_LOGO_LINUX_CLUT224 is not set # CONFIG_LOGO_LINUX_CLUT224 is not set
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_HCD_PLATFORM=y CONFIG_USB_EHCI_HCD_PLATFORM=y
CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_HCD=y
@ -97,12 +91,10 @@ CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_DW=y CONFIG_MMC_DW=y
# CONFIG_IOMMU_SUPPORT is not set # CONFIG_IOMMU_SUPPORT is not set
CONFIG_EXT3_FS=y CONFIG_EXT3_FS=y
CONFIG_EXT4_FS=y
CONFIG_MSDOS_FS=y CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y CONFIG_VFAT_FS=y
CONFIG_NTFS_FS=y CONFIG_NTFS_FS=y
CONFIG_TMPFS=y CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_NFS_FS=y CONFIG_NFS_FS=y
CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y CONFIG_NLS_ISO8859_1=y

View file

@ -40,14 +40,10 @@ CONFIG_IP_PNP_RARP=y
# CONFIG_INET_XFRM_MODE_TUNNEL is not set # CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set # CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_IPV6 is not set # CONFIG_IPV6 is not set
CONFIG_DEVTMPFS=y
# CONFIG_STANDALONE is not set # CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set # CONFIG_PREVENT_FIRMWARE_BUILD is not set
# CONFIG_FIRMWARE_IN_KERNEL is not set # CONFIG_FIRMWARE_IN_KERNEL is not set
CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_AXS=y
CONFIG_SCSI=y CONFIG_SCSI=y
CONFIG_BLK_DEV_SD=y CONFIG_BLK_DEV_SD=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y
@ -79,14 +75,12 @@ CONFIG_I2C_CHARDEV=y
CONFIG_I2C_DESIGNWARE_PLATFORM=y CONFIG_I2C_DESIGNWARE_PLATFORM=y
# CONFIG_HWMON is not set # CONFIG_HWMON is not set
CONFIG_FB=y CONFIG_FB=y
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
CONFIG_LOGO=y CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set # CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set # CONFIG_LOGO_LINUX_VGA16 is not set
# CONFIG_LOGO_LINUX_CLUT224 is not set # CONFIG_LOGO_LINUX_CLUT224 is not set
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_HCD_PLATFORM=y CONFIG_USB_EHCI_HCD_PLATFORM=y
CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_HCD=y
@ -98,12 +92,10 @@ CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_DW=y CONFIG_MMC_DW=y
# CONFIG_IOMMU_SUPPORT is not set # CONFIG_IOMMU_SUPPORT is not set
CONFIG_EXT3_FS=y CONFIG_EXT3_FS=y
CONFIG_EXT4_FS=y
CONFIG_MSDOS_FS=y CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y CONFIG_VFAT_FS=y
CONFIG_NTFS_FS=y CONFIG_NTFS_FS=y
CONFIG_TMPFS=y CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_NFS_FS=y CONFIG_NFS_FS=y
CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_CODEPAGE_437=y
CONFIG_NLS_ISO8859_1=y CONFIG_NLS_ISO8859_1=y

View file

@ -4,6 +4,7 @@ CONFIG_DEFAULT_HOSTNAME="ARCLinux"
# CONFIG_SWAP is not set # CONFIG_SWAP is not set
CONFIG_SYSVIPC=y CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE=y
# CONFIG_CROSS_MEMORY_ATTACH is not set
CONFIG_HIGH_RES_TIMERS=y CONFIG_HIGH_RES_TIMERS=y
CONFIG_IKCONFIG=y CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y CONFIG_IKCONFIG_PROC=y
@ -26,7 +27,6 @@ CONFIG_ARC_PLAT_SIM=y
CONFIG_ARC_BUILTIN_DTB_NAME="nsim_700" CONFIG_ARC_BUILTIN_DTB_NAME="nsim_700"
CONFIG_PREEMPT=y CONFIG_PREEMPT=y
# CONFIG_COMPACTION is not set # CONFIG_COMPACTION is not set
# CONFIG_CROSS_MEMORY_ATTACH is not set
CONFIG_NET=y CONFIG_NET=y
CONFIG_PACKET=y CONFIG_PACKET=y
CONFIG_UNIX=y CONFIG_UNIX=y
@ -34,6 +34,7 @@ CONFIG_UNIX_DIAG=y
CONFIG_NET_KEY=y CONFIG_NET_KEY=y
CONFIG_INET=y CONFIG_INET=y
# CONFIG_IPV6 is not set # CONFIG_IPV6 is not set
CONFIG_DEVTMPFS=y
# CONFIG_STANDALONE is not set # CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set # CONFIG_PREVENT_FIRMWARE_BUILD is not set
# CONFIG_FIRMWARE_IN_KERNEL is not set # CONFIG_FIRMWARE_IN_KERNEL is not set
@ -51,7 +52,6 @@ CONFIG_SERIAL_ARC=y
CONFIG_SERIAL_ARC_CONSOLE=y CONFIG_SERIAL_ARC_CONSOLE=y
# CONFIG_HW_RANDOM is not set # CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set # CONFIG_HWMON is not set
# CONFIG_VGA_CONSOLE is not set
# CONFIG_HID is not set # CONFIG_HID is not set
# CONFIG_USB_SUPPORT is not set # CONFIG_USB_SUPPORT is not set
# CONFIG_IOMMU_SUPPORT is not set # CONFIG_IOMMU_SUPPORT is not set
@ -63,4 +63,3 @@ CONFIG_NFS_FS=y
# CONFIG_ENABLE_WARN_DEPRECATED is not set # CONFIG_ENABLE_WARN_DEPRECATED is not set
# CONFIG_ENABLE_MUST_CHECK is not set # CONFIG_ENABLE_MUST_CHECK is not set
# CONFIG_DEBUG_PREEMPT is not set # CONFIG_DEBUG_PREEMPT is not set
CONFIG_XZ_DEC=y

View file

@ -35,6 +35,7 @@ CONFIG_UNIX_DIAG=y
CONFIG_NET_KEY=y CONFIG_NET_KEY=y
CONFIG_INET=y CONFIG_INET=y
# CONFIG_IPV6 is not set # CONFIG_IPV6 is not set
CONFIG_DEVTMPFS=y
# CONFIG_STANDALONE is not set # CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set # CONFIG_PREVENT_FIRMWARE_BUILD is not set
# CONFIG_FIRMWARE_IN_KERNEL is not set # CONFIG_FIRMWARE_IN_KERNEL is not set
@ -49,7 +50,6 @@ CONFIG_SERIAL_ARC=y
CONFIG_SERIAL_ARC_CONSOLE=y CONFIG_SERIAL_ARC_CONSOLE=y
# CONFIG_HW_RANDOM is not set # CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set # CONFIG_HWMON is not set
# CONFIG_VGA_CONSOLE is not set
# CONFIG_HID is not set # CONFIG_HID is not set
# CONFIG_USB_SUPPORT is not set # CONFIG_USB_SUPPORT is not set
# CONFIG_IOMMU_SUPPORT is not set # CONFIG_IOMMU_SUPPORT is not set
@ -61,4 +61,3 @@ CONFIG_NFS_FS=y
# CONFIG_ENABLE_WARN_DEPRECATED is not set # CONFIG_ENABLE_WARN_DEPRECATED is not set
# CONFIG_ENABLE_MUST_CHECK is not set # CONFIG_ENABLE_MUST_CHECK is not set
# CONFIG_DEBUG_PREEMPT is not set # CONFIG_DEBUG_PREEMPT is not set
CONFIG_XZ_DEC=y

View file

@ -2,6 +2,7 @@ CONFIG_CROSS_COMPILE="arc-linux-"
# CONFIG_LOCALVERSION_AUTO is not set # CONFIG_LOCALVERSION_AUTO is not set
CONFIG_DEFAULT_HOSTNAME="ARCLinux" CONFIG_DEFAULT_HOSTNAME="ARCLinux"
# CONFIG_SWAP is not set # CONFIG_SWAP is not set
# CONFIG_CROSS_MEMORY_ATTACH is not set
CONFIG_HIGH_RES_TIMERS=y CONFIG_HIGH_RES_TIMERS=y
CONFIG_IKCONFIG=y CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y CONFIG_IKCONFIG_PROC=y
@ -21,13 +22,11 @@ CONFIG_MODULES=y
# CONFIG_IOSCHED_DEADLINE is not set # CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set # CONFIG_IOSCHED_CFQ is not set
CONFIG_ARC_PLAT_SIM=y CONFIG_ARC_PLAT_SIM=y
CONFIG_ARC_BOARD_ML509=y
CONFIG_ISA_ARCV2=y CONFIG_ISA_ARCV2=y
CONFIG_SMP=y CONFIG_SMP=y
CONFIG_ARC_BUILTIN_DTB_NAME="nsim_hs_idu" CONFIG_ARC_BUILTIN_DTB_NAME="nsim_hs_idu"
CONFIG_PREEMPT=y CONFIG_PREEMPT=y
# CONFIG_COMPACTION is not set # CONFIG_COMPACTION is not set
# CONFIG_CROSS_MEMORY_ATTACH is not set
CONFIG_NET=y CONFIG_NET=y
CONFIG_PACKET=y CONFIG_PACKET=y
CONFIG_UNIX=y CONFIG_UNIX=y
@ -35,6 +34,7 @@ CONFIG_UNIX_DIAG=y
CONFIG_NET_KEY=y CONFIG_NET_KEY=y
CONFIG_INET=y CONFIG_INET=y
# CONFIG_IPV6 is not set # CONFIG_IPV6 is not set
CONFIG_DEVTMPFS=y
# CONFIG_STANDALONE is not set # CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set # CONFIG_PREVENT_FIRMWARE_BUILD is not set
# CONFIG_FIRMWARE_IN_KERNEL is not set # CONFIG_FIRMWARE_IN_KERNEL is not set
@ -49,7 +49,6 @@ CONFIG_SERIAL_ARC=y
CONFIG_SERIAL_ARC_CONSOLE=y CONFIG_SERIAL_ARC_CONSOLE=y
# CONFIG_HW_RANDOM is not set # CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set # CONFIG_HWMON is not set
# CONFIG_VGA_CONSOLE is not set
# CONFIG_HID is not set # CONFIG_HID is not set
# CONFIG_USB_SUPPORT is not set # CONFIG_USB_SUPPORT is not set
# CONFIG_IOMMU_SUPPORT is not set # CONFIG_IOMMU_SUPPORT is not set
@ -60,4 +59,3 @@ CONFIG_TMPFS=y
CONFIG_NFS_FS=y CONFIG_NFS_FS=y
# CONFIG_ENABLE_WARN_DEPRECATED is not set # CONFIG_ENABLE_WARN_DEPRECATED is not set
# CONFIG_ENABLE_MUST_CHECK is not set # CONFIG_ENABLE_MUST_CHECK is not set
CONFIG_XZ_DEC=y

View file

@ -33,6 +33,7 @@ CONFIG_UNIX_DIAG=y
CONFIG_NET_KEY=y CONFIG_NET_KEY=y
CONFIG_INET=y CONFIG_INET=y
# CONFIG_IPV6 is not set # CONFIG_IPV6 is not set
CONFIG_DEVTMPFS=y
# CONFIG_STANDALONE is not set # CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set # CONFIG_PREVENT_FIRMWARE_BUILD is not set
# CONFIG_FIRMWARE_IN_KERNEL is not set # CONFIG_FIRMWARE_IN_KERNEL is not set
@ -58,7 +59,6 @@ CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_HW_RANDOM is not set # CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set # CONFIG_HWMON is not set
CONFIG_FB=y CONFIG_FB=y
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_LOGO=y CONFIG_LOGO=y
# CONFIG_HID is not set # CONFIG_HID is not set

View file

@ -34,12 +34,12 @@ CONFIG_UNIX_DIAG=y
CONFIG_NET_KEY=y CONFIG_NET_KEY=y
CONFIG_INET=y CONFIG_INET=y
# CONFIG_IPV6 is not set # CONFIG_IPV6 is not set
CONFIG_DEVTMPFS=y
# CONFIG_STANDALONE is not set # CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set # CONFIG_PREVENT_FIRMWARE_BUILD is not set
# CONFIG_FIRMWARE_IN_KERNEL is not set # CONFIG_FIRMWARE_IN_KERNEL is not set
# CONFIG_BLK_DEV is not set # CONFIG_BLK_DEV is not set
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y
CONFIG_NET_OSCI_LAN=y
CONFIG_INPUT_EVDEV=y CONFIG_INPUT_EVDEV=y
# CONFIG_MOUSE_PS2_ALPS is not set # CONFIG_MOUSE_PS2_ALPS is not set
# CONFIG_MOUSE_PS2_LOGIPS2PP is not set # CONFIG_MOUSE_PS2_LOGIPS2PP is not set
@ -58,7 +58,6 @@ CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_HW_RANDOM is not set # CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set # CONFIG_HWMON is not set
CONFIG_FB=y CONFIG_FB=y
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_LOGO=y CONFIG_LOGO=y
# CONFIG_HID is not set # CONFIG_HID is not set

View file

@ -2,6 +2,7 @@ CONFIG_CROSS_COMPILE="arc-linux-"
CONFIG_DEFAULT_HOSTNAME="ARCLinux" CONFIG_DEFAULT_HOSTNAME="ARCLinux"
# CONFIG_SWAP is not set # CONFIG_SWAP is not set
CONFIG_SYSVIPC=y CONFIG_SYSVIPC=y
# CONFIG_CROSS_MEMORY_ATTACH is not set
CONFIG_NO_HZ=y CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y CONFIG_HIGH_RES_TIMERS=y
CONFIG_IKCONFIG=y CONFIG_IKCONFIG=y
@ -18,15 +19,11 @@ CONFIG_MODULES=y
# CONFIG_IOSCHED_DEADLINE is not set # CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set # CONFIG_IOSCHED_CFQ is not set
CONFIG_ARC_PLAT_SIM=y CONFIG_ARC_PLAT_SIM=y
CONFIG_ARC_BOARD_ML509=y
CONFIG_ISA_ARCV2=y CONFIG_ISA_ARCV2=y
CONFIG_SMP=y CONFIG_SMP=y
CONFIG_ARC_HAS_LL64=y
# CONFIG_ARC_HAS_RTSC is not set
CONFIG_ARC_BUILTIN_DTB_NAME="nsimosci_hs_idu" CONFIG_ARC_BUILTIN_DTB_NAME="nsimosci_hs_idu"
CONFIG_PREEMPT=y CONFIG_PREEMPT=y
# CONFIG_COMPACTION is not set # CONFIG_COMPACTION is not set
# CONFIG_CROSS_MEMORY_ATTACH is not set
CONFIG_NET=y CONFIG_NET=y
CONFIG_PACKET=y CONFIG_PACKET=y
CONFIG_PACKET_DIAG=y CONFIG_PACKET_DIAG=y
@ -40,6 +37,7 @@ CONFIG_INET=y
# CONFIG_INET_LRO is not set # CONFIG_INET_LRO is not set
# CONFIG_IPV6 is not set # CONFIG_IPV6 is not set
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_DEVTMPFS=y
# CONFIG_STANDALONE is not set # CONFIG_STANDALONE is not set
# CONFIG_PREVENT_FIRMWARE_BUILD is not set # CONFIG_PREVENT_FIRMWARE_BUILD is not set
# CONFIG_FIRMWARE_IN_KERNEL is not set # CONFIG_FIRMWARE_IN_KERNEL is not set
@ -56,14 +54,11 @@ CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_STMICRO is not set # CONFIG_NET_VENDOR_STMICRO is not set
# CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_VIA is not set
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
CONFIG_NET_OSCI_LAN=y
# CONFIG_WLAN is not set # CONFIG_WLAN is not set
CONFIG_INPUT_EVDEV=y CONFIG_INPUT_EVDEV=y
CONFIG_MOUSE_PS2_TOUCHKIT=y CONFIG_MOUSE_PS2_TOUCHKIT=y
# CONFIG_SERIO_SERPORT is not set # CONFIG_SERIO_SERPORT is not set
CONFIG_SERIO_LIBPS2=y
CONFIG_SERIO_ARC_PS2=y CONFIG_SERIO_ARC_PS2=y
CONFIG_VT_HW_CONSOLE_BINDING=y
# CONFIG_LEGACY_PTYS is not set # CONFIG_LEGACY_PTYS is not set
# CONFIG_DEVKMEM is not set # CONFIG_DEVKMEM is not set
CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250=y
@ -75,9 +70,6 @@ CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_HW_RANDOM is not set # CONFIG_HW_RANDOM is not set
# CONFIG_HWMON is not set # CONFIG_HWMON is not set
CONFIG_FB=y CONFIG_FB=y
CONFIG_ARCPGU_RGB888=y
CONFIG_ARCPGU_DISPTYPE=0
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_LOGO=y CONFIG_LOGO=y
# CONFIG_HID is not set # CONFIG_HID is not set

View file

@ -3,6 +3,7 @@ CONFIG_CROSS_COMPILE="arc-linux-"
CONFIG_DEFAULT_HOSTNAME="tb10x" CONFIG_DEFAULT_HOSTNAME="tb10x"
CONFIG_SYSVIPC=y CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE=y
# CONFIG_CROSS_MEMORY_ATTACH is not set
CONFIG_HIGH_RES_TIMERS=y CONFIG_HIGH_RES_TIMERS=y
CONFIG_BSD_PROCESS_ACCT=y CONFIG_BSD_PROCESS_ACCT=y
CONFIG_BSD_PROCESS_ACCT_V3=y CONFIG_BSD_PROCESS_ACCT_V3=y
@ -26,12 +27,10 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_BLOCK is not set # CONFIG_BLOCK is not set
CONFIG_ARC_PLAT_TB10X=y CONFIG_ARC_PLAT_TB10X=y
CONFIG_ARC_CACHE_LINE_SHIFT=5 CONFIG_ARC_CACHE_LINE_SHIFT=5
CONFIG_ARC_STACK_NONEXEC=y
CONFIG_HZ=250 CONFIG_HZ=250
CONFIG_ARC_BUILTIN_DTB_NAME="abilis_tb100_dvk" CONFIG_ARC_BUILTIN_DTB_NAME="abilis_tb100_dvk"
CONFIG_PREEMPT_VOLUNTARY=y CONFIG_PREEMPT_VOLUNTARY=y
# CONFIG_COMPACTION is not set # CONFIG_COMPACTION is not set
# CONFIG_CROSS_MEMORY_ATTACH is not set
CONFIG_NET=y CONFIG_NET=y
CONFIG_PACKET=y CONFIG_PACKET=y
CONFIG_UNIX=y CONFIG_UNIX=y
@ -44,8 +43,8 @@ CONFIG_IP_MULTICAST=y
# CONFIG_INET_DIAG is not set # CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set # CONFIG_IPV6 is not set
# CONFIG_WIRELESS is not set # CONFIG_WIRELESS is not set
CONFIG_DEVTMPFS=y
# CONFIG_FIRMWARE_IN_KERNEL is not set # CONFIG_FIRMWARE_IN_KERNEL is not set
CONFIG_PROC_DEVICETREE=y
CONFIG_NETDEVICES=y CONFIG_NETDEVICES=y
# CONFIG_NET_CADENCE is not set # CONFIG_NET_CADENCE is not set
# CONFIG_NET_VENDOR_BROADCOM is not set # CONFIG_NET_VENDOR_BROADCOM is not set
@ -55,9 +54,6 @@ CONFIG_NETDEVICES=y
# CONFIG_NET_VENDOR_NATSEMI is not set # CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_SEEQ is not set
CONFIG_STMMAC_ETH=y CONFIG_STMMAC_ETH=y
CONFIG_STMMAC_DEBUG_FS=y
CONFIG_STMMAC_DA=y
CONFIG_STMMAC_CHAINED=y
# CONFIG_NET_VENDOR_WIZNET is not set # CONFIG_NET_VENDOR_WIZNET is not set
# CONFIG_WLAN is not set # CONFIG_WLAN is not set
# CONFIG_INPUT is not set # CONFIG_INPUT is not set
@ -91,7 +87,6 @@ CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_LEDS_TRIGGER_TRANSIENT=y CONFIG_LEDS_TRIGGER_TRANSIENT=y
CONFIG_DMADEVICES=y CONFIG_DMADEVICES=y
CONFIG_DW_DMAC=y CONFIG_DW_DMAC=y
CONFIG_NET_DMA=y
CONFIG_ASYNC_TX_DMA=y CONFIG_ASYNC_TX_DMA=y
# CONFIG_IOMMU_SUPPORT is not set # CONFIG_IOMMU_SUPPORT is not set
# CONFIG_DNOTIFY is not set # CONFIG_DNOTIFY is not set
@ -100,17 +95,16 @@ CONFIG_TMPFS=y
CONFIG_CONFIGFS_FS=y CONFIG_CONFIGFS_FS=y
# CONFIG_MISC_FILESYSTEMS is not set # CONFIG_MISC_FILESYSTEMS is not set
# CONFIG_NETWORK_FILESYSTEMS is not set # CONFIG_NETWORK_FILESYSTEMS is not set
CONFIG_DEBUG_INFO=y
# CONFIG_ENABLE_WARN_DEPRECATED is not set # CONFIG_ENABLE_WARN_DEPRECATED is not set
CONFIG_MAGIC_SYSRQ=y
CONFIG_STRIP_ASM_SYMS=y CONFIG_STRIP_ASM_SYMS=y
CONFIG_DEBUG_FS=y CONFIG_DEBUG_FS=y
CONFIG_HEADERS_CHECK=y CONFIG_HEADERS_CHECK=y
CONFIG_DEBUG_SECTION_MISMATCH=y CONFIG_DEBUG_SECTION_MISMATCH=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_MEMORY_INIT=y
CONFIG_DEBUG_STACKOVERFLOW=y
CONFIG_DETECT_HUNG_TASK=y CONFIG_DETECT_HUNG_TASK=y
CONFIG_SCHEDSTATS=y CONFIG_SCHEDSTATS=y
CONFIG_TIMER_STATS=y CONFIG_TIMER_STATS=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_MEMORY_INIT=y
CONFIG_DEBUG_STACKOVERFLOW=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_HW is not set # CONFIG_CRYPTO_HW is not set

View file

@ -10,7 +10,8 @@
#define _ASM_ARC_ARCREGS_H #define _ASM_ARC_ARCREGS_H
/* Build Configuration Registers */ /* Build Configuration Registers */
#define ARC_REG_DCCMBASE_BCR 0x61 /* DCCM Base Addr */ #define ARC_REG_AUX_DCCM 0x18 /* DCCM Base Addr ARCv2 */
#define ARC_REG_DCCM_BASE_BUILD 0x61 /* DCCM Base Addr ARCompact */
#define ARC_REG_CRC_BCR 0x62 #define ARC_REG_CRC_BCR 0x62
#define ARC_REG_VECBASE_BCR 0x68 #define ARC_REG_VECBASE_BCR 0x68
#define ARC_REG_PERIBASE_BCR 0x69 #define ARC_REG_PERIBASE_BCR 0x69
@ -18,10 +19,10 @@
#define ARC_REG_DPFP_BCR 0x6C /* ARCompact: Dbl Precision FPU */ #define ARC_REG_DPFP_BCR 0x6C /* ARCompact: Dbl Precision FPU */
#define ARC_REG_FP_V2_BCR 0xc8 /* ARCv2 FPU */ #define ARC_REG_FP_V2_BCR 0xc8 /* ARCv2 FPU */
#define ARC_REG_SLC_BCR 0xce #define ARC_REG_SLC_BCR 0xce
#define ARC_REG_DCCM_BCR 0x74 /* DCCM Present + SZ */ #define ARC_REG_DCCM_BUILD 0x74 /* DCCM size (common) */
#define ARC_REG_TIMERS_BCR 0x75 #define ARC_REG_TIMERS_BCR 0x75
#define ARC_REG_AP_BCR 0x76 #define ARC_REG_AP_BCR 0x76
#define ARC_REG_ICCM_BCR 0x78 #define ARC_REG_ICCM_BUILD 0x78 /* ICCM size (common) */
#define ARC_REG_XY_MEM_BCR 0x79 #define ARC_REG_XY_MEM_BCR 0x79
#define ARC_REG_MAC_BCR 0x7a #define ARC_REG_MAC_BCR 0x7a
#define ARC_REG_MUL_BCR 0x7b #define ARC_REG_MUL_BCR 0x7b
@ -36,6 +37,7 @@
#define ARC_REG_IRQ_BCR 0xF3 #define ARC_REG_IRQ_BCR 0xF3
#define ARC_REG_SMART_BCR 0xFF #define ARC_REG_SMART_BCR 0xFF
#define ARC_REG_CLUSTER_BCR 0xcf #define ARC_REG_CLUSTER_BCR 0xcf
#define ARC_REG_AUX_ICCM 0x208 /* ICCM Base Addr (ARCv2) */
/* status32 Bits Positions */ /* status32 Bits Positions */
#define STATUS_AE_BIT 5 /* Exception active */ #define STATUS_AE_BIT 5 /* Exception active */
@ -246,7 +248,7 @@ struct bcr_perip {
#endif #endif
}; };
struct bcr_iccm { struct bcr_iccm_arcompact {
#ifdef CONFIG_CPU_BIG_ENDIAN #ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int base:16, pad:5, sz:3, ver:8; unsigned int base:16, pad:5, sz:3, ver:8;
#else #else
@ -254,17 +256,15 @@ struct bcr_iccm {
#endif #endif
}; };
/* DCCM Base Address Register: ARC_REG_DCCMBASE_BCR */ struct bcr_iccm_arcv2 {
struct bcr_dccm_base {
#ifdef CONFIG_CPU_BIG_ENDIAN #ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int addr:24, ver:8; unsigned int pad:8, sz11:4, sz01:4, sz10:4, sz00:4, ver:8;
#else #else
unsigned int ver:8, addr:24; unsigned int ver:8, sz00:4, sz10:4, sz01:4, sz11:4, pad:8;
#endif #endif
}; };
/* DCCM RAM Configuration Register: ARC_REG_DCCM_BCR */ struct bcr_dccm_arcompact {
struct bcr_dccm {
#ifdef CONFIG_CPU_BIG_ENDIAN #ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int res:21, sz:3, ver:8; unsigned int res:21, sz:3, ver:8;
#else #else
@ -272,6 +272,14 @@ struct bcr_dccm {
#endif #endif
}; };
struct bcr_dccm_arcv2 {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad2:12, cyc:3, pad1:1, sz1:4, sz0:4, ver:8;
#else
unsigned int ver:8, sz0:4, sz1:4, pad1:1, cyc:3, pad2:12;
#endif
};
/* ARCompact: Both SP and DP FPU BCRs have same format */ /* ARCompact: Both SP and DP FPU BCRs have same format */
struct bcr_fp_arcompact { struct bcr_fp_arcompact {
#ifdef CONFIG_CPU_BIG_ENDIAN #ifdef CONFIG_CPU_BIG_ENDIAN
@ -315,9 +323,9 @@ struct bcr_bpu_arcv2 {
struct bcr_generic { struct bcr_generic {
#ifdef CONFIG_CPU_BIG_ENDIAN #ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int pad:24, ver:8; unsigned int info:24, ver:8;
#else #else
unsigned int ver:8, pad:24; unsigned int ver:8, info:24;
#endif #endif
}; };

View file

@ -16,11 +16,9 @@
#ifdef CONFIG_ISA_ARCOMPACT #ifdef CONFIG_ISA_ARCOMPACT
#define TIMER0_IRQ 3 #define TIMER0_IRQ 3
#define TIMER1_IRQ 4 #define TIMER1_IRQ 4
#define IPI_IRQ (NR_CPU_IRQS-1) /* dummy to enable SMP build for up hardware */
#else #else
#define TIMER0_IRQ 16 #define TIMER0_IRQ 16
#define TIMER1_IRQ 17 #define TIMER1_IRQ 17
#define IPI_IRQ 19
#endif #endif
#include <linux/interrupt.h> #include <linux/interrupt.h>

View file

@ -22,6 +22,7 @@
#define AUX_IRQ_CTRL 0x00E #define AUX_IRQ_CTRL 0x00E
#define AUX_IRQ_ACT 0x043 /* Active Intr across all levels */ #define AUX_IRQ_ACT 0x043 /* Active Intr across all levels */
#define AUX_IRQ_LVL_PEND 0x200 /* Pending Intr across all levels */ #define AUX_IRQ_LVL_PEND 0x200 /* Pending Intr across all levels */
#define AUX_IRQ_HINT 0x201 /* For generating Soft Interrupts */
#define AUX_IRQ_PRIORITY 0x206 #define AUX_IRQ_PRIORITY 0x206
#define ICAUSE 0x40a #define ICAUSE 0x40a
#define AUX_IRQ_SELECT 0x40b #define AUX_IRQ_SELECT 0x40b
@ -115,6 +116,16 @@ static inline int arch_irqs_disabled(void)
return arch_irqs_disabled_flags(arch_local_save_flags()); return arch_irqs_disabled_flags(arch_local_save_flags());
} }
static inline void arc_softirq_trigger(int irq)
{
write_aux_reg(AUX_IRQ_HINT, irq);
}
static inline void arc_softirq_clear(int irq)
{
write_aux_reg(AUX_IRQ_HINT, 0);
}
#else #else
.macro IRQ_DISABLE scratch .macro IRQ_DISABLE scratch

View file

@ -45,11 +45,12 @@ VECTOR reserved ; Reserved slots
VECTOR handle_interrupt ; (16) Timer0 VECTOR handle_interrupt ; (16) Timer0
VECTOR handle_interrupt ; unused (Timer1) VECTOR handle_interrupt ; unused (Timer1)
VECTOR handle_interrupt ; unused (WDT) VECTOR handle_interrupt ; unused (WDT)
VECTOR handle_interrupt ; (19) ICI (inter core interrupt) VECTOR handle_interrupt ; (19) Inter core Interrupt (IPI)
VECTOR handle_interrupt VECTOR handle_interrupt ; (20) perf Interrupt
VECTOR handle_interrupt VECTOR handle_interrupt ; (21) Software Triggered Intr (Self IPI)
VECTOR handle_interrupt VECTOR handle_interrupt ; unused
VECTOR handle_interrupt ; (23) End of fixed IRQs VECTOR handle_interrupt ; (23) unused
# End of fixed IRQs
.rept CONFIG_ARC_NUMBER_OF_INTERRUPTS - 8 .rept CONFIG_ARC_NUMBER_OF_INTERRUPTS - 8
VECTOR handle_interrupt VECTOR handle_interrupt

View file

@ -81,9 +81,6 @@ static int arc_intc_domain_map(struct irq_domain *d, unsigned int irq,
{ {
switch (irq) { switch (irq) {
case TIMER0_IRQ: case TIMER0_IRQ:
#ifdef CONFIG_SMP
case IPI_IRQ:
#endif
irq_set_chip_and_handler(irq, &onchip_intc, handle_percpu_irq); irq_set_chip_and_handler(irq, &onchip_intc, handle_percpu_irq);
break; break;
default: default:

View file

@ -11,9 +11,13 @@
#include <linux/smp.h> #include <linux/smp.h>
#include <linux/irq.h> #include <linux/irq.h>
#include <linux/spinlock.h> #include <linux/spinlock.h>
#include <asm/irqflags-arcv2.h>
#include <asm/mcip.h> #include <asm/mcip.h>
#include <asm/setup.h> #include <asm/setup.h>
#define IPI_IRQ 19
#define SOFTIRQ_IRQ 21
static char smp_cpuinfo_buf[128]; static char smp_cpuinfo_buf[128];
static int idu_detected; static int idu_detected;
@ -22,6 +26,7 @@ static DEFINE_RAW_SPINLOCK(mcip_lock);
static void mcip_setup_per_cpu(int cpu) static void mcip_setup_per_cpu(int cpu)
{ {
smp_ipi_irq_setup(cpu, IPI_IRQ); smp_ipi_irq_setup(cpu, IPI_IRQ);
smp_ipi_irq_setup(cpu, SOFTIRQ_IRQ);
} }
static void mcip_ipi_send(int cpu) static void mcip_ipi_send(int cpu)
@ -29,46 +34,44 @@ static void mcip_ipi_send(int cpu)
unsigned long flags; unsigned long flags;
int ipi_was_pending; int ipi_was_pending;
/* ARConnect can only send IPI to others */
if (unlikely(cpu == raw_smp_processor_id())) {
arc_softirq_trigger(SOFTIRQ_IRQ);
return;
}
raw_spin_lock_irqsave(&mcip_lock, flags);
/* /*
* NOTE: We must spin here if the other cpu hasn't yet * If receiver already has a pending interrupt, elide sending this one.
* serviced a previous message. This can burn lots * Linux cross core calling works well with concurrent IPIs
* of time, but we MUST follows this protocol or * coalesced into one
* ipi messages can be lost!!! * see arch/arc/kernel/smp.c: ipi_send_msg_one()
* Also, we must release the lock in this loop because
* the other side may get to this same loop and not
* be able to ack -- thus causing deadlock.
*/ */
__mcip_cmd(CMD_INTRPT_READ_STATUS, cpu);
ipi_was_pending = read_aux_reg(ARC_REG_MCIP_READBACK);
if (!ipi_was_pending)
__mcip_cmd(CMD_INTRPT_GENERATE_IRQ, cpu);
do {
raw_spin_lock_irqsave(&mcip_lock, flags);
__mcip_cmd(CMD_INTRPT_READ_STATUS, cpu);
ipi_was_pending = read_aux_reg(ARC_REG_MCIP_READBACK);
if (ipi_was_pending == 0)
break; /* break out but keep lock */
raw_spin_unlock_irqrestore(&mcip_lock, flags);
} while (1);
__mcip_cmd(CMD_INTRPT_GENERATE_IRQ, cpu);
raw_spin_unlock_irqrestore(&mcip_lock, flags); raw_spin_unlock_irqrestore(&mcip_lock, flags);
#ifdef CONFIG_ARC_IPI_DBG
if (ipi_was_pending)
pr_info("IPI ACK delayed from cpu %d\n", cpu);
#endif
} }
static void mcip_ipi_clear(int irq) static void mcip_ipi_clear(int irq)
{ {
unsigned int cpu, c; unsigned int cpu, c;
unsigned long flags; unsigned long flags;
unsigned int __maybe_unused copy;
if (unlikely(irq == SOFTIRQ_IRQ)) {
arc_softirq_clear(irq);
return;
}
raw_spin_lock_irqsave(&mcip_lock, flags); raw_spin_lock_irqsave(&mcip_lock, flags);
/* Who sent the IPI */ /* Who sent the IPI */
__mcip_cmd(CMD_INTRPT_CHECK_SOURCE, 0); __mcip_cmd(CMD_INTRPT_CHECK_SOURCE, 0);
copy = cpu = read_aux_reg(ARC_REG_MCIP_READBACK); /* 1,2,4,8... */ cpu = read_aux_reg(ARC_REG_MCIP_READBACK); /* 1,2,4,8... */
/* /*
* In rare case, multiple concurrent IPIs sent to same target can * In rare case, multiple concurrent IPIs sent to same target can
@ -82,12 +85,6 @@ static void mcip_ipi_clear(int irq)
} while (cpu); } while (cpu);
raw_spin_unlock_irqrestore(&mcip_lock, flags); raw_spin_unlock_irqrestore(&mcip_lock, flags);
#ifdef CONFIG_ARC_IPI_DBG
if (c != __ffs(copy))
pr_info("IPIs from %x coalesced to %x\n",
copy, raw_smp_processor_id());
#endif
} }
static void mcip_probe_n_setup(void) static void mcip_probe_n_setup(void)
@ -111,10 +108,11 @@ static void mcip_probe_n_setup(void)
READ_BCR(ARC_REG_MCIP_BCR, mp); READ_BCR(ARC_REG_MCIP_BCR, mp);
sprintf(smp_cpuinfo_buf, sprintf(smp_cpuinfo_buf,
"Extn [SMP]\t: ARConnect (v%d): %d cores with %s%s%s%s\n", "Extn [SMP]\t: ARConnect (v%d): %d cores with %s%s%s%s%s\n",
mp.ver, mp.num_cores, mp.ver, mp.num_cores,
IS_AVAIL1(mp.ipi, "IPI "), IS_AVAIL1(mp.ipi, "IPI "),
IS_AVAIL1(mp.idu, "IDU "), IS_AVAIL1(mp.idu, "IDU "),
IS_AVAIL1(mp.llm, "LLM "),
IS_AVAIL1(mp.dbg, "DEBUG "), IS_AVAIL1(mp.dbg, "DEBUG "),
IS_AVAIL1(mp.gfrc, "GFRC")); IS_AVAIL1(mp.gfrc, "GFRC"));

View file

@ -42,6 +42,53 @@ struct task_struct *_current_task[NR_CPUS]; /* For stack switching */
struct cpuinfo_arc cpuinfo_arc700[NR_CPUS]; struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
static void read_decode_ccm_bcr(struct cpuinfo_arc *cpu)
{
if (is_isa_arcompact()) {
struct bcr_iccm_arcompact iccm;
struct bcr_dccm_arcompact dccm;
READ_BCR(ARC_REG_ICCM_BUILD, iccm);
if (iccm.ver) {
cpu->iccm.sz = 4096 << iccm.sz; /* 8K to 512K */
cpu->iccm.base_addr = iccm.base << 16;
}
READ_BCR(ARC_REG_DCCM_BUILD, dccm);
if (dccm.ver) {
unsigned long base;
cpu->dccm.sz = 2048 << dccm.sz; /* 2K to 256K */
base = read_aux_reg(ARC_REG_DCCM_BASE_BUILD);
cpu->dccm.base_addr = base & ~0xF;
}
} else {
struct bcr_iccm_arcv2 iccm;
struct bcr_dccm_arcv2 dccm;
unsigned long region;
READ_BCR(ARC_REG_ICCM_BUILD, iccm);
if (iccm.ver) {
cpu->iccm.sz = 256 << iccm.sz00; /* 512B to 16M */
if (iccm.sz00 == 0xF && iccm.sz01 > 0)
cpu->iccm.sz <<= iccm.sz01;
region = read_aux_reg(ARC_REG_AUX_ICCM);
cpu->iccm.base_addr = region & 0xF0000000;
}
READ_BCR(ARC_REG_DCCM_BUILD, dccm);
if (dccm.ver) {
cpu->dccm.sz = 256 << dccm.sz0;
if (dccm.sz0 == 0xF && dccm.sz1 > 0)
cpu->dccm.sz <<= dccm.sz1;
region = read_aux_reg(ARC_REG_AUX_DCCM);
cpu->dccm.base_addr = region & 0xF0000000;
}
}
}
static void read_arc_build_cfg_regs(void) static void read_arc_build_cfg_regs(void)
{ {
struct bcr_perip uncached_space; struct bcr_perip uncached_space;
@ -76,36 +123,11 @@ static void read_arc_build_cfg_regs(void)
cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0; /* 1,3 */ cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR) ? 1 : 0; /* 1,3 */
cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0; cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR) ? 1 : 0;
cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */ cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR) > 1 ? 1 : 0; /* 2 */
/* Note that we read the CCM BCRs independent of kernel config
* This is to catch the cases where user doesn't know that
* CCMs are present in hardware build
*/
{
struct bcr_iccm iccm;
struct bcr_dccm dccm;
struct bcr_dccm_base dccm_base;
unsigned int bcr_32bit_val;
bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR);
if (bcr_32bit_val) {
iccm = *((struct bcr_iccm *)&bcr_32bit_val);
cpu->iccm.base_addr = iccm.base << 16;
cpu->iccm.sz = 0x2000 << (iccm.sz - 1);
}
bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR);
if (bcr_32bit_val) {
dccm = *((struct bcr_dccm *)&bcr_32bit_val);
cpu->dccm.sz = 0x800 << (dccm.sz);
READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base);
cpu->dccm.base_addr = dccm_base.addr << 8;
}
}
READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem); READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
/* Read CCM BCRs for boot reporting even if not enabled in Kconfig */
read_decode_ccm_bcr(cpu);
read_decode_mmu_bcr(); read_decode_mmu_bcr();
read_decode_cache_bcr(); read_decode_cache_bcr();
@ -237,8 +259,6 @@ static char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt); n += scnprintf(buf + n, len - n, "mpy[opt %d] ", opt);
} }
n += scnprintf(buf + n, len - n, "%s",
IS_USED_CFG(CONFIG_ARC_HAS_HW_MPY));
} }
n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n", n += scnprintf(buf + n, len - n, "%s%s%s%s%s%s%s%s\n",

View file

@ -336,11 +336,8 @@ irqreturn_t do_IPI(int irq, void *dev_id)
int rc; int rc;
rc = __do_IPI(msg); rc = __do_IPI(msg);
#ifdef CONFIG_ARC_IPI_DBG
/* IPI received but no valid @msg */
if (rc) if (rc)
pr_info("IPI with bogus msg %ld in %ld\n", msg, copy); pr_info("IPI with bogus msg %ld in %ld\n", msg, copy);
#endif
pending &= ~(1U << msg); pending &= ~(1U << msg);
} while (pending); } while (pending);

View file

@ -195,5 +195,7 @@ CFLAGS_font.o := -Dstatic=
$(obj)/font.c: $(FONTC) $(obj)/font.c: $(FONTC)
$(call cmd,shipped) $(call cmd,shipped)
AFLAGS_hyp-stub.o := -Wa,-march=armv7-a
$(obj)/hyp-stub.S: $(srctree)/arch/$(SRCARCH)/kernel/hyp-stub.S $(obj)/hyp-stub.S: $(srctree)/arch/$(SRCARCH)/kernel/hyp-stub.S
$(call cmd,shipped) $(call cmd,shipped)

View file

@ -285,8 +285,10 @@
}; };
}; };
/include/ "tps65217.dtsi"
&tps { &tps {
compatible = "ti,tps65217";
/* /*
* Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
* mode") at poweroff. Most BeagleBone versions do not support RTC-only * mode") at poweroff. Most BeagleBone versions do not support RTC-only
@ -307,17 +309,12 @@
ti,pmic-shutdown-controller; ti,pmic-shutdown-controller;
regulators { regulators {
#address-cells = <1>;
#size-cells = <0>;
dcdc1_reg: regulator@0 { dcdc1_reg: regulator@0 {
reg = <0>;
regulator-name = "vdds_dpr"; regulator-name = "vdds_dpr";
regulator-always-on; regulator-always-on;
}; };
dcdc2_reg: regulator@1 { dcdc2_reg: regulator@1 {
reg = <1>;
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
regulator-name = "vdd_mpu"; regulator-name = "vdd_mpu";
regulator-min-microvolt = <925000>; regulator-min-microvolt = <925000>;
@ -327,7 +324,6 @@
}; };
dcdc3_reg: regulator@2 { dcdc3_reg: regulator@2 {
reg = <2>;
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
regulator-name = "vdd_core"; regulator-name = "vdd_core";
regulator-min-microvolt = <925000>; regulator-min-microvolt = <925000>;
@ -337,25 +333,21 @@
}; };
ldo1_reg: regulator@3 { ldo1_reg: regulator@3 {
reg = <3>;
regulator-name = "vio,vrtc,vdds"; regulator-name = "vio,vrtc,vdds";
regulator-always-on; regulator-always-on;
}; };
ldo2_reg: regulator@4 { ldo2_reg: regulator@4 {
reg = <4>;
regulator-name = "vdd_3v3aux"; regulator-name = "vdd_3v3aux";
regulator-always-on; regulator-always-on;
}; };
ldo3_reg: regulator@5 { ldo3_reg: regulator@5 {
reg = <5>;
regulator-name = "vdd_1v8"; regulator-name = "vdd_1v8";
regulator-always-on; regulator-always-on;
}; };
ldo4_reg: regulator@6 { ldo4_reg: regulator@6 {
reg = <6>;
regulator-name = "vdd_3v3a"; regulator-name = "vdd_3v3a";
regulator-always-on; regulator-always-on;
}; };

View file

@ -128,21 +128,16 @@
}; };
/include/ "tps65217.dtsi"
&tps { &tps {
compatible = "ti,tps65217";
regulators { regulators {
#address-cells = <1>;
#size-cells = <0>;
dcdc1_reg: regulator@0 { dcdc1_reg: regulator@0 {
reg = <0>;
regulator-name = "vdds_dpr"; regulator-name = "vdds_dpr";
regulator-always-on; regulator-always-on;
}; };
dcdc2_reg: regulator@1 { dcdc2_reg: regulator@1 {
reg = <1>;
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
regulator-name = "vdd_mpu"; regulator-name = "vdd_mpu";
regulator-min-microvolt = <925000>; regulator-min-microvolt = <925000>;
@ -152,7 +147,6 @@
}; };
dcdc3_reg: regulator@2 { dcdc3_reg: regulator@2 {
reg = <2>;
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
regulator-name = "vdd_core"; regulator-name = "vdd_core";
regulator-min-microvolt = <925000>; regulator-min-microvolt = <925000>;
@ -162,28 +156,24 @@
}; };
ldo1_reg: regulator@3 { ldo1_reg: regulator@3 {
reg = <3>;
regulator-name = "vio,vrtc,vdds"; regulator-name = "vio,vrtc,vdds";
regulator-boot-on; regulator-boot-on;
regulator-always-on; regulator-always-on;
}; };
ldo2_reg: regulator@4 { ldo2_reg: regulator@4 {
reg = <4>;
regulator-name = "vdd_3v3aux"; regulator-name = "vdd_3v3aux";
regulator-boot-on; regulator-boot-on;
regulator-always-on; regulator-always-on;
}; };
ldo3_reg: regulator@5 { ldo3_reg: regulator@5 {
reg = <5>;
regulator-name = "vdd_1v8"; regulator-name = "vdd_1v8";
regulator-boot-on; regulator-boot-on;
regulator-always-on; regulator-always-on;
}; };
ldo4_reg: regulator@6 { ldo4_reg: regulator@6 {
reg = <6>;
regulator-name = "vdd_3v3d"; regulator-name = "vdd_3v3d";
regulator-boot-on; regulator-boot-on;
regulator-always-on; regulator-always-on;

View file

@ -375,15 +375,11 @@
wp-gpios = <&gpio3 18 0>; wp-gpios = <&gpio3 18 0>;
}; };
#include "tps65217.dtsi"
&tps { &tps {
compatible = "ti,tps65217";
regulators { regulators {
#address-cells = <1>;
#size-cells = <0>;
dcdc1_reg: regulator@0 { dcdc1_reg: regulator@0 {
reg = <0>;
/* +1.5V voltage with ±4% tolerance */ /* +1.5V voltage with ±4% tolerance */
regulator-min-microvolt = <1450000>; regulator-min-microvolt = <1450000>;
regulator-max-microvolt = <1550000>; regulator-max-microvolt = <1550000>;
@ -392,7 +388,6 @@
}; };
dcdc2_reg: regulator@1 { dcdc2_reg: regulator@1 {
reg = <1>;
/* VDD_MPU voltage limits 0.95V - 1.1V with ±4% tolerance */ /* VDD_MPU voltage limits 0.95V - 1.1V with ±4% tolerance */
regulator-name = "vdd_mpu"; regulator-name = "vdd_mpu";
regulator-min-microvolt = <915000>; regulator-min-microvolt = <915000>;
@ -402,7 +397,6 @@
}; };
dcdc3_reg: regulator@2 { dcdc3_reg: regulator@2 {
reg = <2>;
/* VDD_CORE voltage limits 0.95V - 1.1V with ±4% tolerance */ /* VDD_CORE voltage limits 0.95V - 1.1V with ±4% tolerance */
regulator-name = "vdd_core"; regulator-name = "vdd_core";
regulator-min-microvolt = <915000>; regulator-min-microvolt = <915000>;
@ -412,7 +406,6 @@
}; };
ldo1_reg: regulator@3 { ldo1_reg: regulator@3 {
reg = <3>;
/* +1.8V voltage with ±4% tolerance */ /* +1.8V voltage with ±4% tolerance */
regulator-min-microvolt = <1750000>; regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <1870000>; regulator-max-microvolt = <1870000>;
@ -421,7 +414,6 @@
}; };
ldo2_reg: regulator@4 { ldo2_reg: regulator@4 {
reg = <4>;
/* +3.3V voltage with ±4% tolerance */ /* +3.3V voltage with ±4% tolerance */
regulator-min-microvolt = <3175000>; regulator-min-microvolt = <3175000>;
regulator-max-microvolt = <3430000>; regulator-max-microvolt = <3430000>;
@ -430,7 +422,6 @@
}; };
ldo3_reg: regulator@5 { ldo3_reg: regulator@5 {
reg = <5>;
/* +1.8V voltage with ±4% tolerance */ /* +1.8V voltage with ±4% tolerance */
regulator-min-microvolt = <1750000>; regulator-min-microvolt = <1750000>;
regulator-max-microvolt = <1870000>; regulator-max-microvolt = <1870000>;
@ -439,7 +430,6 @@
}; };
ldo4_reg: regulator@6 { ldo4_reg: regulator@6 {
reg = <6>;
/* +3.3V voltage with ±4% tolerance */ /* +3.3V voltage with ±4% tolerance */
regulator-min-microvolt = <3175000>; regulator-min-microvolt = <3175000>;
regulator-max-microvolt = <3430000>; regulator-max-microvolt = <3430000>;

View file

@ -420,9 +420,9 @@
vin-supply = <&vbat>; vin-supply = <&vbat>;
}; };
&tps { /include/ "tps65217.dtsi"
compatible = "ti,tps65217";
&tps {
backlight { backlight {
isel = <1>; /* ISET1 */ isel = <1>; /* ISET1 */
fdim = <200>; /* TPS65217_BL_FDIM_200HZ */ fdim = <200>; /* TPS65217_BL_FDIM_200HZ */
@ -430,17 +430,12 @@
}; };
regulators { regulators {
#address-cells = <1>;
#size-cells = <0>;
dcdc1_reg: regulator@0 { dcdc1_reg: regulator@0 {
reg = <0>;
/* VDD_1V8 system supply */ /* VDD_1V8 system supply */
regulator-always-on; regulator-always-on;
}; };
dcdc2_reg: regulator@1 { dcdc2_reg: regulator@1 {
reg = <1>;
/* VDD_CORE voltage limits 0.95V - 1.26V with +/-4% tolerance */ /* VDD_CORE voltage limits 0.95V - 1.26V with +/-4% tolerance */
regulator-name = "vdd_core"; regulator-name = "vdd_core";
regulator-min-microvolt = <925000>; regulator-min-microvolt = <925000>;
@ -450,7 +445,6 @@
}; };
dcdc3_reg: regulator@2 { dcdc3_reg: regulator@2 {
reg = <2>;
/* VDD_MPU voltage limits 0.95V - 1.1V with +/-4% tolerance */ /* VDD_MPU voltage limits 0.95V - 1.1V with +/-4% tolerance */
regulator-name = "vdd_mpu"; regulator-name = "vdd_mpu";
regulator-min-microvolt = <925000>; regulator-min-microvolt = <925000>;
@ -460,21 +454,18 @@
}; };
ldo1_reg: regulator@3 { ldo1_reg: regulator@3 {
reg = <3>;
/* VRTC 1.8V always-on supply */ /* VRTC 1.8V always-on supply */
regulator-name = "vrtc,vdds"; regulator-name = "vrtc,vdds";
regulator-always-on; regulator-always-on;
}; };
ldo2_reg: regulator@4 { ldo2_reg: regulator@4 {
reg = <4>;
/* 3.3V rail */ /* 3.3V rail */
regulator-name = "vdd_3v3aux"; regulator-name = "vdd_3v3aux";
regulator-always-on; regulator-always-on;
}; };
ldo3_reg: regulator@5 { ldo3_reg: regulator@5 {
reg = <5>;
/* VDD_3V3A 3.3V rail */ /* VDD_3V3A 3.3V rail */
regulator-name = "vdd_3v3a"; regulator-name = "vdd_3v3a";
regulator-min-microvolt = <3300000>; regulator-min-microvolt = <3300000>;
@ -482,7 +473,6 @@
}; };
ldo4_reg: regulator@6 { ldo4_reg: regulator@6 {
reg = <6>;
/* VDD_3V3B 3.3V rail */ /* VDD_3V3B 3.3V rail */
regulator-name = "vdd_3v3b"; regulator-name = "vdd_3v3b";
regulator-always-on; regulator-always-on;

View file

@ -46,7 +46,7 @@
gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>; gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_BACK>; linux,code = <KEY_BACK>;
debounce-interval = <1000>; debounce-interval = <1000>;
gpio-key,wakeup; wakeup-source;
}; };
front_button { front_button {
@ -54,7 +54,7 @@
gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>; gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_FRONT>; linux,code = <KEY_FRONT>;
debounce-interval = <1000>; debounce-interval = <1000>;
gpio-key,wakeup; wakeup-source;
}; };
}; };

View file

@ -375,19 +375,16 @@
pinctrl-0 = <&uart4_pins>; pinctrl-0 = <&uart4_pins>;
}; };
#include "tps65217.dtsi"
&tps { &tps {
compatible = "ti,tps65217";
ti,pmic-shutdown-controller; ti,pmic-shutdown-controller;
interrupt-parent = <&intc>; interrupt-parent = <&intc>;
interrupts = <7>; /* NNMI */ interrupts = <7>; /* NNMI */
regulators { regulators {
#address-cells = <1>;
#size-cells = <0>;
dcdc1_reg: regulator@0 { dcdc1_reg: regulator@0 {
reg = <0>;
/* VDDS_DDR */ /* VDDS_DDR */
regulator-min-microvolt = <1500000>; regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>; regulator-max-microvolt = <1500000>;
@ -395,7 +392,6 @@
}; };
dcdc2_reg: regulator@1 { dcdc2_reg: regulator@1 {
reg = <1>;
/* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
regulator-name = "vdd_mpu"; regulator-name = "vdd_mpu";
regulator-min-microvolt = <925000>; regulator-min-microvolt = <925000>;
@ -405,7 +401,6 @@
}; };
dcdc3_reg: regulator@2 { dcdc3_reg: regulator@2 {
reg = <2>;
/* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
regulator-name = "vdd_core"; regulator-name = "vdd_core";
regulator-min-microvolt = <925000>; regulator-min-microvolt = <925000>;
@ -415,7 +410,6 @@
}; };
ldo1_reg: regulator@3 { ldo1_reg: regulator@3 {
reg = <3>;
/* VRTC / VIO / VDDS*/ /* VRTC / VIO / VDDS*/
regulator-always-on; regulator-always-on;
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
@ -423,7 +417,6 @@
}; };
ldo2_reg: regulator@4 { ldo2_reg: regulator@4 {
reg = <4>;
/* VDD_3V3AUX */ /* VDD_3V3AUX */
regulator-always-on; regulator-always-on;
regulator-min-microvolt = <3300000>; regulator-min-microvolt = <3300000>;
@ -431,7 +424,6 @@
}; };
ldo3_reg: regulator@5 { ldo3_reg: regulator@5 {
reg = <5>;
/* VDD_1V8 */ /* VDD_1V8 */
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>; regulator-max-microvolt = <1800000>;
@ -439,7 +431,6 @@
}; };
ldo4_reg: regulator@6 { ldo4_reg: regulator@6 {
reg = <6>;
/* VDD_3V3A */ /* VDD_3V3A */
regulator-min-microvolt = <3300000>; regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3300000>;

View file

@ -173,6 +173,8 @@
sound0_master: simple-audio-card,codec { sound0_master: simple-audio-card,codec {
sound-dai = <&tlv320aic3104>; sound-dai = <&tlv320aic3104>;
assigned-clocks = <&clkoutmux2_clk_mux>;
assigned-clock-parents = <&sys_clk2_dclk_div>;
clocks = <&clkout2_clk>; clocks = <&clkout2_clk>;
}; };
}; };
@ -796,6 +798,8 @@
pinctrl-names = "default", "sleep"; pinctrl-names = "default", "sleep";
pinctrl-0 = <&mcasp3_pins_default>; pinctrl-0 = <&mcasp3_pins_default>;
pinctrl-1 = <&mcasp3_pins_sleep>; pinctrl-1 = <&mcasp3_pins_sleep>;
assigned-clocks = <&mcasp3_ahclkx_mux>;
assigned-clock-parents = <&sys_clkin2>;
status = "okay"; status = "okay";
op-mode = <0>; /* MCASP_IIS_MODE */ op-mode = <0>; /* MCASP_IIS_MODE */

View file

@ -545,7 +545,7 @@
ti,debounce-tol = /bits/ 16 <10>; ti,debounce-tol = /bits/ 16 <10>;
ti,debounce-rep = /bits/ 16 <1>; ti,debounce-rep = /bits/ 16 <1>;
linux,wakeup; wakeup-source;
}; };
}; };

View file

@ -896,7 +896,6 @@
#size-cells = <1>; #size-cells = <1>;
reg = <0x2100000 0x10000>; reg = <0x2100000 0x10000>;
ranges = <0 0x2100000 0x10000>; ranges = <0 0x2100000 0x10000>;
interrupt-parent = <&intc>;
clocks = <&clks IMX6QDL_CLK_CAAM_MEM>, clocks = <&clks IMX6QDL_CLK_CAAM_MEM>,
<&clks IMX6QDL_CLK_CAAM_ACLK>, <&clks IMX6QDL_CLK_CAAM_ACLK>,
<&clks IMX6QDL_CLK_CAAM_IPG>, <&clks IMX6QDL_CLK_CAAM_IPG>,

View file

@ -14,7 +14,7 @@
#include "kirkwood-synology.dtsi" #include "kirkwood-synology.dtsi"
/ { / {
model = "Synology DS111"; model = "Synology DS112";
compatible = "synology,ds111", "marvell,kirkwood"; compatible = "synology,ds111", "marvell,kirkwood";
memory { memory {

View file

@ -228,6 +228,37 @@
}; };
}; };
&devbus_bootcs {
status = "okay";
devbus,keep-config;
flash@0 {
compatible = "jedec-flash";
reg = <0 0x40000>;
bank-width = <1>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
header@0 {
reg = <0 0x30000>;
read-only;
};
uboot@30000 {
reg = <0x30000 0xF000>;
read-only;
};
uboot_env@3F000 {
reg = <0x3F000 0x1000>;
};
};
};
};
&mdio { &mdio {
status = "okay"; status = "okay";

View file

@ -283,7 +283,6 @@
pinctrl-names = "default"; pinctrl-names = "default";
status = "okay"; status = "okay";
renesas,enable-gpio = <&gpio5 31 GPIO_ACTIVE_HIGH>;
}; };
&usbphy { &usbphy {

View file

@ -90,7 +90,7 @@
#define PIN_PA14__I2SC1_MCK PINMUX_PIN(PIN_PA14, 4, 2) #define PIN_PA14__I2SC1_MCK PINMUX_PIN(PIN_PA14, 4, 2)
#define PIN_PA14__FLEXCOM3_IO2 PINMUX_PIN(PIN_PA14, 5, 1) #define PIN_PA14__FLEXCOM3_IO2 PINMUX_PIN(PIN_PA14, 5, 1)
#define PIN_PA14__D9 PINMUX_PIN(PIN_PA14, 6, 2) #define PIN_PA14__D9 PINMUX_PIN(PIN_PA14, 6, 2)
#define PIN_PA15 14 #define PIN_PA15 15
#define PIN_PA15__GPIO PINMUX_PIN(PIN_PA15, 0, 0) #define PIN_PA15__GPIO PINMUX_PIN(PIN_PA15, 0, 0)
#define PIN_PA15__SPI0_MOSI PINMUX_PIN(PIN_PA15, 1, 1) #define PIN_PA15__SPI0_MOSI PINMUX_PIN(PIN_PA15, 1, 1)
#define PIN_PA15__TF1 PINMUX_PIN(PIN_PA15, 2, 1) #define PIN_PA15__TF1 PINMUX_PIN(PIN_PA15, 2, 1)

View file

@ -0,0 +1,56 @@
/*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/*
* Integrated Power Management Chip
* http://www.ti.com/lit/ds/symlink/tps65217.pdf
*/
&tps {
compatible = "ti,tps65217";
regulators {
#address-cells = <1>;
#size-cells = <0>;
dcdc1_reg: regulator@0 {
reg = <0>;
regulator-compatible = "dcdc1";
};
dcdc2_reg: regulator@1 {
reg = <1>;
regulator-compatible = "dcdc2";
};
dcdc3_reg: regulator@2 {
reg = <2>;
regulator-compatible = "dcdc3";
};
ldo1_reg: regulator@3 {
reg = <3>;
regulator-compatible = "ldo1";
};
ldo2_reg: regulator@4 {
reg = <4>;
regulator-compatible = "ldo2";
};
ldo3_reg: regulator@5 {
reg = <5>;
regulator-compatible = "ldo3";
};
ldo4_reg: regulator@6 {
reg = <6>;
regulator-compatible = "ldo4";
};
};
};

View file

@ -364,7 +364,7 @@ static struct crypto_alg aes_algs[] = { {
.cra_blkcipher = { .cra_blkcipher = {
.min_keysize = AES_MIN_KEY_SIZE, .min_keysize = AES_MIN_KEY_SIZE,
.max_keysize = AES_MAX_KEY_SIZE, .max_keysize = AES_MAX_KEY_SIZE,
.ivsize = AES_BLOCK_SIZE, .ivsize = 0,
.setkey = ce_aes_setkey, .setkey = ce_aes_setkey,
.encrypt = ecb_encrypt, .encrypt = ecb_encrypt,
.decrypt = ecb_decrypt, .decrypt = ecb_decrypt,
@ -441,7 +441,7 @@ static struct crypto_alg aes_algs[] = { {
.cra_ablkcipher = { .cra_ablkcipher = {
.min_keysize = AES_MIN_KEY_SIZE, .min_keysize = AES_MIN_KEY_SIZE,
.max_keysize = AES_MAX_KEY_SIZE, .max_keysize = AES_MAX_KEY_SIZE,
.ivsize = AES_BLOCK_SIZE, .ivsize = 0,
.setkey = ablk_set_key, .setkey = ablk_set_key,
.encrypt = ablk_encrypt, .encrypt = ablk_encrypt,
.decrypt = ablk_decrypt, .decrypt = ablk_decrypt,

View file

@ -117,6 +117,7 @@ static inline u32 gic_read_iar(void)
u32 irqstat; u32 irqstat;
asm volatile("mrc " __stringify(ICC_IAR1) : "=r" (irqstat)); asm volatile("mrc " __stringify(ICC_IAR1) : "=r" (irqstat));
dsb(sy);
return irqstat; return irqstat;
} }

View file

@ -35,14 +35,21 @@ static inline void xen_dma_map_page(struct device *hwdev, struct page *page,
dma_addr_t dev_addr, unsigned long offset, size_t size, dma_addr_t dev_addr, unsigned long offset, size_t size,
enum dma_data_direction dir, struct dma_attrs *attrs) enum dma_data_direction dir, struct dma_attrs *attrs)
{ {
bool local = XEN_PFN_DOWN(dev_addr) == page_to_xen_pfn(page); unsigned long page_pfn = page_to_xen_pfn(page);
unsigned long dev_pfn = XEN_PFN_DOWN(dev_addr);
unsigned long compound_pages =
(1<<compound_order(page)) * XEN_PFN_PER_PAGE;
bool local = (page_pfn <= dev_pfn) &&
(dev_pfn - page_pfn < compound_pages);
/* /*
* Dom0 is mapped 1:1, while the Linux page can be spanned accross * Dom0 is mapped 1:1, while the Linux page can span across
* multiple Xen page, it's not possible to have a mix of local and * multiple Xen pages, it's not possible for it to contain a
* foreign Xen page. So if the first xen_pfn == mfn the page is local * mix of local and foreign Xen pages. So if the first xen_pfn
* otherwise it's a foreign page grant-mapped in dom0. If the page is * == mfn the page is local otherwise it's a foreign page
* local we can safely call the native dma_ops function, otherwise we * grant-mapped in dom0. If the page is local we can safely
* call the xen specific function. * call the native dma_ops function, otherwise we call the xen
* specific function.
*/ */
if (local) if (local)
__generic_dma_ops(hwdev)->map_page(hwdev, page, offset, size, dir, attrs); __generic_dma_ops(hwdev)->map_page(hwdev, page, offset, size, dir, attrs);

View file

@ -88,6 +88,7 @@ obj-$(CONFIG_DEBUG_LL) += debug.o
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
obj-$(CONFIG_ARM_VIRT_EXT) += hyp-stub.o obj-$(CONFIG_ARM_VIRT_EXT) += hyp-stub.o
AFLAGS_hyp-stub.o :=-Wa,-march=armv7-a
ifeq ($(CONFIG_ARM_PSCI),y) ifeq ($(CONFIG_ARM_PSCI),y)
obj-$(CONFIG_SMP) += psci_smp.o obj-$(CONFIG_SMP) += psci_smp.o
endif endif

View file

@ -161,7 +161,7 @@ static int get_timer_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
u64 val; u64 val;
val = kvm_arm_timer_get_reg(vcpu, reg->id); val = kvm_arm_timer_get_reg(vcpu, reg->id);
return copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id)); return copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id)) ? -EFAULT : 0;
} }
static unsigned long num_core_regs(void) static unsigned long num_core_regs(void)

View file

@ -206,7 +206,8 @@ int io_mem_abort(struct kvm_vcpu *vcpu, struct kvm_run *run,
run->mmio.is_write = is_write; run->mmio.is_write = is_write;
run->mmio.phys_addr = fault_ipa; run->mmio.phys_addr = fault_ipa;
run->mmio.len = len; run->mmio.len = len;
memcpy(run->mmio.data, data_buf, len); if (is_write)
memcpy(run->mmio.data, data_buf, len);
if (!ret) { if (!ret) {
/* We handled the access successfully in the kernel. */ /* We handled the access successfully in the kernel. */

View file

@ -18,6 +18,7 @@
#include <asm/setup.h> #include <asm/setup.h>
#include <asm/mach/arch.h> #include <asm/mach/arch.h>
#include <asm/system_info.h>
#include "common.h" #include "common.h"
@ -77,12 +78,31 @@ static const char *const n900_boards_compat[] __initconst = {
NULL, NULL,
}; };
/* Set system_rev from atags */
static void __init rx51_set_system_rev(const struct tag *tags)
{
const struct tag *tag;
if (tags->hdr.tag != ATAG_CORE)
return;
for_each_tag(tag, tags) {
if (tag->hdr.tag == ATAG_REVISION) {
system_rev = tag->u.revision.rev;
break;
}
}
}
/* Legacy userspace on Nokia N900 needs ATAGS exported in /proc/atags, /* Legacy userspace on Nokia N900 needs ATAGS exported in /proc/atags,
* save them while the data is still not overwritten * save them while the data is still not overwritten
*/ */
static void __init rx51_reserve(void) static void __init rx51_reserve(void)
{ {
save_atags((const struct tag *)(PAGE_OFFSET + 0x100)); const struct tag *tags = (const struct tag *)(PAGE_OFFSET + 0x100);
save_atags(tags);
rx51_set_system_rev(tags);
omap_reserve(); omap_reserve();
} }

View file

@ -101,10 +101,8 @@ static void omap2_onenand_set_async_mode(void __iomem *onenand_base)
static void set_onenand_cfg(void __iomem *onenand_base) static void set_onenand_cfg(void __iomem *onenand_base)
{ {
u32 reg; u32 reg = ONENAND_SYS_CFG1_RDY | ONENAND_SYS_CFG1_INT;
reg = readw(onenand_base + ONENAND_REG_SYS_CFG1);
reg &= ~((0x7 << ONENAND_SYS_CFG1_BRL_SHIFT) | (0x7 << 9));
reg |= (latency << ONENAND_SYS_CFG1_BRL_SHIFT) | reg |= (latency << ONENAND_SYS_CFG1_BRL_SHIFT) |
ONENAND_SYS_CFG1_BL_16; ONENAND_SYS_CFG1_BL_16;
if (onenand_flags & ONENAND_FLAG_SYNCREAD) if (onenand_flags & ONENAND_FLAG_SYNCREAD)
@ -123,6 +121,7 @@ static void set_onenand_cfg(void __iomem *onenand_base)
reg |= ONENAND_SYS_CFG1_VHF; reg |= ONENAND_SYS_CFG1_VHF;
else else
reg &= ~ONENAND_SYS_CFG1_VHF; reg &= ~ONENAND_SYS_CFG1_VHF;
writew(reg, onenand_base + ONENAND_REG_SYS_CFG1); writew(reg, onenand_base + ONENAND_REG_SYS_CFG1);
} }
@ -289,6 +288,7 @@ static int omap2_onenand_setup_async(void __iomem *onenand_base)
} }
} }
onenand_async.sync_write = true;
omap2_onenand_calc_async_timings(&t); omap2_onenand_calc_async_timings(&t);
ret = gpmc_cs_program_settings(gpmc_onenand_data->cs, &onenand_async); ret = gpmc_cs_program_settings(gpmc_onenand_data->cs, &onenand_async);

View file

@ -191,12 +191,22 @@ static int _omap_device_notifier_call(struct notifier_block *nb,
{ {
struct platform_device *pdev = to_platform_device(dev); struct platform_device *pdev = to_platform_device(dev);
struct omap_device *od; struct omap_device *od;
int err;
switch (event) { switch (event) {
case BUS_NOTIFY_DEL_DEVICE: case BUS_NOTIFY_DEL_DEVICE:
if (pdev->archdata.od) if (pdev->archdata.od)
omap_device_delete(pdev->archdata.od); omap_device_delete(pdev->archdata.od);
break; break;
case BUS_NOTIFY_UNBOUND_DRIVER:
od = to_omap_device(pdev);
if (od && (od->_state == OMAP_DEVICE_STATE_ENABLED)) {
dev_info(dev, "enabled after unload, idling\n");
err = omap_device_idle(pdev);
if (err)
dev_err(dev, "failed to idle\n");
}
break;
case BUS_NOTIFY_ADD_DEVICE: case BUS_NOTIFY_ADD_DEVICE:
if (pdev->dev.of_node) if (pdev->dev.of_node)
omap_device_build_from_dt(pdev); omap_device_build_from_dt(pdev);
@ -602,8 +612,10 @@ static int _od_runtime_resume(struct device *dev)
int ret; int ret;
ret = omap_device_enable(pdev); ret = omap_device_enable(pdev);
if (ret) if (ret) {
dev_err(dev, "use pm_runtime_put_sync_suspend() in driver?\n");
return ret; return ret;
}
return pm_generic_runtime_resume(dev); return pm_generic_runtime_resume(dev);
} }

View file

@ -4,7 +4,6 @@
extern void shmobile_init_delay(void); extern void shmobile_init_delay(void);
extern void shmobile_boot_vector(void); extern void shmobile_boot_vector(void);
extern unsigned long shmobile_boot_fn; extern unsigned long shmobile_boot_fn;
extern unsigned long shmobile_boot_arg;
extern unsigned long shmobile_boot_size; extern unsigned long shmobile_boot_size;
extern void shmobile_smp_boot(void); extern void shmobile_smp_boot(void);
extern void shmobile_smp_sleep(void); extern void shmobile_smp_sleep(void);

View file

@ -38,9 +38,3 @@ ENTRY(shmobile_boot_scu)
b secondary_startup b secondary_startup
ENDPROC(shmobile_boot_scu) ENDPROC(shmobile_boot_scu)
.text
.align 2
.globl shmobile_scu_base
shmobile_scu_base:
.space 4

View file

@ -24,7 +24,6 @@
.arm .arm
.align 12 .align 12
ENTRY(shmobile_boot_vector) ENTRY(shmobile_boot_vector)
ldr r0, 2f
ldr r1, 1f ldr r1, 1f
bx r1 bx r1
@ -34,9 +33,6 @@ ENDPROC(shmobile_boot_vector)
.globl shmobile_boot_fn .globl shmobile_boot_fn
shmobile_boot_fn: shmobile_boot_fn:
1: .space 4 1: .space 4
.globl shmobile_boot_arg
shmobile_boot_arg:
2: .space 4
.globl shmobile_boot_size .globl shmobile_boot_size
shmobile_boot_size: shmobile_boot_size:
.long . - shmobile_boot_vector .long . - shmobile_boot_vector
@ -46,13 +42,15 @@ shmobile_boot_size:
*/ */
ENTRY(shmobile_smp_boot) ENTRY(shmobile_smp_boot)
@ r0 = MPIDR_HWID_BITMASK
mrc p15, 0, r1, c0, c0, 5 @ r1 = MPIDR mrc p15, 0, r1, c0, c0, 5 @ r1 = MPIDR
and r0, r1, r0 @ r0 = cpu_logical_map() value and r0, r1, #0xffffff @ MPIDR_HWID_BITMASK
@ r0 = cpu_logical_map() value
mov r1, #0 @ r1 = CPU index mov r1, #0 @ r1 = CPU index
adr r5, 1f @ array of per-cpu mpidr values adr r2, 1f
adr r6, 2f @ array of per-cpu functions ldmia r2, {r5, r6, r7}
adr r7, 3f @ array of per-cpu arguments add r5, r5, r2 @ array of per-cpu mpidr values
add r6, r6, r2 @ array of per-cpu functions
add r7, r7, r2 @ array of per-cpu arguments
shmobile_smp_boot_find_mpidr: shmobile_smp_boot_find_mpidr:
ldr r8, [r5, r1, lsl #2] ldr r8, [r5, r1, lsl #2]
@ -80,12 +78,18 @@ ENTRY(shmobile_smp_sleep)
b shmobile_smp_boot b shmobile_smp_boot
ENDPROC(shmobile_smp_sleep) ENDPROC(shmobile_smp_sleep)
.align 2
1: .long shmobile_smp_mpidr - .
.long shmobile_smp_fn - 1b
.long shmobile_smp_arg - 1b
.bss
.globl shmobile_smp_mpidr .globl shmobile_smp_mpidr
shmobile_smp_mpidr: shmobile_smp_mpidr:
1: .space NR_CPUS * 4 .space NR_CPUS * 4
.globl shmobile_smp_fn .globl shmobile_smp_fn
shmobile_smp_fn: shmobile_smp_fn:
2: .space NR_CPUS * 4 .space NR_CPUS * 4
.globl shmobile_smp_arg .globl shmobile_smp_arg
shmobile_smp_arg: shmobile_smp_arg:
3: .space NR_CPUS * 4 .space NR_CPUS * 4

View file

@ -123,7 +123,6 @@ void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,
{ {
/* install boot code shared by all CPUs */ /* install boot code shared by all CPUs */
shmobile_boot_fn = virt_to_phys(shmobile_smp_boot); shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
shmobile_boot_arg = MPIDR_HWID_BITMASK;
/* perform per-cpu setup */ /* perform per-cpu setup */
apmu_parse_cfg(apmu_init_cpu, apmu_config, num); apmu_parse_cfg(apmu_init_cpu, apmu_config, num);

View file

@ -17,6 +17,9 @@
#include <asm/smp_scu.h> #include <asm/smp_scu.h>
#include "common.h" #include "common.h"
void __iomem *shmobile_scu_base;
static int shmobile_smp_scu_notifier_call(struct notifier_block *nfb, static int shmobile_smp_scu_notifier_call(struct notifier_block *nfb,
unsigned long action, void *hcpu) unsigned long action, void *hcpu)
{ {
@ -41,7 +44,6 @@ void __init shmobile_smp_scu_prepare_cpus(unsigned int max_cpus)
{ {
/* install boot code shared by all CPUs */ /* install boot code shared by all CPUs */
shmobile_boot_fn = virt_to_phys(shmobile_smp_boot); shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
shmobile_boot_arg = MPIDR_HWID_BITMASK;
/* enable SCU and cache coherency on booting CPU */ /* enable SCU and cache coherency on booting CPU */
scu_enable(shmobile_scu_base); scu_enable(shmobile_scu_base);

View file

@ -92,8 +92,6 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
{ {
/* Map the reset vector (in headsmp-scu.S, headsmp.S) */ /* Map the reset vector (in headsmp-scu.S, headsmp.S) */
__raw_writel(__pa(shmobile_boot_vector), AVECR); __raw_writel(__pa(shmobile_boot_vector), AVECR);
shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
shmobile_boot_arg = (unsigned long)shmobile_scu_base;
/* setup r8a7779 specific SCU bits */ /* setup r8a7779 specific SCU bits */
shmobile_scu_base = IOMEM(R8A7779_SCU_BASE); shmobile_scu_base = IOMEM(R8A7779_SCU_BASE);

View file

@ -173,7 +173,7 @@ unsigned long arch_mmap_rnd(void)
{ {
unsigned long rnd; unsigned long rnd;
rnd = (unsigned long)get_random_int() & ((1 << mmap_rnd_bits) - 1); rnd = get_random_long() & ((1UL << mmap_rnd_bits) - 1);
return rnd << PAGE_SHIFT; return rnd << PAGE_SHIFT;
} }

View file

@ -49,6 +49,9 @@ static int change_memory_common(unsigned long addr, int numpages,
WARN_ON_ONCE(1); WARN_ON_ONCE(1);
} }
if (!numpages)
return 0;
if (start < MODULES_VADDR || start >= MODULES_END) if (start < MODULES_VADDR || start >= MODULES_END)
return -EINVAL; return -EINVAL;

View file

@ -88,7 +88,7 @@ Image: vmlinux
Image.%: vmlinux Image.%: vmlinux
$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
zinstall install: vmlinux zinstall install:
$(Q)$(MAKE) $(build)=$(boot) $@ $(Q)$(MAKE) $(build)=$(boot) $@
%.dtb: scripts %.dtb: scripts

View file

@ -34,10 +34,10 @@ $(obj)/Image.lzma: $(obj)/Image FORCE
$(obj)/Image.lzo: $(obj)/Image FORCE $(obj)/Image.lzo: $(obj)/Image FORCE
$(call if_changed,lzo) $(call if_changed,lzo)
install: $(obj)/Image install:
$(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \ $(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
$(obj)/Image System.map "$(INSTALL_PATH)" $(obj)/Image System.map "$(INSTALL_PATH)"
zinstall: $(obj)/Image.gz zinstall:
$(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \ $(CONFIG_SHELL) $(srctree)/$(src)/install.sh $(KERNELRELEASE) \
$(obj)/Image.gz System.map "$(INSTALL_PATH)" $(obj)/Image.gz System.map "$(INSTALL_PATH)"

View file

@ -20,6 +20,20 @@
# $4 - default install path (blank if root directory) # $4 - default install path (blank if root directory)
# #
verify () {
if [ ! -f "$1" ]; then
echo "" 1>&2
echo " *** Missing file: $1" 1>&2
echo ' *** You need to run "make" before "make install".' 1>&2
echo "" 1>&2
exit 1
fi
}
# Make sure the files actually exist
verify "$2"
verify "$3"
# User may have a custom install script # User may have a custom install script
if [ -x ~/bin/${INSTALLKERNEL} ]; then exec ~/bin/${INSTALLKERNEL} "$@"; fi if [ -x ~/bin/${INSTALLKERNEL} ]; then exec ~/bin/${INSTALLKERNEL} "$@"; fi
if [ -x /sbin/${INSTALLKERNEL} ]; then exec /sbin/${INSTALLKERNEL} "$@"; fi if [ -x /sbin/${INSTALLKERNEL} ]; then exec /sbin/${INSTALLKERNEL} "$@"; fi

View file

@ -294,7 +294,7 @@ static struct crypto_alg aes_algs[] = { {
.cra_blkcipher = { .cra_blkcipher = {
.min_keysize = AES_MIN_KEY_SIZE, .min_keysize = AES_MIN_KEY_SIZE,
.max_keysize = AES_MAX_KEY_SIZE, .max_keysize = AES_MAX_KEY_SIZE,
.ivsize = AES_BLOCK_SIZE, .ivsize = 0,
.setkey = aes_setkey, .setkey = aes_setkey,
.encrypt = ecb_encrypt, .encrypt = ecb_encrypt,
.decrypt = ecb_decrypt, .decrypt = ecb_decrypt,
@ -371,7 +371,7 @@ static struct crypto_alg aes_algs[] = { {
.cra_ablkcipher = { .cra_ablkcipher = {
.min_keysize = AES_MIN_KEY_SIZE, .min_keysize = AES_MIN_KEY_SIZE,
.max_keysize = AES_MAX_KEY_SIZE, .max_keysize = AES_MAX_KEY_SIZE,
.ivsize = AES_BLOCK_SIZE, .ivsize = 0,
.setkey = ablk_set_key, .setkey = ablk_set_key,
.encrypt = ablk_encrypt, .encrypt = ablk_encrypt,
.decrypt = ablk_decrypt, .decrypt = ablk_decrypt,

View file

@ -107,8 +107,6 @@
#define TCR_EL2_MASK (TCR_EL2_TG0 | TCR_EL2_SH0 | \ #define TCR_EL2_MASK (TCR_EL2_TG0 | TCR_EL2_SH0 | \
TCR_EL2_ORGN0 | TCR_EL2_IRGN0 | TCR_EL2_T0SZ) TCR_EL2_ORGN0 | TCR_EL2_IRGN0 | TCR_EL2_T0SZ)
#define TCR_EL2_FLAGS (TCR_EL2_RES1 | TCR_EL2_PS_40B)
/* VTCR_EL2 Registers bits */ /* VTCR_EL2 Registers bits */
#define VTCR_EL2_RES1 (1 << 31) #define VTCR_EL2_RES1 (1 << 31)
#define VTCR_EL2_PS_MASK (7 << 16) #define VTCR_EL2_PS_MASK (7 << 16)

View file

@ -34,13 +34,13 @@
/* /*
* VMALLOC and SPARSEMEM_VMEMMAP ranges. * VMALLOC and SPARSEMEM_VMEMMAP ranges.
* *
* VMEMAP_SIZE: allows the whole VA space to be covered by a struct page array * VMEMAP_SIZE: allows the whole linear region to be covered by a struct page array
* (rounded up to PUD_SIZE). * (rounded up to PUD_SIZE).
* VMALLOC_START: beginning of the kernel VA space * VMALLOC_START: beginning of the kernel VA space
* VMALLOC_END: extends to the available space below vmmemmap, PCI I/O space, * VMALLOC_END: extends to the available space below vmmemmap, PCI I/O space,
* fixed mappings and modules * fixed mappings and modules
*/ */
#define VMEMMAP_SIZE ALIGN((1UL << (VA_BITS - PAGE_SHIFT)) * sizeof(struct page), PUD_SIZE) #define VMEMMAP_SIZE ALIGN((1UL << (VA_BITS - PAGE_SHIFT - 1)) * sizeof(struct page), PUD_SIZE)
#ifndef CONFIG_KASAN #ifndef CONFIG_KASAN
#define VMALLOC_START (VA_START) #define VMALLOC_START (VA_START)
@ -51,7 +51,8 @@
#define VMALLOC_END (PAGE_OFFSET - PUD_SIZE - VMEMMAP_SIZE - SZ_64K) #define VMALLOC_END (PAGE_OFFSET - PUD_SIZE - VMEMMAP_SIZE - SZ_64K)
#define vmemmap ((struct page *)(VMALLOC_END + SZ_64K)) #define VMEMMAP_START (VMALLOC_END + SZ_64K)
#define vmemmap ((struct page *)VMEMMAP_START - (memstart_addr >> PAGE_SHIFT))
#define FIRST_USER_ADDRESS 0UL #define FIRST_USER_ADDRESS 0UL

View file

@ -226,11 +226,28 @@ static int call_step_hook(struct pt_regs *regs, unsigned int esr)
return retval; return retval;
} }
static void send_user_sigtrap(int si_code)
{
struct pt_regs *regs = current_pt_regs();
siginfo_t info = {
.si_signo = SIGTRAP,
.si_errno = 0,
.si_code = si_code,
.si_addr = (void __user *)instruction_pointer(regs),
};
if (WARN_ON(!user_mode(regs)))
return;
if (interrupts_enabled(regs))
local_irq_enable();
force_sig_info(SIGTRAP, &info, current);
}
static int single_step_handler(unsigned long addr, unsigned int esr, static int single_step_handler(unsigned long addr, unsigned int esr,
struct pt_regs *regs) struct pt_regs *regs)
{ {
siginfo_t info;
/* /*
* If we are stepping a pending breakpoint, call the hw_breakpoint * If we are stepping a pending breakpoint, call the hw_breakpoint
* handler first. * handler first.
@ -239,11 +256,7 @@ static int single_step_handler(unsigned long addr, unsigned int esr,
return 0; return 0;
if (user_mode(regs)) { if (user_mode(regs)) {
info.si_signo = SIGTRAP; send_user_sigtrap(TRAP_HWBKPT);
info.si_errno = 0;
info.si_code = TRAP_HWBKPT;
info.si_addr = (void __user *)instruction_pointer(regs);
force_sig_info(SIGTRAP, &info, current);
/* /*
* ptrace will disable single step unless explicitly * ptrace will disable single step unless explicitly
@ -307,17 +320,8 @@ static int call_break_hook(struct pt_regs *regs, unsigned int esr)
static int brk_handler(unsigned long addr, unsigned int esr, static int brk_handler(unsigned long addr, unsigned int esr,
struct pt_regs *regs) struct pt_regs *regs)
{ {
siginfo_t info;
if (user_mode(regs)) { if (user_mode(regs)) {
info = (siginfo_t) { send_user_sigtrap(TRAP_BRKPT);
.si_signo = SIGTRAP,
.si_errno = 0,
.si_code = TRAP_BRKPT,
.si_addr = (void __user *)instruction_pointer(regs),
};
force_sig_info(SIGTRAP, &info, current);
} else if (call_break_hook(regs, esr) != DBG_HOOK_HANDLED) { } else if (call_break_hook(regs, esr) != DBG_HOOK_HANDLED) {
pr_warning("Unexpected kernel BRK exception at EL1\n"); pr_warning("Unexpected kernel BRK exception at EL1\n");
return -EFAULT; return -EFAULT;
@ -328,7 +332,6 @@ static int brk_handler(unsigned long addr, unsigned int esr,
int aarch32_break_handler(struct pt_regs *regs) int aarch32_break_handler(struct pt_regs *regs)
{ {
siginfo_t info;
u32 arm_instr; u32 arm_instr;
u16 thumb_instr; u16 thumb_instr;
bool bp = false; bool bp = false;
@ -359,14 +362,7 @@ int aarch32_break_handler(struct pt_regs *regs)
if (!bp) if (!bp)
return -EFAULT; return -EFAULT;
info = (siginfo_t) { send_user_sigtrap(TRAP_BRKPT);
.si_signo = SIGTRAP,
.si_errno = 0,
.si_code = TRAP_BRKPT,
.si_addr = pc,
};
force_sig_info(SIGTRAP, &info, current);
return 0; return 0;
} }

View file

@ -89,6 +89,7 @@ __efistub_memcpy = KALLSYMS_HIDE(__pi_memcpy);
__efistub_memmove = KALLSYMS_HIDE(__pi_memmove); __efistub_memmove = KALLSYMS_HIDE(__pi_memmove);
__efistub_memset = KALLSYMS_HIDE(__pi_memset); __efistub_memset = KALLSYMS_HIDE(__pi_memset);
__efistub_strlen = KALLSYMS_HIDE(__pi_strlen); __efistub_strlen = KALLSYMS_HIDE(__pi_strlen);
__efistub_strnlen = KALLSYMS_HIDE(__pi_strnlen);
__efistub_strcmp = KALLSYMS_HIDE(__pi_strcmp); __efistub_strcmp = KALLSYMS_HIDE(__pi_strcmp);
__efistub_strncmp = KALLSYMS_HIDE(__pi_strncmp); __efistub_strncmp = KALLSYMS_HIDE(__pi_strncmp);
__efistub___flush_dcache_area = KALLSYMS_HIDE(__pi___flush_dcache_area); __efistub___flush_dcache_area = KALLSYMS_HIDE(__pi___flush_dcache_area);

View file

@ -44,14 +44,13 @@ int notrace unwind_frame(struct task_struct *tsk, struct stackframe *frame)
unsigned long irq_stack_ptr; unsigned long irq_stack_ptr;
/* /*
* Use raw_smp_processor_id() to avoid false-positives from * Switching between stacks is valid when tracing current and in
* CONFIG_DEBUG_PREEMPT. get_wchan() calls unwind_frame() on sleeping * non-preemptible context.
* task stacks, we can be pre-empted in this case, so
* {raw_,}smp_processor_id() may give us the wrong value. Sleeping
* tasks can't ever be on an interrupt stack, so regardless of cpu,
* the checks will always fail.
*/ */
irq_stack_ptr = IRQ_STACK_PTR(raw_smp_processor_id()); if (tsk == current && !preemptible())
irq_stack_ptr = IRQ_STACK_PTR(smp_processor_id());
else
irq_stack_ptr = 0;
low = frame->sp; low = frame->sp;
/* irq stacks are not THREAD_SIZE aligned */ /* irq stacks are not THREAD_SIZE aligned */
@ -64,8 +63,8 @@ int notrace unwind_frame(struct task_struct *tsk, struct stackframe *frame)
return -EINVAL; return -EINVAL;
frame->sp = fp + 0x10; frame->sp = fp + 0x10;
frame->fp = *(unsigned long *)(fp); frame->fp = READ_ONCE_NOCHECK(*(unsigned long *)(fp));
frame->pc = *(unsigned long *)(fp + 8); frame->pc = READ_ONCE_NOCHECK(*(unsigned long *)(fp + 8));
#ifdef CONFIG_FUNCTION_GRAPH_TRACER #ifdef CONFIG_FUNCTION_GRAPH_TRACER
if (tsk && tsk->ret_stack && if (tsk && tsk->ret_stack &&

View file

@ -146,9 +146,18 @@ static void dump_instr(const char *lvl, struct pt_regs *regs)
static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk) static void dump_backtrace(struct pt_regs *regs, struct task_struct *tsk)
{ {
struct stackframe frame; struct stackframe frame;
unsigned long irq_stack_ptr = IRQ_STACK_PTR(smp_processor_id()); unsigned long irq_stack_ptr;
int skip; int skip;
/*
* Switching between stacks is valid when tracing current and in
* non-preemptible context.
*/
if (tsk == current && !preemptible())
irq_stack_ptr = IRQ_STACK_PTR(smp_processor_id());
else
irq_stack_ptr = 0;
pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk); pr_debug("%s(regs = %p tsk = %p)\n", __func__, regs, tsk);
if (!tsk) if (!tsk)

View file

@ -194,7 +194,7 @@ static int get_timer_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg)
u64 val; u64 val;
val = kvm_arm_timer_get_reg(vcpu, reg->id); val = kvm_arm_timer_get_reg(vcpu, reg->id);
return copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id)); return copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id)) ? -EFAULT : 0;
} }
/** /**

View file

@ -64,7 +64,7 @@ __do_hyp_init:
mrs x4, tcr_el1 mrs x4, tcr_el1
ldr x5, =TCR_EL2_MASK ldr x5, =TCR_EL2_MASK
and x4, x4, x5 and x4, x4, x5
ldr x5, =TCR_EL2_FLAGS mov x5, #TCR_EL2_RES1
orr x4, x4, x5 orr x4, x4, x5
#ifndef CONFIG_ARM64_VA_BITS_48 #ifndef CONFIG_ARM64_VA_BITS_48
@ -85,14 +85,16 @@ __do_hyp_init:
ldr_l x5, idmap_t0sz ldr_l x5, idmap_t0sz
bfi x4, x5, TCR_T0SZ_OFFSET, TCR_TxSZ_WIDTH bfi x4, x5, TCR_T0SZ_OFFSET, TCR_TxSZ_WIDTH
#endif #endif
/*
* Read the PARange bits from ID_AA64MMFR0_EL1 and set the PS bits in
* TCR_EL2 and VTCR_EL2.
*/
mrs x5, ID_AA64MMFR0_EL1
bfi x4, x5, #16, #3
msr tcr_el2, x4 msr tcr_el2, x4
ldr x4, =VTCR_EL2_FLAGS ldr x4, =VTCR_EL2_FLAGS
/*
* Read the PARange bits from ID_AA64MMFR0_EL1 and set the PS bits in
* VTCR_EL2.
*/
mrs x5, ID_AA64MMFR0_EL1
bfi x4, x5, #16, #3 bfi x4, x5, #16, #3
/* /*
* Read the VMIDBits bits from ID_AA64MMFR1_EL1 and set the VS bit in * Read the VMIDBits bits from ID_AA64MMFR1_EL1 and set the VS bit in

View file

@ -147,16 +147,6 @@ void __hyp_text __vgic_v3_restore_state(struct kvm_vcpu *vcpu)
max_lr_idx = vtr_to_max_lr_idx(val); max_lr_idx = vtr_to_max_lr_idx(val);
nr_pri_bits = vtr_to_nr_pri_bits(val); nr_pri_bits = vtr_to_nr_pri_bits(val);
switch (nr_pri_bits) {
case 7:
write_gicreg(cpu_if->vgic_ap1r[3], ICH_AP1R3_EL2);
write_gicreg(cpu_if->vgic_ap1r[2], ICH_AP1R2_EL2);
case 6:
write_gicreg(cpu_if->vgic_ap1r[1], ICH_AP1R1_EL2);
default:
write_gicreg(cpu_if->vgic_ap1r[0], ICH_AP1R0_EL2);
}
switch (nr_pri_bits) { switch (nr_pri_bits) {
case 7: case 7:
write_gicreg(cpu_if->vgic_ap0r[3], ICH_AP0R3_EL2); write_gicreg(cpu_if->vgic_ap0r[3], ICH_AP0R3_EL2);
@ -167,6 +157,16 @@ void __hyp_text __vgic_v3_restore_state(struct kvm_vcpu *vcpu)
write_gicreg(cpu_if->vgic_ap0r[0], ICH_AP0R0_EL2); write_gicreg(cpu_if->vgic_ap0r[0], ICH_AP0R0_EL2);
} }
switch (nr_pri_bits) {
case 7:
write_gicreg(cpu_if->vgic_ap1r[3], ICH_AP1R3_EL2);
write_gicreg(cpu_if->vgic_ap1r[2], ICH_AP1R2_EL2);
case 6:
write_gicreg(cpu_if->vgic_ap1r[1], ICH_AP1R1_EL2);
default:
write_gicreg(cpu_if->vgic_ap1r[0], ICH_AP1R0_EL2);
}
switch (max_lr_idx) { switch (max_lr_idx) {
case 15: case 15:
write_gicreg(cpu_if->vgic_lr[VGIC_V3_LR_INDEX(15)], ICH_LR15_EL2); write_gicreg(cpu_if->vgic_lr[VGIC_V3_LR_INDEX(15)], ICH_LR15_EL2);

View file

@ -168,4 +168,4 @@ CPU_LE( lsr tmp2, tmp2, tmp4 ) /* Shift (tmp1 & 63). */
.Lhit_limit: .Lhit_limit:
mov len, limit mov len, limit
ret ret
ENDPROC(strnlen) ENDPIPROC(strnlen)

View file

@ -933,6 +933,10 @@ static int __init __iommu_dma_init(void)
ret = register_iommu_dma_ops_notifier(&platform_bus_type); ret = register_iommu_dma_ops_notifier(&platform_bus_type);
if (!ret) if (!ret)
ret = register_iommu_dma_ops_notifier(&amba_bustype); ret = register_iommu_dma_ops_notifier(&amba_bustype);
/* handle devices queued before this arch_initcall */
if (!ret)
__iommu_attach_notifier(NULL, BUS_NOTIFY_ADD_DEVICE, NULL);
return ret; return ret;
} }
arch_initcall(__iommu_dma_init); arch_initcall(__iommu_dma_init);

View file

@ -371,6 +371,13 @@ static int __kprobes do_translation_fault(unsigned long addr,
return 0; return 0;
} }
static int do_alignment_fault(unsigned long addr, unsigned int esr,
struct pt_regs *regs)
{
do_bad_area(addr, esr, regs);
return 0;
}
/* /*
* This abort handler always returns "fault". * This abort handler always returns "fault".
*/ */
@ -418,7 +425,7 @@ static struct fault_info {
{ do_bad, SIGBUS, 0, "synchronous parity error (translation table walk)" }, { do_bad, SIGBUS, 0, "synchronous parity error (translation table walk)" },
{ do_bad, SIGBUS, 0, "synchronous parity error (translation table walk)" }, { do_bad, SIGBUS, 0, "synchronous parity error (translation table walk)" },
{ do_bad, SIGBUS, 0, "unknown 32" }, { do_bad, SIGBUS, 0, "unknown 32" },
{ do_bad, SIGBUS, BUS_ADRALN, "alignment fault" }, { do_alignment_fault, SIGBUS, BUS_ADRALN, "alignment fault" },
{ do_bad, SIGBUS, 0, "unknown 34" }, { do_bad, SIGBUS, 0, "unknown 34" },
{ do_bad, SIGBUS, 0, "unknown 35" }, { do_bad, SIGBUS, 0, "unknown 35" },
{ do_bad, SIGBUS, 0, "unknown 36" }, { do_bad, SIGBUS, 0, "unknown 36" },

View file

@ -319,8 +319,8 @@ void __init mem_init(void)
#endif #endif
MLG(VMALLOC_START, VMALLOC_END), MLG(VMALLOC_START, VMALLOC_END),
#ifdef CONFIG_SPARSEMEM_VMEMMAP #ifdef CONFIG_SPARSEMEM_VMEMMAP
MLG((unsigned long)vmemmap, MLG(VMEMMAP_START,
(unsigned long)vmemmap + VMEMMAP_SIZE), VMEMMAP_START + VMEMMAP_SIZE),
MLM((unsigned long)virt_to_page(PAGE_OFFSET), MLM((unsigned long)virt_to_page(PAGE_OFFSET),
(unsigned long)virt_to_page(high_memory)), (unsigned long)virt_to_page(high_memory)),
#endif #endif

View file

@ -53,10 +53,10 @@ unsigned long arch_mmap_rnd(void)
#ifdef CONFIG_COMPAT #ifdef CONFIG_COMPAT
if (test_thread_flag(TIF_32BIT)) if (test_thread_flag(TIF_32BIT))
rnd = (unsigned long)get_random_int() & ((1 << mmap_rnd_compat_bits) - 1); rnd = get_random_long() & ((1UL << mmap_rnd_compat_bits) - 1);
else else
#endif #endif
rnd = (unsigned long)get_random_int() & ((1 << mmap_rnd_bits) - 1); rnd = get_random_long() & ((1UL << mmap_rnd_bits) - 1);
return rnd << PAGE_SHIFT; return rnd << PAGE_SHIFT;
} }

View file

@ -108,6 +108,8 @@ CONFIG_NFT_NAT=m
CONFIG_NFT_QUEUE=m CONFIG_NFT_QUEUE=m
CONFIG_NFT_REJECT=m CONFIG_NFT_REJECT=m
CONFIG_NFT_COMPAT=m CONFIG_NFT_COMPAT=m
CONFIG_NFT_DUP_NETDEV=m
CONFIG_NFT_FWD_NETDEV=m
CONFIG_NETFILTER_XT_SET=m CONFIG_NETFILTER_XT_SET=m
CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
@ -266,6 +268,12 @@ CONFIG_L2TP=m
CONFIG_BRIDGE=m CONFIG_BRIDGE=m
CONFIG_ATALK=m CONFIG_ATALK=m
CONFIG_6LOWPAN=m CONFIG_6LOWPAN=m
CONFIG_6LOWPAN_GHC_EXT_HDR_HOP=m
CONFIG_6LOWPAN_GHC_UDP=m
CONFIG_6LOWPAN_GHC_ICMPV6=m
CONFIG_6LOWPAN_GHC_EXT_HDR_DEST=m
CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG=m
CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE=m
CONFIG_DNS_RESOLVER=y CONFIG_DNS_RESOLVER=y
CONFIG_BATMAN_ADV=m CONFIG_BATMAN_ADV=m
CONFIG_BATMAN_ADV_DAT=y CONFIG_BATMAN_ADV_DAT=y
@ -366,6 +374,7 @@ CONFIG_ARIADNE=y
# CONFIG_NET_VENDOR_INTEL is not set # CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_NETRONOME is not set
CONFIG_HYDRA=y CONFIG_HYDRA=y
CONFIG_APNE=y CONFIG_APNE=y
CONFIG_ZORRO8390=y CONFIG_ZORRO8390=y

View file

@ -106,6 +106,8 @@ CONFIG_NFT_NAT=m
CONFIG_NFT_QUEUE=m CONFIG_NFT_QUEUE=m
CONFIG_NFT_REJECT=m CONFIG_NFT_REJECT=m
CONFIG_NFT_COMPAT=m CONFIG_NFT_COMPAT=m
CONFIG_NFT_DUP_NETDEV=m
CONFIG_NFT_FWD_NETDEV=m
CONFIG_NETFILTER_XT_SET=m CONFIG_NETFILTER_XT_SET=m
CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
@ -264,6 +266,12 @@ CONFIG_L2TP=m
CONFIG_BRIDGE=m CONFIG_BRIDGE=m
CONFIG_ATALK=m CONFIG_ATALK=m
CONFIG_6LOWPAN=m CONFIG_6LOWPAN=m
CONFIG_6LOWPAN_GHC_EXT_HDR_HOP=m
CONFIG_6LOWPAN_GHC_UDP=m
CONFIG_6LOWPAN_GHC_ICMPV6=m
CONFIG_6LOWPAN_GHC_EXT_HDR_DEST=m
CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG=m
CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE=m
CONFIG_DNS_RESOLVER=y CONFIG_DNS_RESOLVER=y
CONFIG_BATMAN_ADV=m CONFIG_BATMAN_ADV=m
CONFIG_BATMAN_ADV_DAT=y CONFIG_BATMAN_ADV_DAT=y
@ -344,6 +352,7 @@ CONFIG_VETH=m
# CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_NATSEMI is not set # CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_NETRONOME is not set
# CONFIG_NET_VENDOR_QUALCOMM is not set # CONFIG_NET_VENDOR_QUALCOMM is not set
# CONFIG_NET_VENDOR_RENESAS is not set # CONFIG_NET_VENDOR_RENESAS is not set
# CONFIG_NET_VENDOR_ROCKER is not set # CONFIG_NET_VENDOR_ROCKER is not set

View file

@ -106,6 +106,8 @@ CONFIG_NFT_NAT=m
CONFIG_NFT_QUEUE=m CONFIG_NFT_QUEUE=m
CONFIG_NFT_REJECT=m CONFIG_NFT_REJECT=m
CONFIG_NFT_COMPAT=m CONFIG_NFT_COMPAT=m
CONFIG_NFT_DUP_NETDEV=m
CONFIG_NFT_FWD_NETDEV=m
CONFIG_NETFILTER_XT_SET=m CONFIG_NETFILTER_XT_SET=m
CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
@ -264,6 +266,12 @@ CONFIG_L2TP=m
CONFIG_BRIDGE=m CONFIG_BRIDGE=m
CONFIG_ATALK=m CONFIG_ATALK=m
CONFIG_6LOWPAN=m CONFIG_6LOWPAN=m
CONFIG_6LOWPAN_GHC_EXT_HDR_HOP=m
CONFIG_6LOWPAN_GHC_UDP=m
CONFIG_6LOWPAN_GHC_ICMPV6=m
CONFIG_6LOWPAN_GHC_EXT_HDR_DEST=m
CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG=m
CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE=m
CONFIG_DNS_RESOLVER=y CONFIG_DNS_RESOLVER=y
CONFIG_BATMAN_ADV=m CONFIG_BATMAN_ADV=m
CONFIG_BATMAN_ADV_DAT=y CONFIG_BATMAN_ADV_DAT=y
@ -353,6 +361,7 @@ CONFIG_ATARILANCE=y
# CONFIG_NET_VENDOR_INTEL is not set # CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_NETRONOME is not set
CONFIG_NE2000=y CONFIG_NE2000=y
# CONFIG_NET_VENDOR_QUALCOMM is not set # CONFIG_NET_VENDOR_QUALCOMM is not set
# CONFIG_NET_VENDOR_RENESAS is not set # CONFIG_NET_VENDOR_RENESAS is not set

View file

@ -104,6 +104,8 @@ CONFIG_NFT_NAT=m
CONFIG_NFT_QUEUE=m CONFIG_NFT_QUEUE=m
CONFIG_NFT_REJECT=m CONFIG_NFT_REJECT=m
CONFIG_NFT_COMPAT=m CONFIG_NFT_COMPAT=m
CONFIG_NFT_DUP_NETDEV=m
CONFIG_NFT_FWD_NETDEV=m
CONFIG_NETFILTER_XT_SET=m CONFIG_NETFILTER_XT_SET=m
CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
@ -262,6 +264,12 @@ CONFIG_L2TP=m
CONFIG_BRIDGE=m CONFIG_BRIDGE=m
CONFIG_ATALK=m CONFIG_ATALK=m
CONFIG_6LOWPAN=m CONFIG_6LOWPAN=m
CONFIG_6LOWPAN_GHC_EXT_HDR_HOP=m
CONFIG_6LOWPAN_GHC_UDP=m
CONFIG_6LOWPAN_GHC_ICMPV6=m
CONFIG_6LOWPAN_GHC_EXT_HDR_DEST=m
CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG=m
CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE=m
CONFIG_DNS_RESOLVER=y CONFIG_DNS_RESOLVER=y
CONFIG_BATMAN_ADV=m CONFIG_BATMAN_ADV=m
CONFIG_BATMAN_ADV_DAT=y CONFIG_BATMAN_ADV_DAT=y
@ -343,6 +351,7 @@ CONFIG_BVME6000_NET=y
# CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_NATSEMI is not set # CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_NETRONOME is not set
# CONFIG_NET_VENDOR_QUALCOMM is not set # CONFIG_NET_VENDOR_QUALCOMM is not set
# CONFIG_NET_VENDOR_RENESAS is not set # CONFIG_NET_VENDOR_RENESAS is not set
# CONFIG_NET_VENDOR_ROCKER is not set # CONFIG_NET_VENDOR_ROCKER is not set

View file

@ -106,6 +106,8 @@ CONFIG_NFT_NAT=m
CONFIG_NFT_QUEUE=m CONFIG_NFT_QUEUE=m
CONFIG_NFT_REJECT=m CONFIG_NFT_REJECT=m
CONFIG_NFT_COMPAT=m CONFIG_NFT_COMPAT=m
CONFIG_NFT_DUP_NETDEV=m
CONFIG_NFT_FWD_NETDEV=m
CONFIG_NETFILTER_XT_SET=m CONFIG_NETFILTER_XT_SET=m
CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
@ -264,6 +266,12 @@ CONFIG_L2TP=m
CONFIG_BRIDGE=m CONFIG_BRIDGE=m
CONFIG_ATALK=m CONFIG_ATALK=m
CONFIG_6LOWPAN=m CONFIG_6LOWPAN=m
CONFIG_6LOWPAN_GHC_EXT_HDR_HOP=m
CONFIG_6LOWPAN_GHC_UDP=m
CONFIG_6LOWPAN_GHC_ICMPV6=m
CONFIG_6LOWPAN_GHC_EXT_HDR_DEST=m
CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG=m
CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE=m
CONFIG_DNS_RESOLVER=y CONFIG_DNS_RESOLVER=y
CONFIG_BATMAN_ADV=m CONFIG_BATMAN_ADV=m
CONFIG_BATMAN_ADV_DAT=y CONFIG_BATMAN_ADV_DAT=y
@ -345,6 +353,7 @@ CONFIG_HPLANCE=y
# CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_NATSEMI is not set # CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_NETRONOME is not set
# CONFIG_NET_VENDOR_QUALCOMM is not set # CONFIG_NET_VENDOR_QUALCOMM is not set
# CONFIG_NET_VENDOR_RENESAS is not set # CONFIG_NET_VENDOR_RENESAS is not set
# CONFIG_NET_VENDOR_ROCKER is not set # CONFIG_NET_VENDOR_ROCKER is not set

View file

@ -105,6 +105,8 @@ CONFIG_NFT_NAT=m
CONFIG_NFT_QUEUE=m CONFIG_NFT_QUEUE=m
CONFIG_NFT_REJECT=m CONFIG_NFT_REJECT=m
CONFIG_NFT_COMPAT=m CONFIG_NFT_COMPAT=m
CONFIG_NFT_DUP_NETDEV=m
CONFIG_NFT_FWD_NETDEV=m
CONFIG_NETFILTER_XT_SET=m CONFIG_NETFILTER_XT_SET=m
CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
@ -266,6 +268,12 @@ CONFIG_DEV_APPLETALK=m
CONFIG_IPDDP=m CONFIG_IPDDP=m
CONFIG_IPDDP_ENCAP=y CONFIG_IPDDP_ENCAP=y
CONFIG_6LOWPAN=m CONFIG_6LOWPAN=m
CONFIG_6LOWPAN_GHC_EXT_HDR_HOP=m
CONFIG_6LOWPAN_GHC_UDP=m
CONFIG_6LOWPAN_GHC_ICMPV6=m
CONFIG_6LOWPAN_GHC_EXT_HDR_DEST=m
CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG=m
CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE=m
CONFIG_DNS_RESOLVER=y CONFIG_DNS_RESOLVER=y
CONFIG_BATMAN_ADV=m CONFIG_BATMAN_ADV=m
CONFIG_BATMAN_ADV_DAT=y CONFIG_BATMAN_ADV_DAT=y
@ -362,6 +370,7 @@ CONFIG_MAC89x0=y
# CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICREL is not set
CONFIG_MACSONIC=y CONFIG_MACSONIC=y
# CONFIG_NET_VENDOR_NETRONOME is not set
CONFIG_MAC8390=y CONFIG_MAC8390=y
# CONFIG_NET_VENDOR_QUALCOMM is not set # CONFIG_NET_VENDOR_QUALCOMM is not set
# CONFIG_NET_VENDOR_RENESAS is not set # CONFIG_NET_VENDOR_RENESAS is not set

View file

@ -115,6 +115,8 @@ CONFIG_NFT_NAT=m
CONFIG_NFT_QUEUE=m CONFIG_NFT_QUEUE=m
CONFIG_NFT_REJECT=m CONFIG_NFT_REJECT=m
CONFIG_NFT_COMPAT=m CONFIG_NFT_COMPAT=m
CONFIG_NFT_DUP_NETDEV=m
CONFIG_NFT_FWD_NETDEV=m
CONFIG_NETFILTER_XT_SET=m CONFIG_NETFILTER_XT_SET=m
CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
@ -276,6 +278,12 @@ CONFIG_DEV_APPLETALK=m
CONFIG_IPDDP=m CONFIG_IPDDP=m
CONFIG_IPDDP_ENCAP=y CONFIG_IPDDP_ENCAP=y
CONFIG_6LOWPAN=m CONFIG_6LOWPAN=m
CONFIG_6LOWPAN_GHC_EXT_HDR_HOP=m
CONFIG_6LOWPAN_GHC_UDP=m
CONFIG_6LOWPAN_GHC_ICMPV6=m
CONFIG_6LOWPAN_GHC_EXT_HDR_DEST=m
CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG=m
CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE=m
CONFIG_DNS_RESOLVER=y CONFIG_DNS_RESOLVER=y
CONFIG_BATMAN_ADV=m CONFIG_BATMAN_ADV=m
CONFIG_BATMAN_ADV_DAT=y CONFIG_BATMAN_ADV_DAT=y
@ -404,6 +412,7 @@ CONFIG_MVME16x_NET=y
# CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICREL is not set
CONFIG_MACSONIC=y CONFIG_MACSONIC=y
# CONFIG_NET_VENDOR_NETRONOME is not set
CONFIG_HYDRA=y CONFIG_HYDRA=y
CONFIG_MAC8390=y CONFIG_MAC8390=y
CONFIG_NE2000=y CONFIG_NE2000=y

View file

@ -103,6 +103,8 @@ CONFIG_NFT_NAT=m
CONFIG_NFT_QUEUE=m CONFIG_NFT_QUEUE=m
CONFIG_NFT_REJECT=m CONFIG_NFT_REJECT=m
CONFIG_NFT_COMPAT=m CONFIG_NFT_COMPAT=m
CONFIG_NFT_DUP_NETDEV=m
CONFIG_NFT_FWD_NETDEV=m
CONFIG_NETFILTER_XT_SET=m CONFIG_NETFILTER_XT_SET=m
CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
@ -261,6 +263,12 @@ CONFIG_L2TP=m
CONFIG_BRIDGE=m CONFIG_BRIDGE=m
CONFIG_ATALK=m CONFIG_ATALK=m
CONFIG_6LOWPAN=m CONFIG_6LOWPAN=m
CONFIG_6LOWPAN_GHC_EXT_HDR_HOP=m
CONFIG_6LOWPAN_GHC_UDP=m
CONFIG_6LOWPAN_GHC_ICMPV6=m
CONFIG_6LOWPAN_GHC_EXT_HDR_DEST=m
CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG=m
CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE=m
CONFIG_DNS_RESOLVER=y CONFIG_DNS_RESOLVER=y
CONFIG_BATMAN_ADV=m CONFIG_BATMAN_ADV=m
CONFIG_BATMAN_ADV_DAT=y CONFIG_BATMAN_ADV_DAT=y
@ -343,6 +351,7 @@ CONFIG_MVME147_NET=y
# CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_NATSEMI is not set # CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_NETRONOME is not set
# CONFIG_NET_VENDOR_QUALCOMM is not set # CONFIG_NET_VENDOR_QUALCOMM is not set
# CONFIG_NET_VENDOR_RENESAS is not set # CONFIG_NET_VENDOR_RENESAS is not set
# CONFIG_NET_VENDOR_ROCKER is not set # CONFIG_NET_VENDOR_ROCKER is not set

View file

@ -104,6 +104,8 @@ CONFIG_NFT_NAT=m
CONFIG_NFT_QUEUE=m CONFIG_NFT_QUEUE=m
CONFIG_NFT_REJECT=m CONFIG_NFT_REJECT=m
CONFIG_NFT_COMPAT=m CONFIG_NFT_COMPAT=m
CONFIG_NFT_DUP_NETDEV=m
CONFIG_NFT_FWD_NETDEV=m
CONFIG_NETFILTER_XT_SET=m CONFIG_NETFILTER_XT_SET=m
CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
@ -262,6 +264,12 @@ CONFIG_L2TP=m
CONFIG_BRIDGE=m CONFIG_BRIDGE=m
CONFIG_ATALK=m CONFIG_ATALK=m
CONFIG_6LOWPAN=m CONFIG_6LOWPAN=m
CONFIG_6LOWPAN_GHC_EXT_HDR_HOP=m
CONFIG_6LOWPAN_GHC_UDP=m
CONFIG_6LOWPAN_GHC_ICMPV6=m
CONFIG_6LOWPAN_GHC_EXT_HDR_DEST=m
CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG=m
CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE=m
CONFIG_DNS_RESOLVER=y CONFIG_DNS_RESOLVER=y
CONFIG_BATMAN_ADV=m CONFIG_BATMAN_ADV=m
CONFIG_BATMAN_ADV_DAT=y CONFIG_BATMAN_ADV_DAT=y
@ -343,6 +351,7 @@ CONFIG_MVME16x_NET=y
# CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_NATSEMI is not set # CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_NETRONOME is not set
# CONFIG_NET_VENDOR_QUALCOMM is not set # CONFIG_NET_VENDOR_QUALCOMM is not set
# CONFIG_NET_VENDOR_RENESAS is not set # CONFIG_NET_VENDOR_RENESAS is not set
# CONFIG_NET_VENDOR_ROCKER is not set # CONFIG_NET_VENDOR_ROCKER is not set

View file

@ -104,6 +104,8 @@ CONFIG_NFT_NAT=m
CONFIG_NFT_QUEUE=m CONFIG_NFT_QUEUE=m
CONFIG_NFT_REJECT=m CONFIG_NFT_REJECT=m
CONFIG_NFT_COMPAT=m CONFIG_NFT_COMPAT=m
CONFIG_NFT_DUP_NETDEV=m
CONFIG_NFT_FWD_NETDEV=m
CONFIG_NETFILTER_XT_SET=m CONFIG_NETFILTER_XT_SET=m
CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
@ -262,6 +264,12 @@ CONFIG_L2TP=m
CONFIG_BRIDGE=m CONFIG_BRIDGE=m
CONFIG_ATALK=m CONFIG_ATALK=m
CONFIG_6LOWPAN=m CONFIG_6LOWPAN=m
CONFIG_6LOWPAN_GHC_EXT_HDR_HOP=m
CONFIG_6LOWPAN_GHC_UDP=m
CONFIG_6LOWPAN_GHC_ICMPV6=m
CONFIG_6LOWPAN_GHC_EXT_HDR_DEST=m
CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG=m
CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE=m
CONFIG_DNS_RESOLVER=y CONFIG_DNS_RESOLVER=y
CONFIG_BATMAN_ADV=m CONFIG_BATMAN_ADV=m
CONFIG_BATMAN_ADV_DAT=y CONFIG_BATMAN_ADV_DAT=y
@ -352,6 +360,7 @@ CONFIG_VETH=m
# CONFIG_NET_VENDOR_INTEL is not set # CONFIG_NET_VENDOR_INTEL is not set
# CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_NETRONOME is not set
CONFIG_NE2000=y CONFIG_NE2000=y
# CONFIG_NET_VENDOR_QUALCOMM is not set # CONFIG_NET_VENDOR_QUALCOMM is not set
# CONFIG_NET_VENDOR_RENESAS is not set # CONFIG_NET_VENDOR_RENESAS is not set

View file

@ -101,6 +101,8 @@ CONFIG_NFT_NAT=m
CONFIG_NFT_QUEUE=m CONFIG_NFT_QUEUE=m
CONFIG_NFT_REJECT=m CONFIG_NFT_REJECT=m
CONFIG_NFT_COMPAT=m CONFIG_NFT_COMPAT=m
CONFIG_NFT_DUP_NETDEV=m
CONFIG_NFT_FWD_NETDEV=m
CONFIG_NETFILTER_XT_SET=m CONFIG_NETFILTER_XT_SET=m
CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
@ -259,6 +261,12 @@ CONFIG_L2TP=m
CONFIG_BRIDGE=m CONFIG_BRIDGE=m
CONFIG_ATALK=m CONFIG_ATALK=m
CONFIG_6LOWPAN=m CONFIG_6LOWPAN=m
CONFIG_6LOWPAN_GHC_EXT_HDR_HOP=m
CONFIG_6LOWPAN_GHC_UDP=m
CONFIG_6LOWPAN_GHC_ICMPV6=m
CONFIG_6LOWPAN_GHC_EXT_HDR_DEST=m
CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG=m
CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE=m
CONFIG_DNS_RESOLVER=y CONFIG_DNS_RESOLVER=y
CONFIG_BATMAN_ADV=m CONFIG_BATMAN_ADV=m
CONFIG_BATMAN_ADV_DAT=y CONFIG_BATMAN_ADV_DAT=y
@ -340,6 +348,7 @@ CONFIG_SUN3_82586=y
# CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_NATSEMI is not set # CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_NETRONOME is not set
# CONFIG_NET_VENDOR_QUALCOMM is not set # CONFIG_NET_VENDOR_QUALCOMM is not set
# CONFIG_NET_VENDOR_RENESAS is not set # CONFIG_NET_VENDOR_RENESAS is not set
# CONFIG_NET_VENDOR_ROCKER is not set # CONFIG_NET_VENDOR_ROCKER is not set

View file

@ -101,6 +101,8 @@ CONFIG_NFT_NAT=m
CONFIG_NFT_QUEUE=m CONFIG_NFT_QUEUE=m
CONFIG_NFT_REJECT=m CONFIG_NFT_REJECT=m
CONFIG_NFT_COMPAT=m CONFIG_NFT_COMPAT=m
CONFIG_NFT_DUP_NETDEV=m
CONFIG_NFT_FWD_NETDEV=m
CONFIG_NETFILTER_XT_SET=m CONFIG_NETFILTER_XT_SET=m
CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
@ -259,6 +261,12 @@ CONFIG_L2TP=m
CONFIG_BRIDGE=m CONFIG_BRIDGE=m
CONFIG_ATALK=m CONFIG_ATALK=m
CONFIG_6LOWPAN=m CONFIG_6LOWPAN=m
CONFIG_6LOWPAN_GHC_EXT_HDR_HOP=m
CONFIG_6LOWPAN_GHC_UDP=m
CONFIG_6LOWPAN_GHC_ICMPV6=m
CONFIG_6LOWPAN_GHC_EXT_HDR_DEST=m
CONFIG_6LOWPAN_GHC_EXT_HDR_FRAG=m
CONFIG_6LOWPAN_GHC_EXT_HDR_ROUTE=m
CONFIG_DNS_RESOLVER=y CONFIG_DNS_RESOLVER=y
CONFIG_BATMAN_ADV=m CONFIG_BATMAN_ADV=m
CONFIG_BATMAN_ADV_DAT=y CONFIG_BATMAN_ADV_DAT=y
@ -341,6 +349,7 @@ CONFIG_SUN3LANCE=y
# CONFIG_NET_VENDOR_MARVELL is not set # CONFIG_NET_VENDOR_MARVELL is not set
# CONFIG_NET_VENDOR_MICREL is not set # CONFIG_NET_VENDOR_MICREL is not set
# CONFIG_NET_VENDOR_NATSEMI is not set # CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_NETRONOME is not set
# CONFIG_NET_VENDOR_QUALCOMM is not set # CONFIG_NET_VENDOR_QUALCOMM is not set
# CONFIG_NET_VENDOR_RENESAS is not set # CONFIG_NET_VENDOR_RENESAS is not set
# CONFIG_NET_VENDOR_ROCKER is not set # CONFIG_NET_VENDOR_ROCKER is not set

View file

@ -4,7 +4,7 @@
#include <uapi/asm/unistd.h> #include <uapi/asm/unistd.h>
#define NR_syscalls 376 #define NR_syscalls 377
#define __ARCH_WANT_OLD_READDIR #define __ARCH_WANT_OLD_READDIR
#define __ARCH_WANT_OLD_STAT #define __ARCH_WANT_OLD_STAT

View file

@ -381,5 +381,6 @@
#define __NR_userfaultfd 373 #define __NR_userfaultfd 373
#define __NR_membarrier 374 #define __NR_membarrier 374
#define __NR_mlock2 375 #define __NR_mlock2 375
#define __NR_copy_file_range 376
#endif /* _UAPI_ASM_M68K_UNISTD_H_ */ #endif /* _UAPI_ASM_M68K_UNISTD_H_ */

View file

@ -396,3 +396,4 @@ ENTRY(sys_call_table)
.long sys_userfaultfd .long sys_userfaultfd
.long sys_membarrier .long sys_membarrier
.long sys_mlock2 /* 375 */ .long sys_mlock2 /* 375 */
.long sys_copy_file_range

View file

@ -270,7 +270,7 @@ uint32_t jz_gpio_port_get_value(int port, uint32_t mask)
} }
EXPORT_SYMBOL(jz_gpio_port_get_value); EXPORT_SYMBOL(jz_gpio_port_get_value);
#define IRQ_TO_BIT(irq) BIT(irq_to_gpio(irq) & 0x1f) #define IRQ_TO_BIT(irq) BIT((irq - JZ4740_IRQ_GPIO(0)) & 0x1f)
static void jz_gpio_check_trigger_both(struct jz_gpio_chip *chip, unsigned int irq) static void jz_gpio_check_trigger_both(struct jz_gpio_chip *chip, unsigned int irq)
{ {

View file

@ -125,7 +125,7 @@ LEAF(_restore_fp_context)
END(_restore_fp_context) END(_restore_fp_context)
.set reorder .set reorder
.type fault@function .type fault, @function
.ent fault .ent fault
fault: li v0, -EFAULT fault: li v0, -EFAULT
jr ra jr ra

View file

@ -358,7 +358,7 @@ LEAF(_restore_msa_all_upper)
.set reorder .set reorder
.type fault@function .type fault, @function
.ent fault .ent fault
fault: li v0, -EFAULT # failure fault: li v0, -EFAULT # failure
jr ra jr ra

View file

@ -690,15 +690,15 @@ static int simulate_sync(struct pt_regs *regs, unsigned int opcode)
asmlinkage void do_ov(struct pt_regs *regs) asmlinkage void do_ov(struct pt_regs *regs)
{ {
enum ctx_state prev_state; enum ctx_state prev_state;
siginfo_t info; siginfo_t info = {
.si_signo = SIGFPE,
.si_code = FPE_INTOVF,
.si_addr = (void __user *)regs->cp0_epc,
};
prev_state = exception_enter(); prev_state = exception_enter();
die_if_kernel("Integer overflow", regs); die_if_kernel("Integer overflow", regs);
info.si_code = FPE_INTOVF;
info.si_signo = SIGFPE;
info.si_errno = 0;
info.si_addr = (void __user *) regs->cp0_epc;
force_sig_info(SIGFPE, &info, current); force_sig_info(SIGFPE, &info, current);
exception_exit(prev_state); exception_exit(prev_state);
} }
@ -874,7 +874,7 @@ out:
void do_trap_or_bp(struct pt_regs *regs, unsigned int code, void do_trap_or_bp(struct pt_regs *regs, unsigned int code,
const char *str) const char *str)
{ {
siginfo_t info; siginfo_t info = { 0 };
char b[40]; char b[40];
#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP #ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
@ -903,7 +903,6 @@ void do_trap_or_bp(struct pt_regs *regs, unsigned int code,
else else
info.si_code = FPE_INTOVF; info.si_code = FPE_INTOVF;
info.si_signo = SIGFPE; info.si_signo = SIGFPE;
info.si_errno = 0;
info.si_addr = (void __user *) regs->cp0_epc; info.si_addr = (void __user *) regs->cp0_epc;
force_sig_info(SIGFPE, &info, current); force_sig_info(SIGFPE, &info, current);
break; break;

View file

@ -702,7 +702,7 @@ static int kvm_mips_get_reg(struct kvm_vcpu *vcpu,
} else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U128) { } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U128) {
void __user *uaddr = (void __user *)(long)reg->addr; void __user *uaddr = (void __user *)(long)reg->addr;
return copy_to_user(uaddr, vs, 16); return copy_to_user(uaddr, vs, 16) ? -EFAULT : 0;
} else { } else {
return -EINVAL; return -EINVAL;
} }
@ -732,7 +732,7 @@ static int kvm_mips_set_reg(struct kvm_vcpu *vcpu,
} else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U128) { } else if ((reg->id & KVM_REG_SIZE_MASK) == KVM_REG_SIZE_U128) {
void __user *uaddr = (void __user *)(long)reg->addr; void __user *uaddr = (void __user *)(long)reg->addr;
return copy_from_user(vs, uaddr, 16); return copy_from_user(vs, uaddr, 16) ? -EFAULT : 0;
} else { } else {
return -EINVAL; return -EINVAL;
} }

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