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ARM: dt: tegra: remove unnecessary unit addresses

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DT node names only need to include the unit address if it's required to
make the node name unique. Remove the unnecessary unit addresses.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Stephen Warren 2012-05-11 16:17:47 -06:00
parent 95decf8474
commit f9eb26a4e1
8 changed files with 27 additions and 27 deletions
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4
arch/arm/boot/dts/tegra-cardhu.dts
View file

@ -10,7 +10,7 @@
reg = <0x80000000 0x40000000>;
};
pinmux@70000000 {
pinmux {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
@ -156,7 +156,7 @@
support-8bit;
};
ahub@70080000 {
ahub {
i2s@70080300 {
status = "disable";
};

6
arch/arm/boot/dts/tegra-harmony.dts
View file

@ -6,11 +6,11 @@
model = "NVIDIA Tegra2 Harmony evaluation board";
compatible = "nvidia,harmony", "nvidia,tegra20";
memory@0 {
memory {
reg = <0x00000000 0x40000000>;
};
pinmux@70000000 {
pinmux {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
@ -234,7 +234,7 @@
};
};
pmc@7000f400 {
pmc {
nvidia,invert-interrupt;
};

6
arch/arm/boot/dts/tegra-paz00.dts
View file

@ -6,11 +6,11 @@
model = "Toshiba AC100 / Dynabook AZ";
compatible = "compal,paz00", "nvidia,tegra20";
memory@0 {
memory {
reg = <0x00000000 0x20000000>;
};
pinmux@70000000 {
pinmux {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
@ -245,7 +245,7 @@
status = "disable";
};
nvec@7000c500 {
nvec {
#address-cells = <1>;
#size-cells = <0>;
compatible = "nvidia,nvec";

4
arch/arm/boot/dts/tegra-seaboard.dts
View file

@ -11,7 +11,7 @@
reg = <0x00000000 0x40000000>;
};
pinmux@70000000 {
pinmux {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
@ -411,7 +411,7 @@
};
};
emc@7000f400 {
emc {
emc-table@190000 {
reg = <190000>;
compatible = "nvidia,tegra20-emc-table";

4
arch/arm/boot/dts/tegra-trimslice.dts
View file

@ -6,11 +6,11 @@
model = "Compulab TrimSlice board";
compatible = "compulab,trimslice", "nvidia,tegra20";
memory@0 {
memory {
reg = <0x00000000 0x40000000>;
};
pinmux@70000000 {
pinmux {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;

2
arch/arm/boot/dts/tegra-ventana.dts
View file

@ -10,7 +10,7 @@
reg = <0x00000000 0x40000000>;
};
pinmux@70000000 {
pinmux {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;

16
arch/arm/boot/dts/tegra20.dtsi
View file

@ -4,12 +4,12 @@
compatible = "nvidia,tegra20";
interrupt-parent = <&intc>;
pmc@7000f400 {
pmc {
compatible = "nvidia,tegra20-pmc";
reg = <0x7000e400 0x400>;
};
intc: interrupt-controller@50041000 {
intc: interrupt-controller {
compatible = "arm,cortex-a9-gic";
interrupt-controller;
#interrupt-cells = <3>;
@ -23,7 +23,7 @@
0 57 0x04>;
};
apbdma: dma@6000a000 {
apbdma: dma {
compatible = "nvidia,tegra20-apbdma";
reg = <0x6000a000 0x1200>;
interrupts = <0 104 0x04
@ -90,12 +90,12 @@
nvidia,dma-request-selector = <&apbdma 1>;
};
das@70000c00 {
das {
compatible = "nvidia,tegra20-das";
reg = <0x70000c00 0x80>;
};
gpio: gpio@6000d000 {
gpio: gpio {
compatible = "nvidia,tegra20-gpio";
reg = <0x6000d000 0x1000>;
interrupts = <0 32 0x04
@ -111,7 +111,7 @@
interrupt-controller;
};
pinmux: pinmux@70000000 {
pinmux: pinmux {
compatible = "nvidia,tegra20-pinmux";
reg = <0x70000014 0x10 /* Tri-state registers */
0x70000080 0x20 /* Mux registers */
@ -154,7 +154,7 @@
interrupts = <0 91 0x04>;
};
emc@7000f400 {
emc {
#address-cells = <1>;
#size-cells = <0>;
compatible = "nvidia,tegra20-emc";
@ -207,7 +207,7 @@
phy_type = "utmi";
};
ahb: ahb@6000c004 {
ahb {
compatible = "nvidia,tegra20-ahb";
reg = <0x6000c004 0x10c>; /* AHB Arbitration + Gizmo Controller */
};

12
arch/arm/boot/dts/tegra30.dtsi
View file

@ -4,12 +4,12 @@
compatible = "nvidia,tegra30";
interrupt-parent = <&intc>;
pmc@7000f400 {
pmc {
compatible = "nvidia,tegra20-pmc", "nvidia,tegra30-pmc";
reg = <0x7000e400 0x400>;
};
intc: interrupt-controller@50041000 {
intc: interrupt-controller {
compatible = "arm,cortex-a9-gic";
interrupt-controller;
#interrupt-cells = <3>;
@ -25,7 +25,7 @@
0 147 0x04>;
};
apbdma: dma@6000a000 {
apbdma: dma {
compatible = "nvidia,tegra30-apbdma", "nvidia,tegra20-apbdma";
reg = <0x6000a000 0x1400>;
interrupts = <0 104 0x04
@ -102,7 +102,7 @@
interrupts = <0 53 0x04>;
};
gpio: gpio@6000d000 {
gpio: gpio {
compatible = "nvidia,tegra30-gpio", "nvidia,tegra20-gpio";
reg = <0x6000d000 0x1000>;
interrupts = <0 32 0x04
@ -178,7 +178,7 @@
interrupts = <0 31 0x04>;
};
pinmux: pinmux@70000000 {
pinmux: pinmux {
compatible = "nvidia,tegra30-pinmux";
reg = <0x70000868 0xd0 /* Pad control registers */
0x70003000 0x3e0>; /* Mux registers */
@ -225,7 +225,7 @@
};
};
ahb: ahb@6000c004 {
ahb: ahb {
compatible = "nvidia,tegra30-ahb";
reg = <0x6000c004 0x14c>; /* AHB Arbitration + Gizmo Controller */
};