drm/radeon: add ring and IB tests for CIK (v3)
v2: add documenation v3: update the latest ib changes Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1 changed files with 114 additions and 0 deletions
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@ -1517,6 +1517,57 @@ static void cik_scratch_init(struct radeon_device *rdev)
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}
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}
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/**
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* cik_ring_test - basic gfx ring test
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*
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* @rdev: radeon_device pointer
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* @ring: radeon_ring structure holding ring information
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*
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* Allocate a scratch register and write to it using the gfx ring (CIK).
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* Provides a basic gfx ring test to verify that the ring is working.
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* Used by cik_cp_gfx_resume();
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* Returns 0 on success, error on failure.
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*/
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int cik_ring_test(struct radeon_device *rdev, struct radeon_ring *ring)
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{
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uint32_t scratch;
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uint32_t tmp = 0;
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unsigned i;
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int r;
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r = radeon_scratch_get(rdev, &scratch);
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if (r) {
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DRM_ERROR("radeon: cp failed to get scratch reg (%d).\n", r);
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return r;
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}
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WREG32(scratch, 0xCAFEDEAD);
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r = radeon_ring_lock(rdev, ring, 3);
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if (r) {
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DRM_ERROR("radeon: cp failed to lock ring %d (%d).\n", ring->idx, r);
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radeon_scratch_free(rdev, scratch);
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return r;
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}
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radeon_ring_write(ring, PACKET3(PACKET3_SET_UCONFIG_REG, 1));
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radeon_ring_write(ring, ((scratch - PACKET3_SET_UCONFIG_REG_START) >> 2));
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radeon_ring_write(ring, 0xDEADBEEF);
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radeon_ring_unlock_commit(rdev, ring);
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for (i = 0; i < rdev->usec_timeout; i++) {
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tmp = RREG32(scratch);
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if (tmp == 0xDEADBEEF)
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break;
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DRM_UDELAY(1);
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}
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if (i < rdev->usec_timeout) {
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DRM_INFO("ring test on %d succeeded in %d usecs\n", ring->idx, i);
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} else {
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DRM_ERROR("radeon: ring %d test failed (scratch(0x%04X)=0x%08X)\n",
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ring->idx, scratch, tmp);
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r = -EINVAL;
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}
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radeon_scratch_free(rdev, scratch);
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return r;
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}
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/**
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* cik_fence_ring_emit - emit a fence on the gfx ring
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*
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@ -1626,6 +1677,69 @@ void cik_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib)
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radeon_ring_write(ring, control);
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}
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/**
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* cik_ib_test - basic gfx ring IB test
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*
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* @rdev: radeon_device pointer
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* @ring: radeon_ring structure holding ring information
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*
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* Allocate an IB and execute it on the gfx ring (CIK).
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* Provides a basic gfx ring test to verify that IBs are working.
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* Returns 0 on success, error on failure.
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*/
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int cik_ib_test(struct radeon_device *rdev, struct radeon_ring *ring)
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{
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struct radeon_ib ib;
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uint32_t scratch;
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uint32_t tmp = 0;
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unsigned i;
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int r;
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r = radeon_scratch_get(rdev, &scratch);
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if (r) {
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DRM_ERROR("radeon: failed to get scratch reg (%d).\n", r);
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return r;
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}
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WREG32(scratch, 0xCAFEDEAD);
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r = radeon_ib_get(rdev, ring->idx, &ib, NULL, 256);
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if (r) {
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DRM_ERROR("radeon: failed to get ib (%d).\n", r);
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return r;
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}
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ib.ptr[0] = PACKET3(PACKET3_SET_UCONFIG_REG, 1);
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ib.ptr[1] = ((scratch - PACKET3_SET_UCONFIG_REG_START) >> 2);
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ib.ptr[2] = 0xDEADBEEF;
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ib.length_dw = 3;
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r = radeon_ib_schedule(rdev, &ib, NULL);
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if (r) {
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radeon_scratch_free(rdev, scratch);
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radeon_ib_free(rdev, &ib);
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DRM_ERROR("radeon: failed to schedule ib (%d).\n", r);
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return r;
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}
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r = radeon_fence_wait(ib.fence, false);
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if (r) {
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DRM_ERROR("radeon: fence wait failed (%d).\n", r);
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return r;
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}
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for (i = 0; i < rdev->usec_timeout; i++) {
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tmp = RREG32(scratch);
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if (tmp == 0xDEADBEEF)
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break;
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DRM_UDELAY(1);
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}
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if (i < rdev->usec_timeout) {
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DRM_INFO("ib test on ring %d succeeded in %u usecs\n", ib.fence->ring, i);
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} else {
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DRM_ERROR("radeon: ib test failed (scratch(0x%04X)=0x%08X)\n",
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scratch, tmp);
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r = -EINVAL;
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}
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radeon_scratch_free(rdev, scratch);
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radeon_ib_free(rdev, &ib);
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return r;
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}
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/*
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* CP.
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* On CIK, gfx and compute now have independant command processors.
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