Currently, when entering AOD mode, poll time for AB VREG_OK is
set to 100 ms. Make it configurable through a DT property so that
it can be set based on the panel behavior.
Change-Id: Ifc4677a9d80398a3014d0d8ffc4944d283c523ca
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
This is a snapshot of the regulator PM8008 Documentation as of
msm-4.14 'commit 1e5b61175fef (Merged: Merge "ARM: dts: msm:
Add tpdm lpass for sdmmagpie")'.
Change-Id: Iffaf820b4549adc40b02073a140cb8f2722c1eac
Signed-off-by: Umang Agrawal <uagrawal@codeaurora.org>
Add binding to support phy clock voting from eud. This is required
to avoid unclocked access to eud registers.
Change-Id: I25a5358c9044a2d147190c1653a1ac54660b038a
Signed-off-by: Neeraj Upadhyay <neeraju@codeaurora.org>
Thermal core framework subscribes for suspend/resume notification.
On resume notification it re-evaluates each thermal zone for
temperature and cooling state update. Most of the qcom targets,
large number of thermal zones are enabled for different mitigations.
Re-evaluating each thermal zone during resume leads to multiple issues
including delay in back to back suspend resume scenario, power penalty
for frequent wake up due to re-setting trip threshold especially
during cold temperature usecases. But almost all qcom target TSENS and
ADC sensor interrupts are wakeup capable. More over all internal
cooling devices are platform cooling devices and no impact for cooling
states during suspend. With such sensor and cooling device support,
thermal core resume re-evaluation for each thermal zone is redundant
and it can be ignored to avoid issues mentioned above.
Add wake-capable-sensor property to thermal zone devicetree node to
denote that these sensors are wakeup capable. If a thermal zone has
this property defined, thermal framework ignores resume re-evaluation
and can service the threshold notification during the suspend/resume
path.
Change-Id: I07edf80ad29009378af4c70e750d01bde6f30806
Signed-off-by: Manaf Meethalavalappu Pallikunhi <manafm@codeaurora.org>
Add the LITO debugcc compatible for debug clock controller.
Change-Id: I45a740d88e05f5e55c299463259d5f9b7238345b
Signed-off-by: Taniya Das <tdas@codeaurora.org>
This is a snapshot of the ICNSS driver and associated files as of msm-4.14
commit d3cc4a121396 ("qseecom: Update cache operations around scm_call()").
Checkpatch issues are also fixed on top of this commit.
Change-Id: I891c36d9b6ba15afdaa35aa0797f5c9631fb1adb
Signed-off-by: Naman Padhiar <npadhiar@codeaurora.org>
Setting this property prevents USB to start in host or device mode
so that it goes to low power mode.
Change-Id: Icefee47a0a1a068a3c18f3a05593c883335a16b0
Signed-off-by: Ajay Agarwal <ajaya@codeaurora.org>
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>
Update embedded UFS PHY compatible string and add one specific compatible
string for removable UFS card PHY.
Change-Id: I4e8012df04e4c9f9dcf11d6e241c9e81aee1ad6a
Signed-off-by: Can Guo <cang@codeaurora.org>
This is a snapshot of the vibrator LDO Documentation as of msm-4.14
'commit Ib18fb4bdb6e (Merged "leds: qpnp: add driver file for
configuring vibrator LDO")'.
Change-Id: I49df062c27bfd54b9b0658eb97526be2c2251499
Signed-off-by: Umang Agrawal <uagrawal@codeaurora.org>
These changes reflect the new way of doing SMMU setup and usage.
Change-Id: I5d5493b32c0d0bd955c62a09026a3e97720d3e44
CRs-Fixed: 2398133
Signed-off-by: Perry Randise <prandise@codeaurora.org>
Add definitions for a set of device tree properties which can be
used to manage bus bandwidth votes at runtime. Such voting is
needed on some SoCs to ensure that the GDSC control register is
accessible over the bus.
Change-Id: If8a525b69bde049da43679fe7bbcac215786415a
Signed-off-by: David Collins <collinsd@codeaurora.org>
Add DT binding entry for the qcrypto, qcedev and qcota
drivers for kona.
Change-Id: I6046146db39ef26c0bc10e339848a27356fc612e
Signed-off-by: Zhen Kong <zkong@codeaurora.org>
Update the documentation to let it be known that the bus-freq, bus-min
and bus-max can have DDR specific components.
Change-Id: Ic0dedbad69f25dd4e5bde61fed35b464338c2b2e
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Remove unused properties from the DT documentation.
Change-Id: Ic0dedbad795311398c7eacde3c2ff9486509f1d7
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Documentation for device tree bindings related to CDSPRM and CDSP L3
governor.
Change-Id: Id6f6ec7559c34de68db1503b857093b414000f14
Acked-by: Sreekanth Gande <sgande@qti.qualcomm.com>
Signed-off-by: Tharun Kumar Merugu <mtharu@codeaurora.org>
List of DLL-HSR values which are needed for tuning the DLL
used in the SD and eMMC SDR104/HS400 modes.
Change-Id: Icb3464afd3ff93b5a827643663a5d86f021f3f33
Signed-off-by: Bao D. Nguyen <nguyenb@codeaurora.org>
Add support to read and write FG parameters to SDAM through
nvmem framework. "fg_sdam" should be the nvmem name if specified.
Change-Id: I4d0ddcbcad0834704c8b497c1f43503b8518f971
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Add documentation for 11AD context bank ipa-smmu-11ad-cb and
shared-cb attributes in qcom-ipa node.
11AD context bank page tables can be shared between IPA and 11AD
HW - mapping is done only by 11AD driver.
Change-Id: I6cc044013c1d4b99800215d554cd6474e525da24
Signed-off-by: Amir Levy <alevy@codeaurora.org>
Update the compatible as per common clock framework to indicate the
target,clockcontroller.
Change-Id: I4fc0b290bedc7d0e988ae8e493e0e1c76af099fd
Signed-off-by: Taniya Das <tdas@codeaurora.org>
