Commit graph

6 commits

Author SHA1 Message Date
Stefan Roese
3db3ba0347 [POWERPC] 4xx: Fix L1 cache size in katmai DTS
This patch changes the katmai (440SPe) L1 cache size to 32k. Some
whitespace issues are cleaned up too.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2008-02-27 09:47:11 -06:00
Stefan Roese
e563db977f [POWERPC] 4xx: Remove "i2c" and "xxmii-interface" device_types from dts
Remove all "i2c" and "xxmii-interface" (rgmii etc) device_type entries
from the 4xx dts files.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2008-02-15 21:35:30 -06:00
Stefan Roese
8aaed98c1e [POWERPC] 4xx: Add aliases node to 4xx dts files
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:36:30 -06:00
Josh Boyer
72fda1148e [POWERPC] 4xx: Rename CPU nodes to avoid dtc incompatibility
Recent DTC versions disallow certain special characters in full paths without
being quoted with {}.  That however breaks compatibility with older DTC
versions.  Work around this by renaming the CPU nodes for the 4xx files to a
generic node name, and specify the processor type in the model property of the
CPU node.

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:33:47 -06:00
Stefan Roese
accf5ef254 [POWERPC] 4xx: Add 440SPe revA runtime detection to PCIe
This patch adds runtime detection of the 440SPe revision A chips. These
chips are equipped with a slighly different PCIe core and need special/
different initialization. The compatible node is changed to
"plb-pciex-440spe" ("A" and "B" dropped). This is needed for boards that
can be equipped with both PPC revisions like the AMCC Yucca.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:19:03 -06:00
Benjamin Herrenschmidt
3de9c9cd22 [POWERPC] 4xx: Base support for 440SPe "Katmai" eval board
This adds base support for the Katmai board, including PCI-X and
PCI-Express (but no RTC, nvram, etc... yet).

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-12-23 13:14:57 -06:00