Add Nuvoton W90X900 ARM9 plat support to linux arm tree,
Now, this patch include only W90P910 EVB of W90P910 CPU,
Its driver is nothing.
Signed-off-by: Wan ZongShun <mcuos.com@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Alan Jenkins wrote:
> This is on an EeePC 701, /proc/cpuinfo as attached.
>
> Is this expected? Will the next release work?
>
> Thanks, Alan
>
> # opcontrol --setup --no-vmlinux
> cpu_type 'unset' is not valid
> you should upgrade oprofile or force the use of timer mode
>
> # opcontrol -v
> opcontrol: oprofile 0.9.4 compiled on Nov 29 2008 22:44:10
>
> # cat /dev/oprofile/cpu_type
> i386/p6
> # uname -r
> 2.6.28-rc6eeepc
Hi Alan,
Looking at the kernel driver code for oprofile it can return the "i386/p6" for
the cpu_type. However, looking at the user-space oprofile code there isn't the
matching entry in libop/op_cpu_type.c or the events/unit_mask files in
events/i386 directory.
The Intel AP-485 says this is a "Intel Pentium M processor model D". Seems like
the oprofile kernel driver should be identifying the processor as "i386/p6_mobile"
The driver identification code doesn't look quite right in nmi_init.c
http://git.kernel.org/?p=linux/kernel/git/sfr/linux-next.git;a=blob;f=arch/x86/oprofile/nmi_int.c;h=022cd41ea9b4106e5884277096e80e9088a7c7a9;hb=HEAD
has:
409 case 10 ... 13:
410 *cpu_type = "i386/p6";
411 break;
Referring to the Intel AP-485:
case 10 and 11 should produce "i386/piii"
case 13 should produce "i386/p6_mobile"
I didn't see anything for case 12.
Something like the attached patch. I don't have a celeron machine to verify that
changes in this area of the kernel fix thing.
-Will
Signed-off-by: William Cohen <wcohen@redhat.com>
Tested-by: Alan Jenkins <alan-jenkins@tuffmail.co.uk>
Acked-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Robert Richter <robert.richter@amd.com>
Just found the merge issue in 442746989d
("powerpc/83xx: Add support for MCU microcontroller in .dts files"):
the commit adds the MCU controller node into the DMA node, which is
wrong because the MCU sits on the I2C bus. Fix this by moving the MCU
node into the I2C controller node.
The original patch[1] was OK though. ;-)
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
If oprofile statically compiled in kernel, a cpu unplug triggers
a panic in ppro_stop(), because a NULL pointer is dereferenced.
Signed-off-by: Eric Dumazet <dada1@cosmosbay.com>
Signed-off-by: Robert Richter <robert.richter@amd.com>
The access to the iommu->need_sync member needs to be protected by the
iommu->lock. Otherwise this is a possible race condition. Fix it with
this patch.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
In some rare cases a request can arrive an IOMMU with its originial
requestor id even it is aliased. Handle this by setting the device table
entry to the same protection domain for the original and the aliased
requestor id.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Remove 16 bytes of padding from struct amd_iommu on 64bit builds
reducing its size to 120 bytes, allowing it to span one fewer
cachelines.
Signed-off-by: Richard Kennedy <richard@rsk.demon.co.uk>
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Impact: remove stale IOTLB entries
In the non-default nofullflush case the GART is only flushed when
next_bit wraps around. But it can happen that an unmap operation unmaps
memory which is behind the current next_bit location. If these addresses
are reused it may result in stale GART IO/TLB entries. Fix this by
setting the GART next_bit always behind an unmapped location.
Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
From: Chris Torek <chris.torek@windriver.com>
>The SPARC64 kernel code for PTRACE_SETFPREGS64 appears to be an exact copy
>of that for PTRACE_GETFPREGS64. This means that gdbserver and native
>64-bit GDB cannot set floating-point registers.
It looks like a simple typo.
Signed-off-by: David S. Miller <davem@davemloft.net>
On PowerPC 4xx or other non cache-coherent platforms, we lost the
appropriate cache flushing in dma_map_sg() when merging the 32 and
64-bit DMA code (commit 4fc665b88a,
"powerpc: Merge 32 and 64-bit dma code"). This restores it.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
* 'kvm-updates/2.6.28' of git://git.kernel.org/pub/scm/linux/kernel/git/avi/kvm:
KVM: MMU: avoid creation of unreachable pages in the shadow
KVM: ppc: stop leaking host memory on VM exit
KVM: MMU: fix sync of ptes addressed at owner pagetable
KVM: ia64: Fix: Use correct calling convention for PAL_VPS_RESUME_HANDLER
KVM: ia64: Fix incorrect kbuild CFLAGS override
KVM: VMX: Fix interrupt loss during race with NMI
KVM: s390: Fix problem state handling in guest sigp handler
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k:
m68k: Update defconfigs for 2.6.28-rc7
macfb: Do not overflow fb_fix_screeninfo.id
This fixes the MN10300 kernel module linking to match the toolchain. RELA
relocs don't use the value at the location being relocated. This has been
working because the tools always leave the value at the target location
cleared.
Signed-off-by: Mark Salter <msalter@redhat.com>
Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
In the CONFIG_SMP case the irq_choose_cpu() code was returning back
a logical cpu id not the physical id. We were writing that directly
into the HW register.
We need to be calling get_hard_smp_processor_id() so irq_choose_cpu()
always returns a physical cpu id.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This patch adds HP iPAQ h5000's (h5400, h5500) basic definitions.
Kernel will able to boot, work via serial console, mount filesystems
placed on flashes and run USB gadgets (g_ether by default).
Other device drivers (frame buffer, LCD, touchscreen, backlight,
bluetooth, w1/battery, ...) are depend on SAMCOP and MediaQ
SoCs/MFDs, drivers to which will be submitted too, after massive
cleanups.
This machine will be used as "real user" for these new drivers.
This is an updated version of the patch, which contains fixes proposed on
linux-arm-kernel mailing list.
Signed-off-by: Anton Vorontsov <cbouatmailru@gmail.com>
Signed-off-by: Milan Plzik <milan.plzik@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Add mapping for system ROM using physmap-flash mapping.
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Add mapping for system ROM using physmap-flash mapping.
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Add mapping for system ROM using physmap-flash mapping.
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Add mapping for system ROM using physmap-flash mapping.
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Add platform data necessary to support tmiofb on tosa.
Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Take advantage of the newly created wm97xx battery driver
and remove useless code in mioa701 board code. Add also the
ac connection detect capability after the matching gpio was
discovered.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
The charger enable gpio is straight (1 means draw from USB
Vbus, 0 mean do not draw). The USB Vbus sensing is inverted
(1 means no Vbus voltage sensed, 0 means Vbus voltage
present).
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Change the halt and reboot method from gpio based to "jump
to ROM IPL beginning". This gives control back to IPL, which
without PowerOn key pressed, will put the device into deep
sleep until PowerOn is pressed for 1 second.
But this has the benefit of keeping the RTC registers across
reboots, which is good for OS change.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Add GPIO configuration and platform specific declarations
to make Mitac Mio A701 camera chip work. The chip is a
Micron MT9M111 CMOS sensor, based on PXA QIF interface and
I2C bus for sensor control.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Since mioa701 board has migrated to the mfp architecture,
low power gpio setup is now correctly handled even when gpio
led driver is not loaded, and leds and vibrator don't stay
activated in suspend mode (especially vibrator).
Remove the not needed anymore dependency.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Add IO memory and IRQ ressources for pxa based SoC to be
able to use the new rtc-pxa driver.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
This patch implements Eric Miao's idea to detect the correct value of
sdram_rows by inspecting the MDCNFG register settings.
It is only tested on two pxa27x devices with 64MB RAM (magician and
hx4700) so far.
Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Following the removal of the "->policy" usage for PXA255 in patch
459fc208ab (cpufreq: remove
policy->governor setting in drivers initialization), this patch
introduces an option (called "pxa255_turbo_table") to select either
the "run" or "turbo" frequency table.
It also cures the runtime warning that was printed each time the
frequency was changed.
Got rid of all references to CPUFREQ_POLICY_* for pxa255, and sticked
with the run/turbo thing.
Tested on an Arcom/Eurotech Viper.
Signed-off-by: Marc Zyngier <maz@misterjones.org>
Acked-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
This symbol is required by locomo backlight driver, exporting this
allows the driver to be built as a module.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
GPIO3/GPIO4 are a bit special on pxa27x, since it depends on PCFR/PI2C_EN
bit, add their definitions here with comments.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Acked-by: Stefan Schmidt <stefan@datenfreihafen.org>
PXA935 has changed its implementor ID from Intel to Marvell, this
patch modifies arch/arm/boot/compressed/head.S and proc-xsc3.S to
support a smooth bootup.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Let's put these devices into a central place even if they are now
processor specific, as they might be re-used in later processors.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
The optimal change would be to move the AC97 register definitions into
the AC97 driver, unfortunately, the registers are shared between several
files. Move them into a dedicated regs-ac97.h first.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
There two are internal registers that are used to control the power
management of the Internal Memory (i.e. Internal SRAM). They are
referenced nowhere and removed here to simplify pxa-regs.h a bit.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
We now have generic PWM API for PXA, the PWM registers definitions are
now used nowhere, and it is not encouraged to manipulate them directly
by driver code.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
pxa_gpio_{get,set}_value() are not used anymore, remove them from hardware.h.
Declaration of pxa_gpio_mode() is still being referenced and thus moved into
pxa2xx-gpio.h
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Original patch from Marek Vasut, the problems with PXA26x are:
1. there are additional 4 GPIOs 86,87,88,89 have their direction bits
inverted in GPDR2, as well as their alternate function bits being
'1' for their GPIO functionality in GAFRx
2. there is no easy way to decide if the processor is a pxa26x or a
pxa250/pxa255 at run-time, so the assumption here is the pxa26x
will be treated as one of the pxa25x variants, and board code
should have a better knowledge of the processor it is featured
Introduce pxa26x_init_irq() for the second purpose, and treat the
additional GPIOs > 85 on PXA25x specially.
Kconfig option CONFIG_CPU_PXA26x is introduced to optimize the code
a bit when PXA26x support isn't needed. Board config options have
to select this to enable the support for PXA26x.
__gpio_is_inverted() will be optimized way when CONFIG_CPU_PXA26x
isn't selected.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
This reverts commit da1a3dc0eb.
The originally proposed way in the above commit is incorrect. And
there is no easy way to distinguish between pxa25x and pxa26x at
run-time.
Signed-off-by: Eric Miao <eric.miao@marvell.com>
The 'gpio_nr' can really be inferred by 'pxa_last_gpio', and since we
already have that variable, remove the unnecessary 'gpio_nr' now.
Also, fix the incorrect GPIO number passed in pxa27x_init_irq().
Note: pxa_last_gpio should be initialized earlier, and this is true
since it's been assigned in machine_desc->init_irq().
Signed-off-by: Eric Miao <eric.miao@marvell.com>
PXA SoC have several GPIOs muxed on only one wakeup source.
Add support for these wakeup sources which were missing
in mfp core support.
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Fix the error handling in sys_mmap2(). Currently, if the pgoff check
fails, fput() might have to be called (which it isn't), so do the pgoff
check first, before fget() is called.
Signed-off-by: David Howells <dhowells@redhat.com>
Reported-by: Julia Lawall <julia@diku.dk>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
The spi master driver must have num_chipselect set to allow the bus to
initialise. Pass this through the platform data.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This patch fixes a number of sillies, from missing 'const' to using
'return' in void functions, to functions with no arguments not even
'void' and a cast which isn't required.
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch fixes bad formatting found in
mach-sa1100 files.
What it does is to replace/delete things like
excessive spaces (start || endline). The code
looks the same just alot less junk.
Signed-off-by: Kristoffer Ericson <Kristoffer.Ericson@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add debounce support for ep93xx gpio interrupts.
On the EP93xx, GPIO ports A, B, and F can be used to generate
interrupts. For each port, if interrupts are enabled, it is
possible to debouce the input signal. Debouncing is implemented
by passing the input signal through a 2-bit shift register clocked
by a 128Hz clock.
This patch adds a platform specific way to enable the debouce
feature for these input ports.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Allow the ep93xx platform init code to register the built-in i2c bus.
The EP93xx processor has two GPIO pins dedicated for an I2C bus. This
patch registers the platform supplied i2c_board_info and the necessary
platform_device information for the i2c-gpio driver to use these pins.
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Ryan Mallon <ryan@bluewatersys.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add Cirrus Logic EDB9307A Dev Board to arch/arm/mach-ep93xx
Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The AT91CAP9 revC CPU has a few differences over the previous,
revB CPU which was distributed in small quantities only (revA was
an internal Atmel product only).
This patch adds the detection routines to recognize the different
AT91CAP9 revisions (based on the PMC subsystem version number), and
uses them to:
- activate a workaround for the external interrupts levels
(on revB CPUs)
- set the UDPHS_BYPASS bit (on revB CPUs)
- set AT91_GPBR register address to the correct offset
(0xfffffd50 on revB, 0xfffffd60 on revC)
For debugging usage, the CPU revision can be found in /proc/cpuinfo
on the 'Revision' line.
This patch is extracted from Andrew Victor's -at91 patch (2.6.27-at91.patch)
where it has been tested for the last 6 months.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add support for the Adeneo NeoCore 926 board.
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Convert the SAM9 and CAP9 board-specific files to make use of the
sam9_smc_configure() method to configure the memory-controller for
external peripherals.
The following boards have been modified:
cam60 : NAND
cap9adk : NAND, NOR
qil-a9260 : NAND
sam9-l9260 : NAND
sam9260ek : NAND
sam9261ek : DM9000 Ethernet, NAND
sam9263 : NAND
sam9g20ek : NAND
sam9rlek : NAND
usb-a9260 : NAND
usb-a9263 .: NAND
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
In at91_add_device_nand(), do not configure the Static Memory
controller with specific timing values.
The *_devices.c files are board independent, and the SMC timing values
are specific to the NAND devices that are installed on the board.
The board-specific files are now responsible for configuring the
Static Memory controller (if the don't want to leave it up to a
bootloader).
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Add a structure 'sam9_smc_config' and function sam9_smc_configure() to
allow the board-specific files to specify the configuration of the
Static Memory Controller per chip-select. This allows the board file
to specify timings for NAND flash, NOR flash or other external
peripherals.
This functionality can be used for all the SAM9 and CAP9 processors.
(the AT91RM9200 has a different memory-controller)
This patch is based on similar code in the AVR32 architecture.
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This reverts commit e669dae614, since it
is incomplete, and clashes with fuller patches and the sparc 32/64
unification effort.
Requested-by: David Miller <davem@davemloft.net>
Acked-by: Al Viro <viro@ZenIV.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This seems to be missing from the arm:devel branch, though the other
RealView configurations were modified accordingly.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The original file was based on 2.6.19-rc3. Apart from the new symbols,
the explicitly enabled eatures are AEABI, REALVIEW_HIGH_PHYS_OFFSET and
MACH_REALVIEW_PB11MP.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The original file was based on 2.6.14-rc2. Apart from the new symbols,
the explicitly enabled features are AACI, MMC, AEABI,
MACH_REALVIEW_PB1176 and MACH_REALVIEW_PB11MP.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This patch adds smc911x.c device configuration to the RealView
platforms. At some point it may be changed to the new smsc911x.c driver
(once complete testing was done).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This patch moves the Ethernet device registration from individual
realview_*.c files to core.c.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Some of the calls weren't necessary and some others were duplicated.
This patch tidies up the platsmp.c file.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
All the cases where the local timer for a CPU is accessed happen on the
corresponding current CPU, hence no need to access the per-CPU local
timer mappings.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This patch adds the necessary definitions and Kconfig entries to enable
Cortex-A9 (ARMv7 SMP) tiles on the RealView/EB board.
Signed-off-by: Jon Callan <Jon.Callan@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
The MCR for flushing the whole D cache is undefined on ARMv7 CPUs.
Signed-off-by: Harry Fearnhamm <Harry.Fearnhamm@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This patch adds support for RealView/PB-A8, a platform based on
Cortex-A8 with support for PCI-E and compact flash.
Signed-off-by: Bahadir Balban <bahadir.balban@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
RealView boards like PB11MPCore have 512MB of RAM available contiguously
at 0x70000000. Half of the memory is mirrored at 0x00000000 for
backwards compatibility. This patch adds the
CONFIG_REALVIEW_HIGH_PHYS_OFFSET option option to change the physical
base address so that the full amount of RAM is available to Linux. Note
that the EB board has 256MB of RAM also mirrored at 0x70000000, the only
board without this feature being PB1176.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Update to use the asm/sections.h header rather than declaring these
symbols ourselves. Change __data_start to _data to conform with the
naming found within asm/sections.h.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Impact: do not expose a control that has no effect
Fix to prevent sched_mc_power_saving from being exported through sysfs
on single-socket systems. (Say multicore single socket (Laptop))
CPU core map of the boot cpu should be equal to possible number
of cpus for single socket system.
This fix has been developed at FOSS.in kernel workout.
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
Acked-by: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
attr_smt_snooze_delay is only defined for CONFIG_PPC64, so protect the
attribute removal with the same condition. This fixes this build error
on 32-bit SMP configurations:
/data/home/miltonm/next.git/arch/powerpc/kernel/sysfs.c: In function ‘unregister_cpu_online’:
/data/home/miltonm/next.git/arch/powerpc/kernel/sysfs.c:722: error: ‘attr_smt_snooze_delay’ undeclared (first use in this function)
/data/home/miltonm/next.git/arch/powerpc/kernel/sysfs.c:722: error: (Each undeclared identifier is reported only once
/data/home/miltonm/next.git/arch/powerpc/kernel/sysfs.c:722: error: for each function it appears in.)
Signed-off-by: Paul Mackerras <paulus@samba.org>
* 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc:
powerpc: Fix system calls on Cell entered with XER.SO=1
powerpc/cell: Fix GDB watchpoints, again
powerpc/mpic: Don't reset affinity for secondary MPIC on boot
powerpc/cell/axon-msi: Retry on missing interrupt
powerpc: Fix boot freeze on machine with empty memory node
powerpc: Fix IRQ assignment for some PCIe devices
powerpc/spufs: Fix spinning in spufs_ps_fault on signal
powerpc/mpc832x_rdb: fix swapped ethernet ids
powerpc: Use generic PHY driver for Marvell 88E1111 PHY on GE Fanuc SBC610
powerpc/85xx: L2 cache size wrong in 8572DS dts
powerpc/virtex: Update defconfigs
powerpc/52xx: update defconfigs
xsysace: Fix driver to use resource_size_t instead of unsigned long
powerpc/virtex: fix various format/casting printk mismatches
powerpc/mpc5200: fix bestcomm Kconfig dependencies
powerpc/44x: Fix 460EX/460GT machine check handling
powerpc/40x: Limit allocable DRAM during early mapping
* master.kernel.org:/home/rmk/linux-2.6-arm:
Allow architectures to override copy_user_highpage()
[ARM] pxa/palmtx: misc fixes to use generic GPIO API
ARM: OMAP: Fixes for suspend / resume GPIO wake-up handling
[ARM] pxa/corgi: update default config to exclude tosa from being built
[ARM] pxa/pcm990: use negative number for an invalid GPIO in camera data
ARM: OMAP: Typo fix for clock_allow_idle
ARM: OMAP: Remove broken LCD driver for SX1
[ARM] 5335/1: pxa25x_udc: Fix is_vbus_present to return 1 or 0
[ARM] pxa/MioA701: bluetooth resume fix
[ARM] pxa/MioA701: fix memory corruption.
It turns out that on Cell, on a kernel with CONFIG_VIRT_CPU_ACCOUNTING
= y, if a program sets the SO (summary overflow) bit in the XER and
then does a system call, the SO bit in CR0 will be set on return
regardless of whether the system call detected an error. Since CR0.SO
is used as the error indication from the system call, this means that
all system calls appear to fail.
The reason is that the workaround for the timebase bug on Cell uses a
compare instruction. With CONFIG_VIRT_CPU_ACCOUNTING = y, the
ACCOUNT_CPU_USER_ENTRY macro reads the timebase, so we end up doing a
compare instruction, which copies XER.SO to CR0.SO. Since we were
doing this in the system call entry patch after clearing CR0.SO but
before saving the CR, this meant that the saved CR image had CR0.SO
set if XER.SO was set on entry.
This fixes it by moving the clearing of CR0.SO to after the
ACCOUNT_CPU_USER_ENTRY call in the system call entry path.
Signed-off-by: Paul Mackerras <paulus@samba.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
An earlier patch from Jens Osterkamp attempted to fix GDB
watchpoints by enabling the DABRX register at boot time.
Unfortunately, this did not work on SMP setups, where
secondary CPUs were still using the power-on DABRX value.
This introduces the same change for secondary CPUs on cell
as well.
Reported-by: Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
Tested-by: Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Kexec/kdump currently fails on the IBM QS2x blades when the kexec happens
on a CPU other than the initial boot CPU. It turns out that this is the
result of mpic_init trying to set affinity of each interrupt vector to the
current boot CPU.
As far as I can tell, the same problem is likely to exist on any
secondary MPIC, because they have to deliver interrupts to the first
output all the time. There are two potential solutions for this: either
not set up affinity at all for secondary MPICs, or assume that a single
CPU output is connected to the upstream interrupt controller and hardcode
affinity to that per architecture.
This patch implements the second approach, defaulting to the first output.
Currently, all known secondary MPICs are routed to their upstream port
using the first destination, so we hardcode that.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
The MSI capture logic for the axon bridge can sometimes
lose interrupts in case of high DMA and interrupt load,
when it signals an MSI interrupt to the MPIC interrupt
controller while we are already handling another MSI.
Each MSI vector gets written into a FIFO buffer in main
memory using DMA, and that DMA access is normally flushed
by the actual interrupt packet on the IOIF. An MMIO
register in the MSIC holds the position of the last
entry in the FIFO buffer that was written. However,
reading that position does not flush the DMA, so that
we can observe stale data in the buffer.
In a stress test, we have observed the DMA to arrive
up to 14 microseconds after reading the register.
This patch works around this problem by retrying the
access to the FIFO buffer.
We can reliably detect the conditioning by writing
an invalid MSI vector into the FIFO buffer after
reading from it, assuming that all MSIs we get
are valid. After detecting an invalid MSI vector,
we udelay(1) in the interrupt cascade for up to
100 times before giving up.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Paul Mackerras <paulus@samba.org>
I got a bug report about a distro kernel not booting on a particular
machine. It would freeze during boot:
> ...
> Could not find start_pfn for node 1
> [boot]0015 Setup Done
> Built 2 zonelists in Node order, mobility grouping on. Total pages: 123783
> Policy zone: DMA
> Kernel command line:
> [boot]0020 XICS Init
> [boot]0021 XICS Done
> PID hash table entries: 4096 (order: 12, 32768 bytes)
> clocksource: timebase mult[7d0000] shift[22] registered
> Console: colour dummy device 80x25
> console handover: boot [udbg0] -> real [hvc0]
> Dentry cache hash table entries: 1048576 (order: 7, 8388608 bytes)
> Inode-cache hash table entries: 524288 (order: 6, 4194304 bytes)
> freeing bootmem node 0
I've reproduced this on 2.6.27.7. It is caused by commit
8f64e1f2d1 ("powerpc: Reserve in bootmem
lmb reserved regions that cross NUMA nodes").
The problem is that Jon took a loop which was (in pseudocode):
for_each_node(nid)
NODE_DATA(nid) = careful_alloc(nid);
setup_bootmem(nid);
reserve_node_bootmem(nid);
and broke it up into:
for_each_node(nid)
NODE_DATA(nid) = careful_alloc(nid);
setup_bootmem(nid);
for_each_node(nid)
reserve_node_bootmem(nid);
The issue comes in when the 'careful_alloc()' is called on a node with
no memory. It falls back to using bootmem from a previously-initialized
node. But, bootmem has not yet been reserved when Jon's patch is
applied. It gives back bogus memory (0xc000000000000000) and pukes
later in boot.
The following patch collapses the loop back together. It also breaks
the mark_reserved_regions_for_nid() code out into a function and adds
some comments. I think a huge part of introducing this bug is because
for loop was too long and hard to read.
The actual bug fix here is the:
+ if (end_pfn <= node->node_start_pfn ||
+ start_pfn >= node_end_pfn)
+ continue;
Signed-off-by: Dave Hansen <dave@linux.vnet.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Currently, some PCIe devices on POWER6 machines do not get interrupts
assigned correctly. The problem is that OF doesn't create an
"interrupt" property for them. The fix is for of_irq_map_pci to fall
back to using the value in the PCI interrupt-pin register in config
space, as we do when there is no OF device-tree node for the device.
I have verified that this works fine with a pair of Squib-E SAS
adapter on a P6-570.
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
* git://git.kernel.org/pub/scm/linux/kernel/git/kyle/parisc-2.6:
parisc: struct device - replace bus_id with dev_name(), dev_set_name()
parisc: fix kernel crash when unwinding a userspace process
parisc: __kernel_time_t is always long
* 'irq-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
irq.h: fix missing/extra kernel-doc
genirq: __irq_set_trigger: change pr_warning to pr_debug
irq: fix typo
x86: apic honour irq affinity which was set in early boot
genirq: fix the affinity setting in setup_irq
genirq: keep affinities set from userspace across free/request_irq()
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86: always define DECLARE_PCI_UNMAP* macros
x86: fixup config space size of CPU functions for AMD family 11h
x86, bts: fix wrmsr and spinlock over kmalloc
x86, pebs: fix PEBS record size configuration
x86, bts: turn macro into static inline function
x86, bts: exclude ds.c from build when disabled
arch/x86/kernel/pci-calgary_64.c: change simple_strtol to simple_strtoul
x86: use limited register constraint for setnz
xen: pin correct PGD on suspend
x86: revert irq number limitation
x86: fixing __cpuinit/__init tangle, xsave_cntxt_init()
x86: fix __cpuinit/__init tangle in init_thread_xstate()
oprofile: fix an overflow in ppro code
* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq:
[CPUFREQ] powernow-k8: ignore out-of-range PstateStatus value
[CPUFREQ] Documentation: Add Blackfin to list of supported processors
Compress a set of consecutive switch cases into a case-range.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
All architectures now use the generic compat_sys_ptrace, as should every
new architecture that needs 32bit compat (if we'll ever get another).
Remove the now superflous __ARCH_WANT_COMPAT_SYS_PTRACE define, and also
kill a comment about __ARCH_SYS_PTRACE that was added after
__ARCH_SYS_PTRACE was already gone.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
... so get xen-ops.h in agreement with xen/smp.c
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
usual "introduce .text.head, put it in front of TEXT_TEXT in vmlinux.lds.S,
make the stuff up to jump to start_kernel live in it", same as on other
targets.
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
switch to __init for those; unlike powerpc sparc has no hotplug support
for that stuff and their ->probe() tends to call __init functions while
being declared __devinit.
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
All noise since we don't have CPU hotplug there. However, they
did expose something very odd-looking in there - poke_viking()
does a bunch of identical btfixup each time it's called (i.e.
for each CPU). That one is left alone for now; just the trivial
misannotation fixes.
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
called only from __init, calls __init. Incidentally, it ought to be static
in file.
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
pure noise - alpha doesn't have CPU hotplug
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
lh7a40x only uses the clk API for the framebuffer, so there's
no point having a complicated implementation.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
aaec2000 only uses the clk API for the framebuffer, so there's
no point having a complicated implementation.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Both of these symbols should be defined by a platform, or neither
should be defined. Ensure that all platforms conform.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
As Al did for Versatile in 2ad4f86b60,
add a typesafe __io implementation for platforms to use. Convert
platforms to use this new simple typesafe implementation.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Devices like b44 ethernet can't dma from addresses above 1GB. The driver
handles this cases by falling back to GFP_DMA allocation. But for detecting
the problem it needs to get an indication from dma_mapping_error.
The bug is triggered by using a VMSPLIT option of 2G/2G.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Acked-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
RiscPC is the only platform using the default setting for NR_IRQS,
so the default NR_IRQS doesn't really make sense; remove it and
make RiscPC provide such a definition.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When ISA_DMA_API is unset, we're not implementing the ISA DMA API,
so there's no point in publishing the prototypes via asm/dma.h, nor
including the machine dependent parts of that API.
This allows us to remove a lot of mach/dma.h files which don't contain
any useful code. Unfortunately though, some platforms put their own
private non-ISA definitions into mach/dma.h, so we leave these behind
and fix the appropriate #include statments.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Since 8d5796d2ec, we have allowed
PAGE_OFFSET to be configurable, so a constant virtual address
for MAX_DMA_ADDRESS is buggy. It should be defined in terms of
PAGE_OFFSET rather than a constant virtual address.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Move the definition of MAX_DMA_ADDRESS from mach/dma.h to mach/memory.h,
thereby placing it along side its relative, ISA_DMA_THRESHOLD.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
mach/io.h doesn't need linux/mm.h.
mach/dma.h doesn't need linux/device.h, asm/page.h or mach/hardware.h
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
ixp23xx's mach/io.h claims to need linux/kernel.h for BUG().
However, this header doesn't make use of BUG().
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Avoid unnecessarily pollution of the kernel's namespace by avoiding
mach/hardware.h in mach/timex.h.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Avoid unnecessarily pollution of the kernel's namespace by avoiding
mach/hardware.h in mach/io.h, mach/memory.h and mach/timex.h. Include
this header file where necessary.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Avoid unnecessarily pollution of the kernel's namespace by avoiding
mach/hardware.h in mach/io.h. Include this header file where necessary.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
