Commit graph

43 commits

Author SHA1 Message Date
David Daney
e3d0ead59f MIPS: OCTEON: Implement DCache errata workaround for all CN6XXX
Make messages refer to all CN6XXX.

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8941/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20 15:31:27 +01:00
Leonid Yegoshin
51eec48e12 MIPS: mm: uasm: Add signed 9-bit immediate related macros
MIPS R6 redefines several instructions and reduces the immediate
field to 9-bits so add related macros for the microassembler.

Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2015-02-16 10:01:25 +00:00
Steven J. Hill
e2965cd000 MIPS: Add MFHC0 and MTHC0 instructions to uasm.
New instructions for Extended Physical Addressing (XPA) functionality.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8453/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 22:47:31 +01:00
Markos Chandras
7682f9e818 MIPS: uasm: Add SLT uasm instruction
It will be used later on by bpf-jit

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Markos Chandras <markos.chandras@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/7120/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:48:19 +01:00
Markos Chandras
9d9873697e MIPS: uasm: Add s3s1s2 instruction builder
It will be used later on by the SLT instruction.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7119/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-26 10:48:19 +01:00
Markos Chandras
8248881835 MIPS: uasm: Add lb uasm instruction
It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2014-05-30 16:10:19 +02:00
Markos Chandras
16d21a812f MIPS: uasm: Add mflo uasm instruction
It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
2014-05-30 15:57:44 +02:00
Markos Chandras
a8e897ad00 MIPS: uasm: Add mul uasm instruction
It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6736/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 15:54:39 +02:00
Markos Chandras
d6b3314b49 MIPS: uasm: Add lh uam instruction
It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6733/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 15:54:38 +02:00
Markos Chandras
ab9e4fa092 MIPS: uasm: Add wsbh uasm instruction
It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6732/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 15:54:38 +02:00
Markos Chandras
e8ef868b47 MIPS: uasm: Add sltu uasm instruction
It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6731/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 15:54:38 +02:00
Markos Chandras
390363ed77 MIPS: uasm: Add sltiu uasm instruction
It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6730/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 15:54:38 +02:00
Markos Chandras
f3ec7a23b6 MIPS: uasm: Add mfhi uasm instruction
It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: Markos Chandras <markos.chandras@imgtec.com>
Patchwork: http://patchwork.linux-mips.org/patch/6728/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 14:54:56 +02:00
Markos Chandras
4c12a854d8 MIPS: uasm: Add divu uasm instruction
It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6727/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 14:53:06 +02:00
Markos Chandras
f31318fdf3 MIPS: uasm: Add srlv uasm instruction
It will be used later on by bpf-jit

[ralf@linux-mips.org: Fixed conflict due to other preceeding conflicts.]

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6726/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 14:53:05 +02:00
Markos Chandras
bef581ba1c MIPS: uasm: Add sllv uasm instruction
It will be used later on by bpf-jit

[ralf@linux-mips.org: Fixed conflict with
49e9529b9d [MIPS: uasm: add jalr instruction].

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6725/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 14:53:05 +02:00
Markos Chandras
beef8e020d MIPS: uasm: Add u3u2u1 instruction builders
It will be used later on by the sllv and srlv instructions.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6723/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30 12:36:03 +02:00
Paul Burton
d674dd14e8 MIPS: uasm: add MT ASE yield instruction
This patch allows use of the MT ASE yield instruction from uasm. It will
be used by a subsequent patch.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-05-28 16:20:28 +01:00
Paul Burton
53ed138986 MIPS: uasm: add wait instruction
This patch allows use of the wait instruction from uasm. It will be used
by a subsequent patch.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-05-28 16:20:27 +01:00
Paul Burton
729ff56169 MIPS: uasm: add sync instruction
This patch allows use of the sync instruction from uasm. It will be used
by a subsequent patch.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-05-28 16:20:26 +01:00
Paul Burton
49e9529b9d MIPS: uasm: add jalr instruction
This patch allows use of the jalr instruction from uasm. It will be used
by a subsequent patch.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-05-28 16:20:26 +01:00
Paul Burton
8dee5901b2 MIPS: uasm: add a label variant of beq
This patch allows for use of the beq instruction with labels from uasm,
much as bne & others already do. It will be used by a subsequent patch.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
2014-05-28 16:20:25 +01:00
Paul Gortmaker
078a55fc82 MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code
commit 3747069b25e419f6b51395f48127e9812abc3596 upstream.

The __cpuinit type of throwaway sections might have made sense
some time ago when RAM was more constrained, but now the savings
do not offset the cost and complications.  For example, the fix in
commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time")
is a good example of the nasty type of bugs that can be created
with improper use of the various __init prefixes.

After a discussion on LKML[1] it was decided that cpuinit should go
the way of devinit and be phased out.  Once all the users are gone,
we can then finally remove the macros themselves from linux/init.h.

Note that some harmless section mismatch warnings may result, since
notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
and are flagged as __cpuinit  -- so if we remove the __cpuinit from
the arch specific callers, we will also get section mismatch warnings.
As an intermediate step, we intend to turn the linux/init.h cpuinit
related content into no-ops as early as possible, since that will get
rid of these warnings.  In any case, they are temporary and harmless.

Here, we remove all the MIPS __cpuinit from C code and __CPUINIT
from asm files.  MIPS is interesting in this respect, because there
are also uasm users hiding behind their own renamed versions of the
__cpuinit macros.

[1] https://lkml.org/lkml/2013/5/20/589

[ralf@linux-mips.org: Folded in Paul's followup fix.]

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5494/
Patchwork: https://patchwork.linux-mips.org/patch/5495/
Patchwork: https://patchwork.linux-mips.org/patch/5509/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-14 19:36:51 -04:00
Steven J. Hill
abc597fe62 MIPS: microMIPS: uasm: Split 'uasm.c' into two files.
Split 'uasm.c' into two files. The new file 'uasm-mips.c' has the
functions specific to the classic MIPS ISA. The 'uasm.c' file
contains common code that can be used by classic or other ISAs
that could be supported by the kernel.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Cc: cernekee@gmail.com
Cc: kevink@paralogos.com
Cc: ddaney.cavm@gmail.com
Patchwork: https://patchwork.linux-mips.org/patch/4922/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
(cherry picked from commit 0961103562ab958fa74f35043bf4f72e51ed6155)
2013-05-01 16:32:45 -05:00
Ralf Baechle
7034228792 MIPS: Whitespace cleanup.
Having received another series of whitespace patches I decided to do this
once and for all rather than dealing with this kind of patches trickling
in forever.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-01 10:00:22 +01:00
Steven J. Hill
e6de1a09a2 MIPS: uasm: Add INS and EXT instructions.
These are MIPS32R2 instructions for merging and extracting bit fields
from one GPR into another.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
2012-09-13 15:43:53 -05:00
Steven J. Hill
71a1c776d5 MIPS: Fixup ordering of micro assembler instructions.
A number of new instructions have been added to the micro assembler causing
the list to no longer be in alphabetical order. This patch fixes up the name
ordering.

Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3789/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23 13:55:56 +01:00
David Daney
8d662c8d34 MIPS: Use WARN() in uasm for better diagnostics.
On the off chance that uasm ever warns about overflow, there is no way
to know what the offending instruction is.

Change the printks to WARNs, so we can get a nice stack trace.  It has
the added benefit of being much more noticeable than the short single
line warning message, so is less likely to be ignored.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1905/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-01-18 19:30:24 +01:00
David Daney
bb3d68c30a MIPS: Add LDX and LWX instructions to uasm.
Needed by Octeon II optimized TLB handlers.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Pachwork: https://patchwork.linux-mips.org/patch/1903/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-01-18 19:30:23 +01:00
David Daney
c42aef0947 MIPS: Add DINSM to uasm.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/1875/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-01-18 19:30:22 +01:00
David Daney
c9941158fd MIPS: Octeon: Apply CN63XXP1 errata workarounds.
The CN63XXP1 needs a couple of workarounds to ensure memory is not written
in unexpected ways.

All PREF with hints in the range 0-4,6-24 are replaced with PREF 28.  We
pass a flag to the assembler to cover compiler generated code, and patch
uasm for the dynamically generated code.

The write buffer threshold is reduced to 4.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1672/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-10-29 19:08:43 +01:00
David Daney
22b0763a23 MIPS: uasm: Add option to export uasm API.
A 'select EXPORT_UASM' in Kconfig will cause the uasm to be exported
for use in modules.  When it is exported, all the uasm data and code
cease to be __init and __initdata.

Also daddiu_bug cannot be __cpuinitdata if uasm is exported.  The
cleanest thing is to just make it normal data.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: wim@iguana.be
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/1500/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05 13:26:21 +01:00
David Daney
5b97c3f7ae MIPS: uasm: Add BBIT0 and BBIT1 instructions
These are OCTEON specific instructions.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: wim@iguana.be
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/1496/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05 13:26:21 +01:00
David Daney
de6d5b555c MIPS: uasm: Add drotr32 and uasm_i_drotr_safe.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
To: wim@iguana.be
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/1495/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05 13:26:20 +01:00
Ralf Baechle
5808184f1b MIPS: uasm: Add OR instruction.
This is needed for the fix of the M3 workaround.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12 17:26:20 +01:00
David Daney
58b9e2239f MIPS: Add SYSCALL to uasm.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/976/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-04-12 17:26:14 +01:00
David Daney
32546f38fa MIPS: Add TLBR and ROTR to uasm.
The soon to follow Read Inhibit/eXecute Inhibit patch needs TLBR and
ROTR support in uasm.  We also add a UASM_i_ROTR macro.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/953/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:25 +01:00
Florian Fainelli
3482d713a9 MIPS: Move arch/mips/mm/uasm.h to arch/mips/include/asm/uasm.h
Signed-off-by: Florian Fainelli <florian@openwrt.org>
To: linux-mips@linux-mips.org
To: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/887/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-02-27 12:53:19 +01:00
David Daney
92078e0618 MIPS: Add drotr and dins instructions to uasm.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-12-17 01:57:01 +00:00
Dmitri Vorobiev
17f61e61b4 [MIPS] Make two functions static
The following routines

uasm_rel_highest()
uasm_rel_higher()

are needlessly defined global. This patch makes them static.

Compile-tested using a customized config for the Malta board. Booting
the same board up to the shell prompt was also successful with this
patch applied.

Spotted by sparse.

Signed-off-by: Dmitri Vorobiev <dmitri.vorobiev@movial.fi>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-07-15 18:44:29 +01:00
Thiemo Seufer
fb2a27e743 [MIPS] Reimplement clear_page/copy_page
Fold the SB-1 specific implementation of clear_page/copy_page in the
generic version, and rewrite that one in tlbex style. The immediate
benefits:
  - It converts the compile-time workaround for SB-1 pass 1 prefetches
    to a more efficient run-time check.
  - It allows adjustment of loop unfolling, which helps to reduce the
    number of redundant cdex cache ops.
  - It fixes some esoteric cornercases (the cache line length calculations
    can go wrong, and support for 64k pages without prefetch instructions
    will overflow the addiu immediate).
  - Somewhat better guesses of "good" prefetch values.

Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-04-28 17:14:23 +01:00
Ralf Baechle
234fcd1484 [MIPS] Fix loads of section missmatches
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-03-12 14:14:41 +00:00
Thiemo Seufer
e30ec4525d [MIPS] Split the micro-assembler from tlbex.c.
This patch moves the micro-assembler in a separate implementation, as
it is useful for further run-time optimizations. The only change in
behaviour is cutting down printk noise at kernel startup time.

Checkpatch complains about macro parameters which aren't protected by
parentheses. I believe this is a flaw in checkpatch, the paste operator
used in those macros won't work with parenthesised parameters.

Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2008-02-01 14:48:44 +00:00