asgardius/android_kernel_motorola_sm6225
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17 commits

Author SHA1 Message Date
Ralf Baechle
a36920200c [MIPS] Enable support for the userlocal hardware register 
Which will cut down the cost of RDHWR $29 which is used to obtain the
TLS pointer and so far being emulated in software down to a single cycle
operation.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2007-07-10 17:33:02 +01:00
Atsushi Nemoto
53dc80287d [MIPS] FPU ownership management & preemption fixes 
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2007-03-17 01:03:26 +00:00
Ralf Baechle
fc5d2d279f [MIPS] Use the proper technical term for naming some of the cache macros. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2006-07-13 21:26:04 +01:00
Chris Dearman
2e128dedcd [MIPS] Default cpu_has_mipsmt to a runtime check 
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2006-07-13 21:25:58 +01:00
Ralf Baechle
f41ae0b2b9 [MIPS] Fix configuration of R2 CPU features and multithreading. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2006-06-29 21:10:51 +01:00
David Woodhouse
62c4f0a2d5 Don't include linux/config.h from anywhere else in include/ 
Signed-off-by: David Woodhouse <dwmw2@infradead.org>
 2006-04-26 12:56:16 +01:00
Ralf Baechle
f088fc84f9 [MIPS] FPU affinity for MT ASE. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2006-04-19 04:14:28 +02:00
Atsushi Nemoto
de62893bc0 [MIPS] local_r4k_flush_cache_page fix 
If dcache_size != icache_size or dcache_size != scache_size, or
set-associative cache, icache/scache does not flushed properly.  Make
blast_?cache_page_indexed() masks its index value correctly.  Also,
use physical address for physically indexed pcache/scache.
    
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2006-03-18 16:59:27 +00:00
Ralf Baechle
0401572a9b MIPS: Reorganize ISA constants strictly as bitmasks. 
Signed-off-by: Ralf Baechle <ralf@ongar.mips.com>
 2006-01-10 13:39:07 +00:00
Ralf Baechle
b4672d3729 MIPS: Introduce machinery for testing for MIPSxxR1/2. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2006-01-10 13:39:06 +00:00
Ralf Baechle
02cf211968 Cleanup the mess in cpu_cache_init. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2005-10-29 19:32:32 +01:00
Ralf Baechle
8f40611d2b Detect the MIPS R2 vectored interrupt, external interrupt controller 
options and the precense of the MT ASE.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2005-10-29 19:31:51 +01:00
Ralf Baechle
02416dcf5a Redo RM9000 workaround which along with other DSP ASE changes was 
causing some headache for debuggers knowing about signal frames.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2005-10-29 19:31:23 +01:00
Ralf Baechle
e50c0a8fa6 Support the MIPS32 / MIPS64 DSP ASE. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2005-10-29 19:31:17 +01:00
Ralf Baechle
4194318c39 Cleanup decoding of MIPSxx config registers. 
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2005-10-29 19:31:12 +01:00
Ralf Baechle
875d43e72b [PATCH] mips: clean up 32/64-bit configuration 
Start cleaning 32-bit vs. 64-bit configuration.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
 2005-09-05 00:06:06 -07:00
Linus Torvalds
1da177e4c3 Linux-2.6.12-rc2 
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!
 2005-04-16 15:20:36 -07:00